16th ISQED 2015: Santa Clara, California, USA

Session 1A: Robust Memory Design

Session 1B: Advances in Physical Design & Optimization

Session 1C: Manufacturing, Modeling, and Design Issues in Nanoscale CMOS

Session 2A: Voltage Regulators and Analog Design

Session 2B: Architectural Analysis and Algorithms

Session 2C: BIST and Scan Testing

Session 3A: Low Power Circuit Design

Session 3B: Energy and Power Management for IoT

Session 3C: Low-power and Robust Design Techniques

Poster Session

Session 4A: Challenges in SOC Design

Session 4B: Network and Multiprocessing Systems

Session 4C: Verification and Delay Measurement

Session 5A: Hardware and System Security

Session 5B: Systems Implementation and Optimization

Session 5C: Packaging and 3D Integration

Session 6A: Sensor Technology

Session 6B: EDA for Design Exploration & Analysis Beyond Moore's Law

Session 6C: Emerging Solid-State Device and Interconnect Technologies

a service of Schloss Dagstuhl - Leibniz Center for Informatics