![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
MTDT 1999: San Jose, CA, USA
- 7th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT '99), August 9-10, 1999, San Jose, CA, USA. IEEE Computer Society 1999, ISBN 0-7695-0259-8
Tutorial on Low Power SRAMs
- Martin Margala:
Low Power SRAMs for Battery Operation. 6-
Architecture and Applications
- Luke Roth, Lee D. Coraor, David L. Landis, Paul T. Hulina, Scott Deno:
Computing in Memory Architectures for Digital Image Processing. 8-15 - David L. Rhodes, Wayne H. Wolf:
Unbalanced Cache Systems. 16-23 - G. Jack Lipovski, Clement T. Yu:
The Dynamic Associative Access Memory Chip and Its Application to SIMD Processing and Full-Text Database Retrieval. 24-
Diagnosis and Yield
- Sue Brown, Jeff Campbell, Sherri Griffin, Dick James, Ray Haythornthwaite:
Failure Mechanisms Detected in Memory Chips during Routine Construction Analysis. 34-39 - Jun Zhao, Fred J. Meyer, Fabrizio Lombardi:
Interconnect Diagnosis of Bus-Connected Multi-RAM Systems. 40-47 - Julie D. Segal, Sergei Bakarian, Jonathon E. Colburn, Madan Kumar, Chang Hong, Alex Shubat:
Determining Redundancy Requirements for Memory Arrays with Critical Area Analysis. 48-53 - Doug Malone:
Design Validation of .18 um 1 Ghz Cache and Register Arrays. 54-
Tutorial on SDRAMs
- Jörg E. Vollrath:
Tutorial: Characterizing SDRAMS. 62-
Memory Testing topics
- Larry Fenstermaker, Ilyoung Kim, Jim L. Lewandowski, Jeffrey J. Nagy:
Built In Self Test for Ring Addressed FIFOs with Transparent Latches. 72-77 - Raju Khubchandani:
A Fast Test to Generate Flash Memory Threshold Voltage Distribution Map. 78-82 - Piotr R. Sidorowicz:
Modeling and Testing Transistor Faults in Content-Addressable Memories. 83-90 - Daniel P. Van der Velde, Ad J. van de Goor:
Designing a Memory Module Tester. 91-
New Ideas in Technology and Design
- Gershom Birk, Duncan G. Elliott, Bruce F. Cockburn:
A Comparative Simulation Study of Four Multilevel DRAMs. 102-109 - Mark Brehob, Richard J. Enbody:
The Potential of Carbon-Based Memory Systems. 110-114 - Martin Margala:
Low-Power SRAM Circuit Design. 115-122 - Betty Prince:
A Tribute to Graphics Drams. 123-
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.