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MSPC@PLDI 2013: Seattle, WA, USA
- Proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, June, 21, 2013, Seattle, Washington, USA, Co-located with PLDI 2013. ACM 2013, ISBN 978-1-4503-2103-7

Consistency & hardware optimizations
- Ganesh Venkatesh:

APE: accelerator processor extensions to optimize data-compute co-location. 1:1-1:10
Memory allocation & management I
- Haggai Eran

, Erez Petrank:
A study of data structures with a deep heap shape. 2:1-2:8 - Sébastien Valat, Marc Pérache

, William Jalby:
Introducing kernel-level page reuse for high performance computing. 3:1-3:9
Memory allocation & management II
- Matthew Davis, Peter Schachte

, Zoltan Somogyi, Harald Søndergaard
:
A low overhead method for recovering unused memory inside regions. 4:1-4:10 - Min Lee, Vishal Gupta, Karsten Schwan:

Software-controlled transparent management of heterogeneous memory resources in virtualized systems. 5:1-5:6
Poster presentations
- Guy E. Blelloch, Jeremy T. Fineman, Phillip B. Gibbons, Harsha Vardhan Simhadri:

Program-centric cost models for locality. 6:1-6:2 - Dong Ping Zhang, Nuwan Jayasena, Alexander Lyashevsky, Joseph L. Greathouse, Mitesh R. Meswani, Mark Nutter, Mike Ignatowski:

A new perspective on processing-in-memory architecture design. 7:1-7:3 - Raj Parihar, Chen Ding, Michael C. Huang

:
A coldness metric for cache optimization. 8:1-8:2 - Pengcheng Li, Chen Ding:

All-window data liveness. 9:1-9:2 - Bo Wu, Weilin Wang, Xipeng Shen:

Software-level scheduling to exploit non-uniformly shared data cache on GPGPU. 10:1-10:2 - Jacob Brock, Chen Ding:

Cache rationing for multicore. 11:1-11:2 - Saurabh Gupta, Ping Xiang, Huiyang Zhou

:
Analyzing locality of memory references in GPU architectures. 12:1-12:2

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