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ORCID17th SLIP 2015: San Francisco, CA, USA
- 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP 2015, San Francisco, CA, USA, June 6, 2015. IEEE Computer Society 2015, ISBN 978-1-4673-8189-5
- Andrew B. Kahng, Mulong Luo
, Siddhartha Nath:
SI for free: machine learning of interconnect coupling delay and transition effects. 1-8 - Sai Manoj P. D., Kanwen Wang, Hantao Huang, Hao Yu:
Smart I/Os: a data-pattern aware 2.5D interconnect with space-time multiplexing. 1-6 - Rui Wu, Chin-Hui Chen, Jean-Marc Fedeli, Maryse Fournier, Raymond G. Beausoleil, Kwang-Ting Cheng:
Compact modeling and system implications of microring modulators in nanophotonic interconnects. 1-6 - Samyoung Bang, Kwangsoo Han, Andrew B. Kahng, Vaishnav Srinivas:
Clock clustering and IO optimization for 3D integration. 1-8 - Tsung-Wei Huang, Martin D. F. Wong:
On fast timing closure: speeding up incremental path-based timing analysis with mapreduce. 1-6 - Xiang Zhang, Yang Liu, Ryan Coutts, Chung-Kuan Cheng:
Power line communication for hybrid power/signal pin SOC design. 1-8 - Haifeng Xu, Melissa M. Bilec, William O. Collinge, Laura A. Schaefer, Amy E. Landis, Alex K. Jones:
Lynx: a self-organizing wireless sensor network with commodity palmtop computers. 1-7 - Marco Escalante, Andrew B. Kahng, Michael Kishinevsky, Ümit Y. Ogras, Kambiz Samadi:
Multi-product floorplan and uncore design framework for chip multiprocessors. 1-7
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