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ORCID19th SMACD 2023: Funchal, Portugal
- 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2023, Funchal, Portugal, July 3-5, 2023. IEEE 2023, ISBN 979-8-3503-3265-0
- Uygar Yildiz, Eren Uzun, Kemal Ozanoglu, Günhan Dündar:
Ultra-Low Current Sensing from Femtoampere to Picoampere Range. 1-4 - Francesco Cosimi
, Jacopo Sini, Antonio Arena, Massimo Violante:
Novel Control Flow Checking Implementations for Automotive Software. 1-4 - Sachin Sachdeva, Jinwei Zhang, Hussam Amrouch, Sheldon X.-D. Tan:
Long-Term Aging Impacts on Spatial On-Chip Power Density and Temperature. 1-4 - Aleksi Korsman, Verneri Hirvonen, Otto Simola, Antti Tarkka, Marko Kosunen, Jussi Ryynänen:
End-to-End Multi-Target Verification Environment for a RISC-V Microprocessor. 1-4 - Dominik Zupan, Daniel Kircher, Nikolaus Czepl, Bernd Deutschmann:
Framework to Simulate and Analyse the Electromagnetic Emission of Integrated Circuits under Electromagnetic Interference. 1-4 - Michele Caselli, Andrea Boni:
Modelling and Optimization of a Mixed-Signal Accelerator for Deep Neural Networks. 1-4 - Stoyan M. Kirilov, Valeri M. Mladenov:
Application of New Metal-Oxide Memristor Models in Digital and Analog Electronic Circuits. 1-4 - Farzad Mozafari, Majid Ahmadi, Arash Ahmadi:
A Programmable Circuit Based on the Combination of VTM Cellular Crossbars. 1-4 - Jose M. Gata-Romero, Andrés Santana-Andreo, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
A Test Module for Aging Characterization of Digital Circuits. 1-4 - Behdad Jamadi, Fariborz T. Ordubadi, Armin Tajalli:
Design Flow to Develop Wideband Inverter-Based Circuits Using C/ID Methodology. 1-4 - Francisco Pasadas, Anibal Pacheco-Sanchez, Nikolaos Mavredakis, David Jiménez:
Graphene field-effect transistor TCAD tool for circuit design under freeware. 1-4 - Enes Saglican, Berkay Dur, Engin Afacan:
Design of Low Power & Low Noise On-Chip BioAmplifier in Cooperation with Analog IC Synthesis at 130nm Skywater Technology. 1-4 - Hadis Takaloo, Majid Ahmadi, Arash Ahmadi:
Uniformity Adjustment of Delay-Based Physical Unclonable Function: Modeling and Analysis. 1-4 - Fernando Corinto:
Modelling Memristive Devices via Ideal Memristor and Nonlinear Resistors. 1-4 - Jose M. Gata-Romero, Elisenda Roca, Juan Núñez, Rafael Castro-López, Francisco V. Fernández:
Reliability evaluation of IC Ring Oscillator PUFs. 1-4 - André Amaral, António Gusmão, Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço:
An ANN-Based Approach to the Modelling and Simulation of Analogue Circuits. 1-4 - Kerem Kaya, Kemal Ozanoglu, Yasemin P. Kahya, Günhan Dündar:
Programmable Switched-Capacitor Filter Design Tool for Biomedical Signal Acquisition. 1-4 - Ioannis Messaris, Alon Ascoli, Dimitrios A. Prousalis, Vasileios G. Ntinas, Ahmet Samil Demirkol, Ronald Tetzlaff:
Multitasking and Memcomputing in Memristor Cellular Nonlinear Networks: Insights into the Underlying Mechanisms. 1-4 - Catarina Belchior, Luis C. Nunes, Pedro M. Cabral, José Carlos Pedro:
Towards the Automated RF Power Amplifier Design. 1-4 - Li-Yu Chen, David D. Wentzloff:
An Automated Framework for Switched-Capacitor Power Amplifier Implementation Verified in 65 nm CMOS. 1-4 - Prafullkrishna Dani, Jochen Franz, Joachim Knoch:
Multiscale modelling of MEMS based Pirani gauges. 1-4 - Zonglong Li, Laurie E. Calvet:
Extraction of ECG features with spiking neurons for decreased power consumption in embedded devices. 1-4 - David Bierbuesse, Florian Dietrich, Eduard Heidebrecht, Renato Negra:
RapidIP - Fast & Universal Synthesis of RF-Circuits. 1-4 - Samantha Van Rijs, Ilke Ercan, Andrei Vladimirescu, Fabio Sebastiano:
Single-Electron-Transistor Compact Model for Spin-Qubit Readout. 1-4 - Jialin Cai, Jia Guo, Yan Qu:
An Overview of the Optimization of RF Power Amplifiers using a Bayesian Algorithm : (Invited). 1-4 - Ferhat Öztürk, Onur Ferhanoglu, Mustafa Berke Yelten:
A 432 MHz Class-D Power Amplifier with 60% Power Efficiency for Wireless Capsule Endoscopy. 1-4 - F. J. Rubio-Barbero, Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF. 1-4 - Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski:
Formal Verification of Divider Circuits by Hardware Reduction. 1-4 - Francesco Borgioli, Roberto Pio Baorda, Paolo Angelini:
Time based architecture for high-side current sensor with integrated shunt resistor. 1-4 - Juan Núñez, Maria J. Avedillo, Manuel Jiménez Través:
Exploitation of Subharmonic Injection Locking for Solving Combinatorial Optimization Problems with Coupled Oscillators using VO2 based devices. 1-4 - Rafailia-Eleni Karamani, Iosif-Angelos Fyrigos, Georgios Ch. Sirakoulis:
Investigating synchronization phenomena in chaotic ring oscillators coupled through memristive devices. 1-4 - Naci Pekcokguler, Günhan Dündar, Catherine Dehollain:
A Novel Area Efficient Inductorless Super-Regenerative Receiver Front-End for Medical Brain Implants. 1-4 - David Demiri, Giovanni Capodivacca, Daniele Privato, Husni Habal, Florian Renneke:
A Procedural Generator for the Sizing and Physical Synthesis of a MOSFET Low-Side Driver. 1-4 - Liyuan Xue, Haijun Fan, Yuan Ding, Bo Liu:
A Design Methodology of MMIC Power Amplifiers Using AI-driven Design Techniques. 1-4 - Christoph W. Wagner, Niklas Bräunlich, Kevin E. Drenkhahn, Georg Gläser:
Shut Off! - Hybrid BICMOS Logic for Power-Efficient High Speed Circuits. 1-4 - Utku Arda Akinci, Muhammed Salih Inneci, Zeynep Duygu Sütgöl, Faik Baskaya, Günhan Dündar:
Jitter Modeling for High Precision Frequency Measurements in Oscillator Circuits. 1-4 - Raúl Aparicio-Téllez, Miguel Garcia-Bosque, Guillermo Díez-Señorans, Carlos Sánchez-Azqueta, Santiago Celma:
Design Strategies to Select the Best Locations in a Ring Oscillator PUF. 1-4 - Tugçe Ayraç, Anil Özdemirli, Emre Apaydin, Kemal Ozanoglu, Metin Yazgi:
Comparative Evaluation of Multiline TRL and 2X-Thru De-Embedding Implementation Methods on Printed Circuit Board Measurements. 1-4 - Eros Camacho-Ruiz, F. J. Rubio-Barbero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Design considerations for a CMOS 65-nm RTN-based PUF. 1-4 - Sakthidasan Kalidasan, Armin Tajalli:
Extending C/ID Methodology for Optimal Implementation of Single-Stage Discrete-Time Amplifiers. 1-4 - Olympia Axelou, Eleni Tselepi, George Floros, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
PROTON - A Python Framework for Physics-Based Electromigration Assessment on Contemporary VLSI Power Grids. 1-4 - Andrés Santana-Andreo, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array. 1-4 - Henning Siemen, Jonas Lienke, Georg Gläser:
Hot Fuzz: Assisting verification by fuzz testing microelectronic hardware. 1-4 - Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Electromigration Stress Analysis with Rational Krylov-based Approximation of Matrix Exponential. 1-4 - João Louro, Luis C. Nunes, Filipe M. Barradas, José Carlos Pedro:
A Frequency-Domain Neural-Network Model for High-Power RF Transistors. 1-4 - Francisco V. Fernández, Elisenda Roca, Pablo Saraza-Canflanca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López:
Strategies for parameter extraction of the time constant distribution of time-dependent variability models for nanometer-scale devices. 1-4 - Mert Yetkin, Mustafa Berke Yelten:
Modeling the Avalanche Breakdown of the FMMT417 NPN BJT in the TINA Environment. 1-4 - Hasan Berat Gurbuz, Abdurrahim Balta, Tugba Dalyan, Y. Daghan Gokdel, Engin Afacan:
Img2Sim-V2: A CAD Tool for User-Independent Simulation of Circuits in Image Format. 1-4 - Israel Corbacho, Juan M. Carrillo, José L. Ausín, Miguel Angel Domínguez, Raquel Pérez-Aloe, J. Francisco Duque-Carrillo:
Low-Gm CMOS Transconductors with Wide Tuning Range for Bioimpedance Spectroscopy. 1-4 - Hale Yilmaz, Kemal Ozanoglu, Pier Cavallini, Metin Yazgi:
Single-Inductor Dual-Output DC-DC Converter with Multiple Flying Capacitors. 1-4 - Alessandro Fava, Francesco Centurelli, Andrea Vittimberga, Giuseppe Scotti:
Wide-Band Shared LNA for Large Scale Neural Recording Applications. 1-4 - A. Naya-Forcano, Miguel Garcia-Bosque, Guillermo Díez-Señorans, Santiago Celma:
Multiprogram tools for FPGA boards with single identifier on Windows. 1-4 - Wantao Li, Gabriel Montoro, Pere Lluís Gilabert:
Design and Implementation of a GPU-Based Digital Predistortion Linearizer for RF Power Amplifiers. 1-4 - Kyumin Kwon, David D. Wentzloff:
Synthesizable ADPLL Generator: From Specification to GDS. 1-4 - Michel Chevalier, Severin Trochut, Roberto Guizzetti, Pascal Urard, Lioua Labrak, John Samuel, Remy Cellier, Nacer Abouchi:
Reinforcement Learning for Analog Sizing Optimization. 1-4 - Laura Vicente-García, Óscar Pereira-Rial, Paula López:
Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems. 1-4 - J. Chithambara Moorthii, Sufyan Khan, Manan Suri:
NVSystolic: Heterogeneous Simulation Framework for Emerging Memories with Systolic Array. 1-4 - Atakan Türker, Kemal Ozanoglu, Engin Afacan, Günhan Dündar:
Analysis of SAR ADC Performance Under Radiation Exposure. 1-4 - Po-Chun Wang, Mark Po-Hung Lin, Chien-Nan Jimmy Liu, Hung-Ming Chen:
Layout Synthesis of Analog Primitive Cells with Variational Autoencoder. 1-4 - David Bierbuesse, Florian Dietrich, Eduard Heidebrecht, Renato Negra:
Circuit Synthesis of a 140-220 GHz Low-Noise Amplifier in 130 nm SiGe BiCMOS. 1-4 - Alptekin Vardar, Li Zhang, Saiyam Bherulal Jain, Shaown Mojumder, Nellie Laleni, Sourav De, Thomas Kämpfe:
The True Cost of Errors in Emerging Memory Devices: A Worst-Case Analysis of Device Errors in IMC for Safety-Critical Applications. 1-4 - Corrado De Sio, Sarah Azimi, Luca Sterpone, David Merodio Codinachs, Filomena Decuzzi:
PyXEL: Exploring Bitstream Analysis to Assess and Enhance the Robustness of Designs on FPGAs. 1-4 - Nicola Femia, Hamidreza Jafarian, Giulia Di Capua:
Power Losses Analysis of SiC MOSFETs in DC-DC Converters with High-Ripple-Current Inductors. 1-4 - Corrado De Sio, Luca Sterpone:
High-Performance SET Hardening Technique for Vision-Oriented Applications. 1-4 - Carlos Santos, Jorge R. Fernandes, Marcelino B. Santos, Ricardo Martins:
Paving the Way for the Electronic Design Automation of Power Management Units. 1-4 - Jesko Flemming, Bernhard Wicht, Pascal Witte:
Stability Analysis for Frequency Tunable Bandpass Delta-Sigma ADC Architectures. 1-4 - Manuel Jirsak, Henning Siemen, Jonas Lienke, Martin Grabmann, Eric Schäfer, Georg Gläser:
Under Cover: On-FPGA Coverage Monitoring by Netlist Instrumentation. 1-4 - Lomash Chandra Acharya, Anubhav Kumar, Khoirom Johnson Singh, Neha Gupta, Nayakanti Sai Shabarish, Neeraj Mishra, Mahipal Dargupally, Arvind Kumar Sharma, Venkatraman Ramakrishnan, Ajoy Mandal, Sudeb Dasgupta, Anand Bulusu:
Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure. 1-4 - Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta:
A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology. 1-4 - Emrah Peker, Onur Ferhanoglu, Mustafa Berke Yelten:
Shunt-Shunt Feedback Inverter Transimpedance Amplifier Design for Capsule Endoscopy. 1-4 - Orkun Altay Genç, Adnan Gündel, Mustafa Berke Yelten:
High-Performance Wideband 0.25 μm GaAs pHEMT 6-Bit Digital Phase Shifter Design for C-Band Phased Array Applications. 1-4 - Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço:
Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals. 1-4 - N. Vamshi Krishna, Aruna, Soumya J.:
Improving the Functional Coverage Closure of Network-on-Chip using Particle Swarm Optimization. 1-4 - Giulia Di Capua, Nicola Femia:
GaN Power Transistors Behavioral Modeling. 1-4 - Vasileios G. Ntinas, Dharmik Patel, Yongmin Wang, Ioannis Messaris, Vikas Rana, Stephan Menzel, Alon Ascoli, Ronald Tetzlaff:
A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation. 1-4
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last updated on 2025-12-04 22:07 CET by the dblp team
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