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Formal Methods in System Design, Volume 31

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Volume 31, Number 1, August 2007

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Roberto Passerone, Jerry R. Burch, Alberto L. Sangiovanni-Vincentelli:
Refinement preserving approximations for the design and verification of heterogeneous systems. 1-33
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Abhay Vardhan, Mahesh Viswanathan:
Learning to verify branching time properties. 35-61
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Gianfranco Ciardo, Gerald Lüttgen, Andrew S. Miner:
Exploiting interleaving semantics in symbolic state-space generation. 63-100

Volume 31, Number 2, October 2007

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Béatrice Bérard, Paul Gastin, Antoine Petit:
Timed substitutions for regular signal-event languages. 101-134
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Patricia Bouyer, Thomas Brihaye, Véronique Bruyère, Jean-François Raskin:
On the optimal reachability problem of weighted timed automata. 135-175
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  - journals/fmsd/SebastianiSTV07
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Roberto Sebastiani, Eli Singerman, Stefano Tonetta, Moshe Y. Vardi:
GSTE is partitioned model checking. 177-196

Volume 31, Number 3, December 2007

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A. Prasad Sistla, Xiaodong Wang, Min Zhou:
Checking extended CTL properties using guarded quotient structures. 197-219
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Clark W. Barrett, Leonardo Mendonça de Moura, Aaron Stump:
Design and results of the 2nd annual satisfiability modulo theories competition (SMT-COMP 2006). 221-239
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Zoltán Ádám Mann, András Orbán, Péter Arató:
Finding optimal hardware/software partitions. 241-263
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Salvatore La Torre, Margherita Napoli, Mimmo Parente:
The word problem for visibly pushdown languages described by grammars. 265-279
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Thuan Quang Huynh, Abhik Roychoudhury:
Memory model sensitive bytecode verification. 281-305

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