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Integration, Volume 85
Volume 85, July 2022
- Andrés Santana-Andreo

, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Piedad Brox, Rafael Castro-López
, Elisenda Roca
, Francisco V. Fernández:
A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs. 1-9
- Qing Zhang, Yuhang Zhang, Jizuo Li, Wei Lu, Yongfu Li

:
Litho-NeuralODE 2.0: Improving hotspot detection accuracy with advanced data augmentation, DCT-based features, and neural ordinary differential equations. 10-19 - Bahram Rashidi

:
Glitch-less hardware implementation of block ciphers based on an efficient glitch filter. 20-26 - Johann Knechtel

, Tarek Ashraf, Natascha Fernengel
, Satwik Patnaik
, Mohammed Nabeel, Mohammed Ashraf, Ozgur Sinanoglu, Hussam Amrouch
:
Design-time exploration of voltage switching against power analysis attacks in 14 nm FinFET technology. 27-34 - Mingtai Li, Tuanjie Li

, Yaqiong Tang:
Improved thermal network modeling of die stacking DRAM and optimization. 35-41
- Bo Wang, Sheng Ma

, Guoyi Zhu, Xiao Yi, Rui Xu:
A novel systolic array processor with dynamic dataflows. 42-47
- Güney Isik Tombak, Seyda Nur Güzelhan, Engin Afacan

, Günhan Dündar
:
Simulated annealing assisted NSGA-III-based multi-objective analog IC sizing tool. 48-56 - Manoj Joshi

, Ashish Ranjan:
Low power chaotic oscillator employing CMOS. 57-62 - Shaohui Yan, Yu Ren, Zhenlong Song, Wanlin Shi, Xi Sun:

A memristive chaotic system with rich dynamical behavior and circuit implementation. 63-75 - Qing Zhang, Yuhang Zhang, Jizuo Li, Yongfu Li

:
WDP-BNN: Efficient wafer defect pattern classification via binarized neural network. 76-86
- Xinfei Guo

, Mohamed El-Hadedy
, Sergiu Mosanu
, Xiangdong Wei, Kevin Skadron
, Mircea R. Stan
:
Agile-AES: Implementation of configurable AES primitive with agile design approach. 87-96
- Yuanqing Cheng

, Xiaochen Guo, Vasilis F. Pavlidis:
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective. 97-107
- Inga Abel

, Maximilian Neuner
, Helmut Graeb
:
A functional block decomposition method for automatic op-amp design. 108-120

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