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Integration, Volume 87
Volume 87, November 2022
- Mohammad Moradinezhad Maryan

, Seyed Javad Azhari, Majid Amini Valashani
:
A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process. 1-10 - Bo Li

, Guoyong Shi:
A CMOS rectified linear unit operating in weak inversion for memristive neuromorphic circuits. 24-28 - Jitumani Sarma

, Shatadal Chatterjee, Rakesh Biswas
, Sounak Roy:
A digitally controlled adaptive LDO for power management unit in sensor node. 29-39 - Ahmed S. Elwakil, Brent J. Maundy, Costas Psychalinos

, Mohamed B. Elamien
:
Synthesis of resonance-based common-gate fully differential band-pass filters. 67-73 - Bo Liu

, Pengfei Wang, Kai Li, Binrui Xu, Jincan Zhang, Liwen Zhang:
A precision programmable multilevel voltage output and low-temperature-variation CMOS bandgap reference with area-efficient transistor-array layout. 74-81 - Chen Tian, Jianyong Lu, Liu Jun, Huaguo Liang, Yingchun Lu, Maoxiang Yi:

A reconfigurable test method based on LFSR for 3D stacking integrated circuits. 82-89 - Aravindhan Alagarsamy

, Sundarakannan Mahilmaran, Gopalakrishnan Lakshminarayanan, Seok-Bum Ko
:
FRDS: An efficient unique on-Chip interconnection network architecture. 90-103 - Zewei Zhang, Xiao Zhao, Liyuan Dong, Shuoyang Li:

A high-efficiency feedforward compensation method for capacitor-less LDO. 104-110 - Abderrezzaq Bouhdjeur, Mohamed Salah Azzaz

, Djamel Teguig, Camel Tanougast
, Abdelmadjid Maali
:
An optimised hardware architecture of the angular-domain cyclostationary detector for cognitive radio communications. 111-121 - Wenhao Liu

, Huakui Lei, Hongfei Liu
, Peng Jiang:
Design of an ultra-wideband LNA using transformer matching method. 122-136 - Fábio G. R. G. da Silva, Rafael N. M. Oliveira

, Alexandra L. Zimpeck, Cristina Meinhardt
, Ricardo Reis
:
Exploring XOR-based Full Adders and decoupling cells to variability mitigation at FinFET technology. 137-146 - Ashish Valuskar

, Madhu Shandilya
, Arvind Rajawat:
Statistical traffic pattern for mixed torus topology and pathfinder based traffic and thermal aware routing protocol on NoC. 158-168 - Raghav Shekhar, Chaudhry Indra Kumar

:
Design of highly reliable radiation hardened 10T SRAM cell for low voltage applications. 176-181 - Yaru Wang, Ming Tang, Pengbo Wang

, Botao Liu, Rui Tian:
The Levene test based-leakage assessment. 182-193 - Paul P. Sotiriadis

, Nikos Temenos
:
Compact MAX and MIN Stochastic Computing architectures. 194-204 - Pournamy Sukumaran, Maran Ponnambalam

:
A two stage cascode LNA using modified derivative superposition technique in 0.13μm HBT with an IIP3 of 2 dBm and NF of 4.8 dB for IEEE 802.11ad standard. 211-220 - Jinling Yang, Lang Li

, Ying Guo, Xiantong Huang:
DULBC: A dynamic ultra-lightweight block cipher with high-throughput. 221-230 - Yanze Li, Yufan Zhang, Jiafeng Liu, Jun Gong, Jian Wang, Jinmei Lai, Xinxuan Tao, Gang Qu:

AutoTEA: An Automated Transistor-level Efficient and Accurate design tool for FPGA design. 231-240 - Raja Arslan Naseer

, Muneeba Nasim, Muhummad Sohaib
, Ch. Jabbar Younis, Anzar Mahmood
, Mehboob Alam
, Yehia Massoud:
VLSI architecture design and implementation of 5/3 and 9/7 lifting Discrete Wavelet Transform. 253-259 - Shuang Xie

:
BJT induced dark current in CMOS image sensors. 260-263 - Azadeh Norouzi Kangarshahi, Abdulhamid Zahedi:

A novel class-E class-D doherty power amplifier based on past matching network with linearity region extension and flat output power. 264-274 - Suoyue Zhan

, Chunhong Chen:
A hybrid method for signal probability and reliability estimation with combinational circuits. 275-283 - Hamed Aminzadeh

, Mohammad Mahdi Valinezhad
:
Picowatt 0.3-V MOS-only voltage reference based on a picoamp cascode current generator. 284-292 - Augusto Andre Souza Berndt, Cristina Meinhardt

, André Inácio Reis, Paulo F. Butzen
:
Optimizing machine learning logic circuits with constant signal propagation. 293-305 - Dharmaray Nedalgi, Saroja V. Siddamal

:
Differential receiver with 2 × VDD input signals using 1 × VDD devices. 306-312 - Longhao Xu, Jie Zhang:

A Novel four - Wing chaotic system with multiple attractors based on hyperbolic sine: Application to image encryption*. 313-331 - Jijun Ren

, Xing Wang:
Research on digital predistortion technique of harmonic cancellation based on volterra series. 332-335 - Krishnaveni Bukkapatnam, Jaikaran Singh:

VLSI implementation of low-power and area efficient parallel memory allocation with EC-TCAM. 336-345 - Rim Amdouni

, Mohamed Gafsi, Ramzi Guesmi
, Mohamed Ali Hajjaji, Abdellatif Mtibaa, El-Bay Bourennane
:
High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and DNA sequence encoding. 346-363 - Mithilesh Kumar, Alak Majumder, Abir J. Mondal

, Arijit Raychowdhury, Bidyut K. Bhattacharyya:
A low power and PVT variation tolerant mux-latch for serializer interface and on-chip serial link. 364-377
- Bo Wang

, Haoying Wu, Mingyu Liu:
Resource allocation applied to flexible printed circuit routing based on constrained Delaunay triangulation. 16-23 - Yi Zhao

, Hui Chen, Peng Liu, Jigang Wu, Dongxiang Luo:
An improved reconfigurable logic in resistive random access memory. 169-175 - Chao Cao, Haijun Guo:

High-resolution calibrated successive-approximation-register analog-to-digital converter. 205-210 - Ke Hu, Wenhao Sun, Zhongbo Nie, Ran Cheng, Song Chen

, Yi Kang:
Real-time infrared small target detection network and accelerator design. 241-252
- JiaHao Wei

, Tian Zhao, Zheng Zhang, Jing Wan:
Modeling of CMOS transistors from 0.18 μm process by artificial neural network. 11-15
- Tai Song

, Zhengfeng Huang, Aibin Yan:
Machine learning classification algorithm for VLSI test cost reduction. 40-48
- Nessrine Abbassi

, Mohamed Gafsi
, Rim Amdouni, Mohamed Ali Hajjaji, Abdellatif Mtibaa:
Hardware implementation of a robust image cryptosystem using reversible cellular-automata rules and 3-D chaotic systems. 49-66
- Chuxi Li, Xiaoya Fan, Shengbing Zhang, Zhao Yang, Miao Wang, Danghui Wang, Meng Zhang

:
DCNN search and accelerator co-design: Improve the adaptability between NAS frameworks and embedded platforms. 147-157

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