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ORCIDJournal of Circuits, Systems, and Computers, Volume 25
Volume 25, Number 1, January 2016
- Chip-Hong Chang
, Tae-Hyoung Kim, Hao Yu:
Editorial. 1602001:1-1602001:5 - Michael Pehl, Matthias Hiller, Helmut Graeb:
Efficient Evaluation of Physical Unclonable Functions Using Entropy Measures. 1640001:1-1640001:23 - Stefan Gehrer, Georg Sigl:
Area-Efficient PUF-Based Key Generation on System-on-Chips with FPGAs. 1640002:1-1640002:20 - Yingnan Cui, Wei Zhang, Vivek Chaturvedi, Weichen Liu, Bingsheng He:
Thermal-Aware Task Scheduling for 3D-Network-on-Chip: A Bottom to Top Scheme. 1640003:1-1640003:20 - Will X. Y. Li, Ray C. C. Cheung, Yao Xin, Dong Song, Theodore W. Berger:
An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis. 1640004:1-1640004:21 - Hitoshi Oi:
Effectiveness of DFS Tuning on Java Server Workload. 1640005:1-1640005:14 - Suyan Fan, Man-Kay Law, Mingzhong Li, Zhiyuan Chen, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins:
Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell. 1640006:1-1640006:21 - Chia-Lun Chang, Tai-Cheng Lee:
A Compact Multi-Input Power Conversion System with High Time-Efficiency Inductor-Sharing Technique for Thermoelectric Energy Harvesting Applications. 1640007:1-1640007:18 - Pyoungwon Park, Dipankar Nag, Dan Lei Yan, Muthukumaraswamy Annamalai Arasu:
Digital Compensation Method for the Path Delay Mismatches in GRO-TDC. 1640008:1-1640008:12 - Shairfe Muhammad Salahuddin, Volkan Kursun:
Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability. 1640009:1-1640009:19 - Jin He, Yong-Zhong Xiong, Jian Kang Li, Muthukumaraswamy Annamalai Arasu, Yue Ping Zhang:
A Fully-Integrated D-Band Frequency Synthesizer in 0.13-μm SiGe BiCMOS. 1640010:1-1640010:13
Volume 25, Number 2, February 2016
- Hugh L. Kennedy:
Digital Filter Designs for Recursive Frequency Analysis. 1630001:1-1630001:27 - Debaprasad Das, Hafizur Rahaman:
Investigating the Applicability of Graphene Nanoribbon as Signal and Power Interconnects for Nanometer Designs. 1650001:1-1650001:14 - V. Mohammed Zackriya, Harish M. Kittur:
Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments. 1650002:1-1650002:10 - Saurabh Kotiyal, Himanshu Thapliyal:
Design Methodologies for Reversible Logic Based Barrel Shifters. 1650003:1-1650003:34 - Pouya Asadi:
A New Array Multiplier Using an Optimized Carry Network and Dynamic CMOS Technology. 1650004:1-1650004:15 - Reza Sabbaghi-Nadooshan, Zahra Shahosseini, Davood Rezaeipour:
Design of New QCA LFSR and NLFSR for Grain-128 Stream Cipher. 1650005:1-1650005:15 - K. Sakthisudhan, N. Saravana Kumar:
Certain Study on Improvement of Bandwidth in 3GHz Microstrip Patch Antenna Designs and Implemented on Monostatic Radar Approach for Breast Cancer Diagnosis in Microwave Imaging System. 1650006:1-1650006:32 - Kuojun Yang, Jiali Shi, Shulin Tian, Wuhuang Huang, Peng Ye:
Timing Skew Calibration Method for TIADC-Based 20 GSPS Digital Storage Oscilloscope. 1650007:1-1650007:20 - Junpeng Hu, Zhiping Huang, Chunwu Liu, Shaojing Su, Jing Zhou:
Design of Digital Channelizer Based on Source Number Estimation. 1650008:1-1650008:11 - Daniel Mealha Cabrita, Carlos Raimundo Erig Lima:
A Fast Simulator in FPGA for LUT-Based Combinational Logic Circuits of Arbitrary Topology for Evolutionary Algorithms. 1650009:1-1650009:23 - B. Ghanavati, S. Mohammadzadeh, B. Noshad, M. Ahmadzadeh, A. Falahat:
Low-Voltage Wide Tuning Range Membership Function Generator and Its Application. 1650010:1-1650010:13 - Bülent Bilgehan, Bugçe Eminaga, Mustafa Riza:
New Solution Method for Electrical Systems Represented by Ordinary Differential Equation. 1650011:1-1650011:20 - Monika Jain, Sushma Gupta, Deepika Masand, Gayatri Agnihotri:
Soft Computing Technique-Based Voltage/Frequency Controller for a Self-Excited Induction Generator-Based Microgrid. 1650012:1-1650012:29 - Wanhang Gao, Wei Zhang, Yanyan Liu:
A Wide Locking Range and Low Power Divide-by-2/3 LC Injection-Locked Frequency Divider. 1650013:1-1650013:12 - Asma Taheri Monfared, Majid Haghparast:
Design of New Quantum/Reversible Ternary Subtractor Circuits. 1650014:1-1650014:8 - Mostafa Haghi, Abdolrasoul Ghasemi, Saed Moradi:
An Investigation on the Effects of Subnet Extension on Delay and Throughput in Network-on-Chip. 1650015:1-1650015:11 - Alireza Tajary, Behnam Ghavami:
A Metallic CNT Tolerant Design Methodology for Carbon Nanotube-Based Programmable Gate Arrays. 1650016:1-1650016:13 - Saeed Rasouli Heikalabad, Ahmad Habibizad Navin, Mehdi Hosseinzadeh, Telli Oladghaffari:
Erratum: Midpoint Memory: A Special Memory Structure for Data-Oriented Models Implementation. 1692001:1-1692001:2
Volume 25, Number 3, March 2016
- Zoran Stamenkovic:
Foreword. 1602002:1-1602002:1 - Dusan N. Grujic, Mihajlo Bozovic, Milan Savic:
BSIM4 to PSP Model Conversion: A Case Study. 1640011:1-1640011:17 - Roberto Urban, Heinrich Theodor Vierhaus, Mario Schölzel, Enrico Altmann, Horst Seelig:
Non-Cyclic Design Space Exploration for ASIPs - Compiler-Centered Microprocessor Design (CoMet). 1640012:1-1640012:16 - Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Philippe Debaud, Stephane Guilhot:
Design for Test and Diagnosis of Power Switches. 1640013:1-1640013:18 - Florence Azaïs, Stephane David-Grignot, Laurent Latorre, Francois Lefevre:
Digital Embedded Test Instrument for On-Chip Phase Noise Testing of Analog/RF Integrated Circuits. 1640014:1-1640014:18 - Sneana Stefanovski, Milka M. Potrebic, Dejan V. Tosic, Zoran Stamenkovic:
Compact Dual-Band Bandpass Waveguide Filter with H-Plane Inserts. 1640015:1-1640015:18 - Filip Kodýtek, Róbert Lórencz:
Proposal and Properties of Ring Oscillator-Based PUF on FPGA. 1640016:1-1640016:17 - Xiao Yang, Hongbo Zhu, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada:
An Asynchronous Summation Circuit for Noise Filtering in Single Photon Avalanche Diode Sensors. 1640017:1-1640017:16 - Kishore K. Duganapalli, Ajoy Kumar Palit, Walter Anheier:
Genetic-Algorithm-based Test Pattern Generation for Crosstalk Faults between On-Chip Aggressor and Victim. 1640018:1-1640018:14 - Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková:
Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications. 1640019:1-1640019:18 - Thomas Polzer, Robert Najvirt, Florian Beck, Andreas Steininger:
On the Appropriate Handling of Metastable Voltages in FPGAs. 1640020:1-1640020:25 - Nils Przigoda, Robert Wille, Rolf Drechsler:
Analyzing Inconsistencies in UML/OCL Models. 1640021:1-1640021:21 - Steffen Zeidler, Xin Fan, Oliver Schrape, Milos Krstic:
An Early Stage Design Flow for Switching Noise Attenuation. 1640022:1-1640022:21 - Hans G. Kerkhoff, Hassan Ebrahimi:
Investigation of Intermittent Resistive Faults in Digital CMOS Circuits. 1640023:1-1640023:17
Volume 25, Number 4, April 2016
- Syed Iftekhar Ali, Md. Shafiqul Islam, Mohammad Rakibul Islam:
A Comprehensive Review of Energy Efficient Content Addressable Memory Circuits for Network Applications. 1630002:1-1630002:40 - Zhengming Li:
Test Sample Oriented Dictionary Learning for Face Recognition. 1650017:1-1650017:20 - Xiaoting Wang, Yiwen Wang, Ping Li:
An Aggregated Process-Based Traffic Generator for Network Performance Evaluation. 1650018:1-1650018:16 - Mehdi Fallah, Javad Modarresi, Ali Ajami, Mohammad Tavakoli Bina:
Improvement of Indirect Harmonic Compensation Method Using Online Discrete Wavelet Transform. 1650019:1-1650019:20 - Mohammad Reza Jannati Oskuee, Sahar Khalilnasab, Sajad Najafi Ravadanegh, Gevork B. Gharehpetian:
Reduction of Circuit Devices in Developed Symmetrical/Asymmetrical Multilevel Converters. 1650020:1-1650020:18 - Wajdi Zaafrane, Habib Rehaoulia, Mahir Dursun, Jalel Khediri:
Low-Cost Linear Switched Reluctance Motor: Velocity and Position Control. 1650021:1-1650021:16 - Leila Safari, Erkan Yüce, Shahram Minaei:
A New Transresistance-Mode Instrumentation Amplifier with Low Number of MOS Transistors and Electronic Tuning Opportunity. 1650022:1-1650022:14 - Sadiq M. Sait, Feras Chikh Oughali, Abdalrahman M. Arafeh:
Engineering a Memetic Algorithm from Discrete Cuckoo Search and Tabu Search for Cell Assignment of Hybrid Nanoscale CMOL Circuits. 1650023:1-1650023:18 - Anupam Bhar, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur:
Small Test Set Generation with High Diagnosability. 1650024:1-1650024:18 - Mohammad Reza Jannati Oskuee, Elnaz Babazadeh, Sajad Najafi Ravadanegh, Jafar Pour-Mahmoud:
Multi-Stage Planning of Distribution Networks with Application of Multi-Objective Algorithm Accompanied by DEA Considering Economical, Environmental and Technical Improvements. 1650025:1-1650025:26 - Fatma Kahri, Hassen Mestiri, Belgacem Bouallegue, Mohsen Machhout:
High Speed FPGA Implementation of Cryptographic KECCAK Hash Function Crypto-Processor. 1650026:1-1650026:15 - Kore Sagar Dattatraya, Ritesh Belgudri, Ramdas Bhanudas Khaladkar, V. S. Kanchana Bhaaskaran:
Low Power, High Speed and Area Efficient Binary Count Multiplier. 1650027:1-1650027:17 - V. Prasanna Srinivasan, A. P. Shanthi:
A BBN-Based Framework for Design Space Pruning of Application Specific Instruction Processors. 1650028:1-1650028:44 - Adam Ziebinski, Stanislaw Swierc:
Soft Core Processor Generated Based on the Machine Code of the Application. 1650029:1-1650029:14 - Manoj Pandey, Jagpal Singh Ubhi, Kota Solomon Raju:
Computational Acceleration of Real-Time Kernel-Based Tracking System. 1650030:1-1650030:21 - S. Dhanapal, R. Anita:
Voltage and Frequency Control of Stand Alone Self-Excited Induction Generator Using Photovoltaic System Based STATCOM. 1650031:1-1650031:24 - Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Thanos Stouraitis, Costas E. Goutis:
Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs. 1650032:1-1650032:26
Volume 25, Number 5, May 2016
- Abhishek Nag, Sambhu Nath Pradhan:
An Autonomous Clock Gating Technique in Finite State Machines Based on Registers Partitioning. 1650033:1-1650033:21 - Punnavich Phatsornsiri, Montree Kumngern, Panit Lamun:
A Voltage-Mode Universal Biquadratic Filter Using DDCCTA. 1650034:1-1650034:24 - Meili Cao, Haizhen He, Hairong Lin, Hao Peng, Bohui Zhu:
Current-Mode nth-Order Filter Based on a Minimal Component. 1650035:1-1650035:14 - K. Kanimozhi, A. Shunmugalatha:
Photovoltaic Systems with Passive Lossless Cuk Converter Using Hybrid Sliding Mode Control. 1650036:1-1650036:22 - Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge:
Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box. 1650037:1-1650037:29 - Xinji Zeng, Jing Gao, Liu Yang, Jiangtao Xu:
An Extended-Counting Incremental Sigma-Delta ADC with Hardware-Reuse Technique. 1650038:1-1650038:13 - Ali Akhavan, Hamid Reza Mohammadi:
A Comprehensive Approach for Control of Grid-Connected Quasi-Z-Source Cascaded Multilevel Inverters. - Ling Zhang, Jishun Kuang:
Representative Scan Architecture. 1650040:1-1650040:8 - Bruno Felipe Costa, Taufik Abrão:
MIMO Precoding for Correlated Fading Channels. 1650041:1-1650041:11 - Erkan Yüce, Shahram Minaei:
A First-Order Fully Cascadable Current-Mode Universal Filter Composed of Dual Output CCIIs and a Grounded Capacitor. 1650042:1-1650042:15 - Shu Li, Weihua Lv, Xiaofei Zhang, Dazhuan Xu:
An Expanded Trilinear Model-Based Angle Estimation Algorithm for MIMO Radar with Small Number of Transmit/Receive Antennas. 1650043:1-1650043:17 - Debanjali Nath, Priyanka Choudhury, Sambhu Nath Pradhan:
Hybrid Approach of Within-Clock Power Gating and Normal Power Gating to Reduce Power. 1650044:1-1650044:26 - Goran S. Jovanovic, Darko Mitic, Mile K. Stojcev, Dragan Antic:
Self-Tuning OTA-C Notch Filter with Constant Q-Factor. 1650045:1-1650045:14 - P. Manimekalai, R. Harikumar, S. Raghavan:
SOGI Algorithm-Based Shunt Active Power Filter for Grid Integration of Photovoltaic Systems. 1650046:1-1650046:20 - Sherif M. Saif, Mohamed Dessouky, M. Watheq El-Kharashi, Hazem M. Abbas, Salwa M. Nassar:
A Platform for Placement of Analog Integrated Circuits Using Satisfiability Modulo Theories. 1650047:1-1650047:31 - Huu-Duy Tran, Hung-Yu Wang, Chin-Shiuh Shieh, Min-Chuan Lin, Sin-Hong Lin:
Tunable Voltage-Mode Bandpass Biquad Synthesis Using NAM Expansion Method. 1650048:1-1650048:21 - Vijay Kumar Sharma, Saurabh Kumar, Kamala Kanta Mahapatra:
Iterative and Fully Pipelined High Throughput Efficient Architectures of AES in FPGA and ASIC. 1650049:1-1650049:29
Volume 25, Number 6, June 2016
- Yiming Ouyang, Qi Chen, Xiumin Wang, Xiaoye Ouyang, Huaguo Liang, Gaoming Du:
AFTER: Asynchronous Fault-Tolerant Router Design in Network-on-Chip. 1650050:1-1650050:15 - Lv Zhao, Chunhua Wang:
A Low Power High Gain CMOS LNA with Multiple-Feedback Network for Low Voltage UWB Receiver. 1650051:1-1650051:19 - Rajeev K. Ranjan, Chandan Kr. Choubey, Bal Chand Nagar, Sajal K. Paul:
Comb Filter for Elimination of Unwanted Power Line Interference in Biomedical Signal. 1650052:1-1650052:14 - Jincan Zhang, Yuming Zhang, Hongliang Lu, Yimen Zhang, Bo Liu, Leiming Zhang, Jinchan Wang, Liwen Zhang:
A Ku-Band Low-Phase-Noise Cross-Coupled VCO in GaAs HBT Technology. 1650053:1-1650053:10 - Xiaoqin Zhang:
Transient Calculation of Electric Power Circuits with Special Reference to Magnetizing Nonlinearity. 1650054:1-1650054:14 - Lianxi Liu, Wenzhi Yuan, Junchao Mu, Zhangming Zhu, Yintang Yang:
A Dual Band RF Energy Harvester with Hybrid Threshold Voltage Self-Compensation. 1650055:1-1650055:16 - Gopal Sudha, K. R. Valluvan:
High Frequency Modeling of Smart Sensor for Precise Power Quality Assessment Using Fuzzy Logic. 1650056:1-1650056:16 - Je-Hoon Lee:
Power Modeling Framework for an Asynchronous Processor. 1650057:1-1650057:22 - Inkollu Sai Ram, Venkata Reddy Kota:
Optimal Setting of Multiple FACTS Devices to Improve Voltage Stability: A Novel GSA. 1650058:1-1650058:27 - Long Zhao, Chenxi Deng, Guan Wang, Hongming Chen, Yuhua Cheng:
A 1.1V 12μW 86dB DR Sigma-Delta Modulator for Health Monitoring System. 1650059:1-1650059:17 - Selmi Mourad, Habib Rehaoulia:
Steady State Analysis Operation of Self-Excited Wound Rotor Induction Generator Under Constant Frequency and Tolerated Output Voltage. 1650060:1-1650060:17 - Zhen Shao, Zhengrong Xiang:
Design of an Observer-Based Repetitive Control System to Reject Periodic Disturbance. 1650061:1-1650061:17 - Gang Chen, Kai Huang, Long Cheng, Biao Hu, Alois C. Knoll:
Dynamic Partitioned Cache Memory for Real-Time MPSoCs with Mixed Criticality. 1650062:1-1650062:17 - Sadiq M. Sait, Ghalib A. Al-Hashim:
Novel Design of Collaborative Automation Platform Using Real-Time Data Distribution Service Middleware for an Optimum Process Control Environment. 1650063:1-1650063:32 - Hongbo Ma, Junhong Yi, Jie Shuai, Jie Yang:
Low Input Current Ripple Quasi-Single-Stage Power Supply Based on Double Resonant Tank LLC Converter for Maglev Control System Applications. 1650064:1-1650064:21 - Saleh Fakhrali, Hamid R. Zarandi:
Double Stairs: A Fault-Tolerant Routing Algorithm for Networks-on-Chip. 1650065:1-1650065:15 - Pantre Kompitaya, Khanittha Kaewdang:
An Ultra-Low-Voltage Low-Power Current-Mode True RMS-to-DC Converter. 1650066:1-1650066:14
Volume 25, Number 7, July 2016
- Chuang Wang, Zunchao Li:
A Review of Start-Up Circuits for Low Voltage Self-Powered DC-Type Energy Harvesters. 1630003:1-1630003:15 - Álvaro Díaz Suárez, Javier Gonzalez Bayon, Pablo Sánchez Espeso:
Security Estimation in Wireless Sensor Network Simulator. 1650067:1-1650067:18 - Daejin Park:
Low-Power Code Memory Integrity Verification Using Background Cyclic Redundancy Check Calculator Based on Binary Code Inversion Method. 1650068:1-1650068:14 - Muzaffar Rao, Thomas Newe, Ian Andrew Grout, Avijit Mathur:
High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs. 1650069:1-1650069:13 - Hung-Chun Chien:
Switch-Controllable Full-Phase Operation Precision Half-Wave Rectifier Using a Single OTRA. 1650070:1-1650070:21 - Shuo Li, Xiaomeng Zhang, Saiyu Ren:
High Frequency Unity Gain Buffer in 90-nm CMOS Technology. 1650071:1-1650071:17 - Seyed Ali Sadat Noori, Ebrahim Frashidi, Sirus Sadughi:
A Novel Architecture of Pseudorandom Dithered MASH Digital Delta-Sigma Modulator with Lower Spur. 1650072:1-1650072:18 - Subodh Kumar Singhal, Basant Kumar Mohanty:
Efficient Parallel Architecture for Fixed-Coefficient and Variable-Coefficient FIR Filters Using Distributed Arithmetic. 1650073:1-1650073:19 - C. K. Vijayakumari, Rekha K. James, P. Mythili:
A GA Based Simple and Efficient Technique to Design Combinational Logic Circuits Using Universal Logic Modules. 1650074:1-1650074:22 - Wen Bin Ye, Ya Jun Yu:
Power Oriented Design of Linear Phase FIR Filters. 1650075:1-1650075:27 - Praveena Murugesan, Thanushkodi Keppanagounder, Vijeyakumar Krishnasamy Natarajan:
Design of Efficient Reversible BCD Adder-Subtractor Architecture and Its Optimization Using Carry Skip Logic. 1650076:1-1650076:15 - Sachin Singh, Sanjeev Singh:
Position Sensorless Control for PMBLDC Motor Drive Using Digital Signal Processor. 1650077:1-1650077:12 - Umar Mujahid Khokhar, Atif Raza Jafri, Muhammad Najam-ul-Islam:
Efficient Hardware Implementation of Ultralightweight RFID Mutual Authentication Protocol. 1650078:1-1650078:19 - Najmeh Rahmani, Ebrahim Farshidi, Esmaeil Fatemi-Behbahani:
Analysis and Modeling of Imperfections in Multi-Bit Per Stage Pipelined ADCs. 1650079:1-1650079:12 - Raed Bani-Hani, Khaldoon Mhaidat, Salah S. Harb:
Very Compact and Efficient 32-Bit AES Core Design Using FPGAs for Small-Footprint Low-Power Embedded Applications. 1650080:1-1650080:17 - Rekha Agrawal, Shailendra Jain:
Suitability of Reduced Part Count Multilevel Inverter Topologies for Grid Interfacing. 1650081:1-1650081:18 - Mohammad Shokouhifar, Ali Jalali:
Simplified Symbolic Gain, CMRR and PSRR Analysis of Analog Amplifiers Using Simulated Annealing. 1650082:1-1650082:23
Volume 25, Number 8, August 2016
- Deepak Verma, Savita Nema, Arun M. Shandilya:
A Different Approach to Design Non-Isolated DC-DC Converters for Maximum Power Point Tracking in Solar Photovoltaic Systems. 1630004:1-1630004:22 - P. Muralidhar, C. B. Rama Rao:
High Performance Architecture of Motion Estimation Algorithm for Video Compression. 1650083:1-1650083:15 - Liang Zhang, Dengquan Li, Zhangming Zhu, Yintang Yang:
A 10-GS/s 6-Bit Track-and-Hold Amplifier for Time-Interleaved SAR ADCs in 65-nm CMOS. 1650084:1-1650084:11 - Mojtaba Hasannezhad, Abumoslem Jannesari, Mojtaba Lotfizad:
Design of a High-Frequency Very Low-Power Direct Digital Frequency Synthesizer. 1650085:1-1650085:23 - Yuelong Li, Jigang Wu, Yawen Chen, Jason Mair, David M. Eyers, Zhiyi Huang:
Power Neighboring Interval Matching Based PMC Integration. 1650086:1-1650086:17 - Xiaojiao Ren, Ming Zhang, Nicolas Llaser, Yiqi Zhuang:
On-Chip Measurement of Quality Factor Implemented in 0.35μm CMOS. 1650087:1-1650087:14 - Khaoula Mechouek, Nasreddine Kouadria, Noureddine Doghmane, Nadia Kaddeche:
Low Complexity DCT Approximation for Image Compression in Wireless Image Sensor Networks. 1650088:1-1650088:13 - Ahmed Saeed, Ali Ahmadinia, Mike Just:
Secure On-Chip Communication Architecture for Reconfigurable Multi-Core Systems. 1650089:1-1650089:28 - Yunzhen Wang, Shengxi Diao, Fujiang Lin, Haiquan Yuan:
An Ultra-Low Power Subthreshold CMOS RSSI for Wake-Up Receiver. 1650090:1-1650090:14 - Geeta Kasana, Kulbir Singh, Satvinder Singh Bhatia:
Block-Based High Capacity Multilevel Image Steganography. 1650091:1-1650091:21 - Jingjing Wang, Wei Shi, Xinjie Wang, Lingwei Xu, Qiuna Niu, Yangyang Ma:
Design and Simulation of High-Precision Position System Using 60 GHz Pulse. 1650092:1-1650092:17 - Jia Wang, Lin Liu, Yuchen Zhou, Shiyan Hu:
Buffering Carbon Nanotube Interconnects Considering Inductive Effects. 1650093:1-1650093:17 - Tian-Bo Deng:
Generalized Stability-Triangle for Guaranteeing the Stability-Margin of the Second-Order Digital Filter. 1650094:1-1650094:13 - Changyuan Chang, Xiaomin Huang, Yuanye Li, Yao Chen:
High-Precision Digital Constant Current Controller with Demagnetization-Time Compensation for Primary-Side Regulation Flyback Converter. 1650095:1-1650095:17 - Rohit Lorenzo, Saurabh Chaudhury:
Optimal Body Bias to Control Stability, Leakage and Speed in SRAM Cell. 1650096:1-1650096:15 - Ehsan Meamari, Khadijeh Afhamisisi, Hadi Shahriar Shahhoseini:
Game Theory-Based Analysis on Interactions Among Secondary and Malicious Users in Coordinated Jamming Attack in Cognitive Radio Systems. 1650097:1-1650097:20 - Mehmet Hakan Karaata, Rachid Hadid:
A Stabilizing Optimal ℓ-Exclusion Algorithm. 1650098:1-1650098:20
Volume 25, Number 9, September 2016
- Zuo-Chen Shi, Yintang Yang, Di Li, Yang Liu:
A Power-Efficient Compact Pipelined ADC for ZigBee Receiver Applications. 1650099:1-1650099:8 - Mostafa Taheri, Seyed Ahmad Motamedi:
Transceiver Optimization for ToA-Based Localization of Mobile WSN. 1650100:1-1650100:21 - Yuanfa Wang, Zunchao Li, Lichen Feng, Chuang Wang, Wen Jing, Yefei Zhang:
Hardware Design of Seizure Detection Based on Wavelet Transform and Sample Entropy. 1650101:1-1650101:18 - Muhammad Mazher Iqbal, Husain Parvez, Muhammad Rashid:
"Multi-Circuit": Automatic Generation of an Application Specific Configurable Core for Known Set of Application Circuits. 1650102:1-1650102:17 - Jing Hua, Hua Zhang, Jizhong Liu, Junlong Zhou:
Compressive Sensing of Multichannel Electrocardiogram Signals in Wireless Telehealth System. 1650103:1-1650103:21 - Gengyu Zhang, Xia Xiao, Jiangtao Xu, Kaiming Nie, Zhiyuan Gao:
Particle Swarm Optimization Design of Low-Power Multistage Amplifier using gm/ID Methodology. 1650104:1-1650104:31 - Yong Xiao, Jie Zhang, Feng Pan, Yanhua Shen:
Power Line Communication Simulation Considering Cyclostationary Noise for Metering Systems. 1650105:1-1650105:13 - Chen-Nong Lee:
Mixed-Mode Universal Biquadratic Filter with No Need of Matching Conditions. 1650106:1-1650106:24 - Ali Kircay, Selim Borekci:
Electronically-Tunable Current-Mode Biquad Design Using MO-OTAs. 1650107:1-1650107:12 - P. Karuppusamy, G. Vijayakumar, S. Sathishkumar:
Certain Investigation on Multilevel Inverters for Photovoltaic Grid Connected System. 1650108:1-1650108:13 - Mir Majid Ghasemi, Javad Frounchi, Fahimeh Dehkhoda:
A New Receiver Front-End for Simultaneous Dual-Frequency NMR Applications. 1650109:1-1650109:14 - S. P. Valan Arasu, S. Baulkani:
An Efficient FPGA Architecture with High-Performance 2D DWT Processor for Medical Imaging. 1650110:1-1650110:22 - Sadiq M. Sait, Ghalib A. Al-Hashim:
Novel Design of Heterogeneous Automation Controller Based on Real-Time Data Distribution Service Middleware to Avoid Obsolescence Challenges. 1650111:1-1650111:28 - A. N. Nagamani, S. Ashwin, B. Abhishek, K. V. Arjun, Vinod Kumar Agrawal:
Design and Analysis of Multiple Parameters Optimized n-Bit Reversible Magnitude Comparators. 1650112:1-1650112:21 - Hadi Mardani Kamali, Shaahin Hessabi:
A Fault Tolerant Parallelism Approach for Implementing High-Throughput Pipelined Advanced Encryption Standard. 1650113:1-1650113:14 - Rohan Mukherjee, Vikrant Mahajan, Anindya Sundar Dhar, Indrajit Chakrabarti:
High Performance VISI Design of Diamond Search Algorithm for Fast Motion Estimation. 1650114:1-1650114:16 - Shuai Wang, Tao Jin, Chuanlei Zheng, Guangshan Duan:
Low Power Aging-Aware On-Chip Memory Structure Design by Duty Cycle Balancing. 1650115:1-1650115:24
Volume 25, Number 10, October 2016
- Marcelo Daniel Berejuck, Antônio Augusto Fröhlich:
Evaluation of a Connectionless Technique for System-on-Chip Interconnection. 1630005:1-1630005:26 - Sungkyung Park, Chester Sungchung Park:
High-Speed CMOS Frequency Dividers with Symmetric In-Phase and Quadrature Waveforms. 1630006:1-1630006:19
- Radi, Muhammad Rivai, Mauridhi Hery Purnomo:
Study on Electronic-Nose-Based Quality Monitoring System for Coffee Under Roasting. 1650116:1-1650116:19 - Quoc Khanh Dang, Young Soo Suh:
A Sensor-Fusing System for Spatial Circle and Trunk Parameter Estimation. 1650117:1-1650117:22 - Mohamed Ben-Esmael, Mary Mathew, Bryan L. Hart, Khaled Hayatleh:
Technique for Increasing the Output Impedance of CMOS Regulated Cascode Circuits. 1650118:1-1650118:6 - Bahman Keshanchi, Nima Jafari Navimipour:
Priority-Based Task Scheduling in the Cloud Systems Using a Memetic Algorithm. 1650119:1-1650119:33 - Uche Afam Nnolim:
Design and Implementation of Gain-Offset Correction Algorithm Hardware Architecture for Grayscale and Color Images Contrast Enhancement. 1650120:1-1650120:37 - Jianfei Jiang, Zhigang Mao, Weiguang Sheng, Qin Wang, Weifeng He:
Delay Analysis and Design Optimization for Low-Swing RC-Limited Global Interconnects. 1650121:1-1650121:31 - Chan-Keun Kwon, Junil Moon, Soo-Won Kim:
A 12-Bit 500-MS/s Current Steering CMOS DAC for High-Speed PLC Modems. 1650122:1-1650122:16 - Sujoy Paul, Ioana S. Sevcenco, Panajotis Agathoklis:
Multi-Exposure and Multi-Focus Image Fusion in Gradient Domain. 1650123:1-1650123:18 - S. Rekha, Tonse Laxminidhi:
Common Mode Feedback Circuits for Low Voltage Fully-Differential Amplifiers. 1650124:1-1650124:12 - Heying Zhang, Kefei Wang, Zhengbin Pang, Liquan Xiao, Qiang Dou, Yuan Yuan:
An Area-Efficient DAMQ Buffer with Congestion Control Support. 1650125:1-1650125:25 - Xiaohua Li, Jizhong Shen:
An Algorithm for Identifying Symmetric Variables in the Canonical Reed-Muller Algebra System. 1650126:1-1650126:15 - Hyunpil Kim, Sangook Moon:
Proxy Bits for Low Cost Floating-Point Fused Multiply-Add Unit. 1650127:1-1650127:15 - Sevilay Cetin:
An Improved Zero Voltage Transition PWM Boost Converter with an Active Snubber Cell. 1650128:1-1650128:23 - Lukas Malina, Jan Hajny, Petr Mlynek, Jiri Machacek, Radomir Svoboda:
Towards Efficient Application of Cryptographic Schemes on Constrained Microcontrollers. 1650129:1-1650129:18 - P. Karthikeyan, S. Vasuki:
Hybrid Approach of Efficient Decision-Based Algorithm and Fuzzy Logic for the Removal of High Density Salt and Pepper Noise in Images. 1650130:1-1650130:20
Volume 25, Number 11, November 2016
- Sungkyung Park, Chester Sungchung Park:
Quantization Noise Analysis of Time-to-Digital-Converter-Based All-Digital Phase-Locked Loop and Frequency Discriminators. 1650131:1-1650131:11 - Murat Karabacak:
A Novel Nonlinear and Adaptive Control of Grid Connected Inverters. 1650132:1-1650132:25 - Meng Wang, Yanyan Shi:
An Improved Predictive Current Control Scheme for Three-phase Voltage Source Converters. 1650133:1-1650133:12 - Vijay Kumar Sharma, Manisha Pattanaik:
Design of Low Leakage Variability Aware ONOFIC CMOS Standard Cell Library. 1650134:1-1650134:16 - Uros Pesovic, Peter Planinsic:
Error Probability Model for IEEE 802.15.4 Wireless Communication. 1650135:1-1650135:19 - Zhaohan Li, Yongcheng Ji, Shu Yang, Yuchun Chang:
A Dual-Mode High-Voltage High-Efficiency Peak-Current-Mode Asynchronous Buck Converter. 1650136:1-1650136:16 - Candice Müller, Maurizio Valle, Roman Buzas, Filip Brtan:
Model-Based Simulation Framework for FlexRay Communication Systems. 1650137:1-1650137:28 - K. Shankar, Eswaran Perumal:
RGB-Based Secure Share Creation in Visual Cryptography Using Optimal Elliptic Curve Cryptography Technique. 1650138:1-1650138:23 - Sparsh Mittal, Jeffrey S. Vetter:
Reliability Tradeoffs in Design of Volatile and Nonvolatile Caches. 1650139:1-1650139:14 - Ling-feng Shi, Zhen-Bo Shi, Sen Chen, Jian-Hui Xun:
Output Voltage Sampling Circuit for Discontinuous Conduction Mode Flyback Pulse-Width Modulation Controller. 1650140:1-1650140:15 - Juan Antonio Aqui-Tapia, Mario Ponce-Silva, Victor Hugo Olivares-Peregrino, Marco Antonio Oliver-Salazar, Claudia Cortés-García:
Assessment of the Bootstrap Technique in Single-Phase Current-Fed Full-Bridge Resonant Inverters with Reactive Energy. 1650141:1-1650141:12 - Kamineni Sumanth Kumar, John Reuben:
Minimal Buffer Insertion Based Low Power Clock Tree Synthesis for 3D Integrated Circuits. 1650142:1-1650142:17 - Jian Wang, Jian Feng, Zhiyan Han:
Discriminative Feature Selection Based on Imbalance SVDD for Fault Detection of Semiconductor Manufacturing Processes. 1650143:1-1650143:21 - Meysam Akbari, Omid Hashemipour:
Multi-Path Class AB Operational Amplifier with High Performance for SC Circuits. 1650144:1-1650144:14 - Shobhanjana Kalita, Rituraj Kaushik, M. Jajoo, P. P. Sahu:
Performance Enhancement of a Multichannel Uncoordinated Code Hopping DSSS Signaling Scheme Using Multipath Fading Compensator. 1650145:1-1650145:22 - Yuan Yuan, Meng He, Yuan-Wen Zou, Zhongbing Huang, Jin-Chuan Li, Xue-Jin Huang:
An Adjustable Electrical Stimulator for Cell Culture. 1650146:1-1650146:21 - Hongbing Wu, Hongxia Liu:
An Improved Bandgap Reference with Curvature-Compensated and High Power Supply Rejection. 1650147:1-1650147:9
Volume 25, Number 12, December 2016
- N. V. Vijaya Krishna Boppana, Saiyu Ren:
A Low-Power and Area-Efficient 64-Bit Digital Comparator. 1650148:1-1650148:15 - Zine Abid, Dalia A. El-Dib, Rizwan Mudassir:
Modified Operand Decomposition Multiplication for High Performance Parallel Multipliers. 1650149:1-1650149:12 - J. Ladvánszky, Boris Dortschy:
Can Mixer IP3 be Infinitely High? 1650150:1-1650150:7 - Ebrahim Babaei, Sara Laali:
New Extendable 15-Level Basic Unit for Multilevel Inverters. 1650151:1-1650151:22 - Mariam Zomorodi Moghadam, Keivan Navi:
Rotation-Based Design and Synthesis of Quantum Circuits. 1650152:1-1650152:22 - Vinay Kumar, Anup Dandapat:
Design Methodology for Multiple Output Combinational Circuits Using Cyclic Combinational Technique. 1650153:1-1650153:20 - Ahmet Abaci, Erkan Yüce:
Second-Order Voltage-Mode Universal Filters Using Two DVCCs, Two Grounded Capacitors and Four Resistors. 1650154:1-1650154:15 - Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC. 1650155:1-1650155:16 - Yi-Fei Pu, Ni Zhang, Huai Wang, Shu-Shu Chen, Xiao Yuan, Li Shu:
Order-Frequency Characteristics of a Promising Circuit Element: Fractor. 1650156:1-1650156:17 - Rekha Agrawal, Shailendra Jain:
A Review of Some Recently Proposed Topologies for Multilevel DC-AC Conversion. 1650157:1-1650157:25 - Kaisheng Lu, Yupeng Yuan, Xinping Yan, Qiang Ma:
Some Properties of a Class of RLCM Active Networks Over F(z). 1650158:1-1650158:10 - Sehmi Saad, Mongia Mhiri, Aymen Ben Hammadi, Kamel Besbes:
A 5-mW, 1.2-3.5-GHz Capacitive Degeneration in LC-Digitally-Controlled Oscillator for Nano-Satellite Frequency Synthesizers in 90-nm CMOS. 1650159:1-1650159:18 - Iqra Farhat, Muhammad Yasir Qadri, Nadia N. Qadri, Jameel Ahmed:
Fuzzy Logic-Based DSE Engine: Reconfiguration for Optimization of Multicore Architectures. 1650160:1-1650160:19 - Sawsan Morkos Gharghory, Dalia A. El-Dib:
Fuzzy Control System for Regulating the Blood Glucose Level of Diabetes Patients Implemented on FPGA. 1650161:1-1650161:17 - Qiang Liu, Yong Li, Yuanan Liu:
Novel Wideband Single-Layer 90∘ Phase Shifter Based on Radial-Stub and Weak Coupled-Line. 1650162:1-1650162:8 - Bingbing Xia, Jun Wu, Hongjin Liu, Kai Zhou, Zhifu Miao:
Design and Comparison of High-Reliable Radiation-Hardened Flip-Flops Under SMIC 40nm Process. 1650163:1-1650163:19 - Jingmin Wang, Zheng Yang, Zhangming Zhu, Yintang Yang:
A High Efficiency Self-Powered Rectifier for Piezoelectric Energy Harvesting Systems. 1650164:1-1650164:8
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