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ORCIDACM Journal on Emerging Technologies in Computing Systems, Volume 5
Volume 5, Number 1, January 2009
- Sandeep K. Shukla
:
Guest editorial: IEEE/ACM symposium on nanoscale architectures (NANOARCH07). 1:1-1:4 - Shuo Wang, Lei Wang, Faquir C. Jain:
Towards achieving reliable and high-performance nanocomputing via dynamic redundancy allocation. 2:1-2:21 - Zhengfei Wang, Huaixiu Zheng, Qinwei Shi, Jie Chen:
Emerging nanodevice paradigm: Graphene-based electronics for nanoscale computing. 3:1-3:19 - Baris Taskin, Andy Chiu, Jonathan Salkind, Daniel Venutolo:
A shift-register-based QCA memory architecture. 4:1-4:18 - Dennis Huo, Qiaoyan Yu, David Wolpert, Paul Ampadu:
A simulator for ballistic nanostructures in a 2-D electron gas. 5:1-5:21
Volume 5, Number 2, July 2009
- R. Iris Bahar:
Introduction to special section: Best of NANOARCH 2008. 6:1 - Prateek Mishra, Anish Muttreja, Niraj K. Jha:
Low-power FinFET circuit synthesis using multiple supply and threshold voltages. 7:1-7:23 - Michael Crocker, Xiaobo Sharon Hu, Michael T. Niemier:
Defects and faults in QCA-based PLAs. 8:1-8:27 - Xiaoxia Wu, Paul Falkenstern, Krishnendu Chakrabarty, Yuan Xie:
Scan-chain design and optimization for three-dimensional integrated circuits. 9:1-9:26 - Siddhartha Datta, Bharat Joshi, Arun Ravindran, Arindam Mukherjee:
Efficient parallel testing and diagnosis of digital microfluidic biochips. 10:1-10:17 - Mehdi Baradaran Tahoori:
Low-overhead defect tolerance in crossbar nanoarchitectures. 11:1-11:24
Volume 5, Number 3, August 2009
- Rajat Subhra Chakraborty, Swarup Bhunia:
A study of asynchronous design methodology for robust CMOS-nano hybrid system design. 12:1-12:22 - Wei Zhang, Niraj K. Jha, Li Shang:
A hybrid Nano/CMOS dynamically reconfigurable system - Part II: Design optimization flow. 13:1-13:31 - Muzaffer O. Simsir, Srihari Cadambi, Franjo Ivancic, Martin Rötteler, Niraj K. Jha:
A hybrid nano-CMOS architecture for defect and fault tolerance. 14:1-14:26 - Shuo Wang, Jianwei Dai, El-Sayed A. M. Hasaneen, Lei Wang, Faquir C. Jain:
Utilizing quantum dot transistors with programmable threshold voltages for low-power mobile computing. 15:1-15:19
Volume 5, Number 4, November 2009
- Wei Zhang, Niraj K. Jha, Li Shang:
A hybrid nano/CMOS dynamically reconfigurable system - Part I: Architecture. 16:1-16:30 - Wei Zhang, Niraj K. Jha, Li Shang:
Design space exploration and data memory architecture design for a hybrid nano/CMOS dynamically reconfigurable architecture. 17:1-17:27 - Weiguo Tang, Lei Wang, Fabrizio Lombardi:
A defect/error-tolerant nanosystem architecture for DSP. 18:1-18:22 - Timothy J. Dysart, Peter M. Kogge:
Organizing wires for reliability in magnetic QCA. 19:1-19:10
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