


default search action
IEEE Journal of Solid-State Circuits, Volume 33
Volume 33, Number 1, January 1998
- Barrie Gilbert:
The multi-tanh principle: a tutorial overview. 2-17 - Changsik Yoo, Seung-Wook Lee, Wonchan Kim:
A ±1.5-V, 4-MHz CMOS continuous-time filter with a single-integrator based tuning. 18-27 - Hamid Reza Mehrvarz, Chee Yee Kwok:
A pseudologarithmic rectifier using unbalanced bias MFMOS differential pairs. 28-35 - Gabriel A. Rincón-Mora, Phillip E. Allen:
A low-voltage, low quiescent current, low drop-out regulator. 36-44 - Eric T. King, Aria Eshraghi, Ian Galton, Terri S. Fiez:
A Nyquist-rate delta-sigma A/D converter. 45-52 - Makoto Nagata
, Jun Funakoshi, Atsushi Iwata:
A PWM signal processing core circuit based on a switched current integration technique. 53-60 - Mohammad Hossein Shakiba, David A. Johns, Kenneth W. Martin:
An integrated 200-MHz 3.3-V BiCMOS class-IV partial-response analog Viterbi decoder. 61-75 - Oliver Kromat, Ulrich Langmann, Gerhard Hanke, William J. Hillery:
A 10-Gb/s silicon bipolar IC for PRBS testing. 76-85 - Stephen Molloy, Rajeev Jain:
A 110-K transistor 25-MPixels/s configurable image transform processor unit. 86-97 - Johan Wulleman:
A BiCMOS front-end system with binary delay line for capacitive detector read-out. 98-108 - Tayfun Akin, Khalil Najafi, Robert M. Bradley:
A wireless implantable multichannel digital neural recording system for a micromachined sieve electrode. 109-118 - Takayuki Kawahara
, Yusuke Jyouno, Syun-ichi Saeki, Naoki Miyamoto, Katsutaka Kimura:
20-Mb/s erase/record flash memory by asymmetrical operation. 119-125 - Takayuki Kawahara
, Syun-ichi Saeki, Yusuke Jyouno, Naoki Miyamoto, Takashi Kobayashi, Katsutaka Kimura:
Internal voltage generator for low voltage, quarter-micrometer flash memories. 126-132 - Marco Tartagni, Roberto Guerrieri:
A fingerprint sensor based on the feedback capacitive sensing scheme. 133-142 - Andrea Boni, Carlo Morandi:
High-speed, low-power BiCMOS comparator using a pMOS variable load. 143-146 - Simon J. Lovett, Marco Welten, Alan Mathewson
, Barry Mason:
Optimizing MOS transistor mismatch. 147-150 - Kevin J. Page, Paul M. Chau:
Improved architectures for the add-compare-select operation in long constraint length Viterbi decoding. 151-155 - Ali Tabatabaei, Ali Fotowat, Michael Delurio, Saeed Navid:
A high slew-rate unity-gain low-voltage buffer with large active/quiescent current ratio. 156-163 - Kiat Seng Yeo
, Samir S. Rofail:
A charge-trapping-based technique to design low-voltage BiCMOS logic circuits. 164-168 - Janusz Nieznanski
:
An alternative approach to the ROM-less direct digital synthesis. 169-170 - Tadao Nakagawa, Hideyuki Nosaka
:
Authors' Reply. 170 - Michael Schröter, David J. Walkey:
Correction To "Physical Modeling Of Lateral Scaling In Bipolar Transistors". 171
Volume 33, Number 2, February 1998
- Ali Hajimiri
, Thomas H. Lee:
A general theory of phase noise in electrical oscillators. 179-194 - Wouter A. Serdijn, Jan Mulder, Albert C. van der Woerd, Arthur H. M. van Roermund:
A wide-tunable translinear second-order oscillator. 195-201 - Francesco Piazza, Qiuting Huang:
A 1.57-GHz RF front-end for triple conversion GPS receiver. 202-209 - Akihiro Yamagishi, Masayuki Ishikawa, Tsuneo Tsukahara, Shigeru Date:
A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication. 210-217 - Jouko Vankka, Mikko Waltari, Marko Kosunen, Kari A. I. Halonen:
A direct digital synthesizer with an on-chip D/A-converter. 218-227 - Giuseppe Palmisano, Gaetano Palumbo, Salvatore Pennisi
:
High-drive CMOS current amplifier. 228-236 - Henrik O. Johansson, Christer Svensson:
Time resolution of NMOS sampling switches used on low-swing signals. 237-245 - James F. Ziegler, Martin E. Nelson, James Dean Shell, R. Jerry Peterson, Carl J. Gelderloos, Hans P. Muhlfeld, Charles J. Montrose:
Cosmic ray soft error rates of 16-Mb DRAM memory chips. 246-252 - Youji Idei, Katsuhiro Shimohigashi, Masakazu Aoki, Hiromasa Noda, Hidetoshi Iwai, Katsuyuki Sato, Tadashi Tachibana:
Dual-period self-refresh scheme for low-power DRAM's with on-chip PROM mode register. 253-259 - Daisaburo Takashima, Yukihito Oowaki, Shigeyoshi Watanabe, Kazunori Ohuchi:
Noise suppression scheme for gigabit-scale and gigabyte/s data-rate LSI's. 260-267 - Takao Waho, Kevin J. Chen
, Masafumi Yamamoto:
Resonant-tunneling diode and HEMT logic circuits with multiple thresholds and multilevel output. 268-274 - Young-Jin Jeon, Man-Young Jeon, Jin-Myung Kim, Yoon-Ha Jeong, Dong-Ho Jeong, Dae Mann Kim:
Monolithic feedback low noise X-band amplifiers using 0.5-μm GaAs MESFETs: comparative theoretical study and experimental characterization. 275-279 - Teresa Serrano-Gotarredona
, Bernabé Linares-Barranco
:
A high-precision current-mode WTA-MAX circuit with multichip capability. 280-286 - Massimo Lanzoni, G. Tondi, P. Galbiati, Bruno Riccò:
Automatic and continuous offset compensation of MOS operational amplifiers using floating-gate transistors. 287-290 - L. P. L. van Dijk, Albert C. van der Woerd, Jan Mulder, Arthur H. M. van Roermund:
An ultra-low-power, low-voltage electronic audio delay line for use in hearing aids. 291-294 - Henrik O. Johansson:
A simple precharged CMOS phase frequency detector. 295-299 - Ion E. Opris:
Bootstrapped pad protection structure. 300-301 - Labros Bisdounis, Spiridon Nikolaidis
, Odysseas G. Koufopavlou:
Analytical transient response and propagation delay evaluation of the CMOS inverter for short-channel devices. 302-306
Volume 33, Number 3, March 1998
- Nishath K. Verghese, David J. Allstot:
Computer-aided design considerations for mixed-signal coupling in RF integrated circuits. 314-323 - Jaijeet Roychowdhury, David E. Long, Peter Feldmann:
Cyclostationary noise analysis of large RF circuits with multitone excitations. 324-336 - James F. Parker, Daniel Ray:
A 1.6-GHz CMOS PLL with on-chip loop filter. 337-343 - David M. Binkley, James M. Rochelle, Brian K. Swann, Lloyd G. Clonts, Rhonda N. Goble:
A micropower CMOS, direct-conversion, VLF receiver chip for magnetic-field wireless applications. 344-358 - Marc A. F. Borremans, Michiel S. J. Steyaert
:
A 2-V, low distortion, 1-GHz CMOS up-conversion mixer. 359-366 - Jind-Yeh Lee, Huan-Chang Liu, Henry Samueli:
A digital adaptive beamforming QAM demodulator IC for high bit-rate wireless communications. 367-377 - Jose A. Macedo, Miles A. Copeland:
A 1.9-GHz silicon receiver with monolithic image filtering. 378-386 - Lawrence E. Larson:
Integrated circuit technology options for RFICs-present status and future directions. 387-399 - Scott C. Munroe, Albert K. Lu:
2-μm, 1.6-mW gated-gm sampler with 72-dB SFDR for fs=160 Ms/s and fin=320.25 MHz. 400-409 - Pierre Favrat, Philippe Deval, Michel J. Declercq:
A high-efficiency CMOS voltage doubler. 410-416 - Xiaodong Wang, Richard R. Spencer:
A low-power 170-MHz discrete-time analog FIR filter. 417-426 - Joshua C. Park, L. Richard Carley:
High-speed CMOS continuous-time complex graphic equalizer for magnetic recording. 427-438 - Colin C. McAndrew:
Practical modeling for circuit simulation. 439-448 - Dennis Sylvester, James C. Chen, Chenming Hu:
Investigation of interconnect capacitance characterization using charge-based capacitance measurement (CBCM) technique and three-dimensional simulation. 449-453 - Tadahiro Kuroda, Kojiro Suzuki, Shinji Mita, Tetsuya Fujita, Fumiyuki Yamane, Fumihiko Sano, Akihiko Chiba, Yoshinori Watanabe, Koji Matsuda, Takeo Maeda, Takayasu Sakurai, Tohru Furuyama:
Variable supply-voltage scheme for low-power high-speed CMOS digital design. 454-462 - Kimiyoshi Usami, Mutsunori Igarashi, Fumihiro Minami, Takashi Ishikawa, Masahiro Kanazawa, Makoto Ichida, Kazutaka Nogami:
Automated low-power technique exploiting multiple supply voltages applied to a media processor. 463-472 - Inyup Kang, Alan N. Willson Jr.:
Low-power Viterbi decoder for CDMA mobile terminals. 473-482 - Benoît R. Veillette, Gordon W. Roberts:
On-chip measurement of the jitter transfer function of charge-pump phase-locked loops. 483-491 - Naoya Kusayanagi, Toru Choi, Masaya Hiwatashi, Masahiro Segami, Yasukazu Akasaka, Tadashi Wakabayashi:
A 25 Ms/s 8-b-10 Ms/s 10-b CMOS data acquisition IC for digital storage oscilloscopes. 492-496 - David A. Martin, Hae-Seung Lee, Ichiro Masaki:
A mixed-signal array processor with early vision applications. 497-502 - Christian Lütkemeyer, Tobias G. Noll:
A transversal equalizer with an increased adaptation speed and tracking capability. 503-507 - Jeffrey A. Kash, James C. Tsang, Richard F. Rizzolo, A. K. Patel, A. D. Shore:
Backside optical emission diagnostics for excess IDDQ. 508-511
Volume 33, Number 4, April 1998
- Ahmadreza Rofougaran, Glenn Chang, Jacob J. Rael, James Y.-C. Chang, Maryam Rofougaran, Paul J. Chang, Masoud Djafari, M.-K. Ku, Edward W. Roth, Asad A. Abidi, Henry Samueli:
A single-chip 900-MHz spread-spectrum wireless transceiver in 1-μm CMOS. I. Architecture and transmitter design. 515-534 - Ahmadreza Rofougaran, Glenn Chang, Jacob J. Rael, James Y.-C. Chang, Maryam Rofougaran, Paul J. Chang, Masoud Djafari, M.-K. Ku, Edward W. Roth, Asad A. Abidi, Henry Samueli:
A single-chip 900-MHz spread-spectrum wireless transceiver in 1-μm CMOS. II. Receiver design. 535-547 - Keng Leong Fong, Robert G. Meyer:
High-frequency nonlinearity analysis of common-emitter and differential-pair transconductance stages. 548-555 - Gian Marco Bo, Daniele D. Caviglia
, Maurizio Valle
:
An analog VLSI implementation of a feature extractor for real time optical character recognition. 556-564 - Carlos Azeredo Leme, José Silva, Paulo Rodrigo, José E. da Franca:
A low-power CMOS nine-channel 40-MHz binary detection system with self-calibrated 500-μV offset. 565-572 - Karim Arabi, Bozena Kaminska:
Design for testability of embedded integrated operational amplifiers. 573-581 - Martin Pfost, Hans-Martin Rein:
Modeling and measurement of substrate coupling in Si-bipolar IC's up to 40 GHz. 582-591 - Jieh-Tsorng Wu, Kuen-Long Chang:
MOS charge pumps for low-voltage operation. 592-597 - Chi-Chang Wang, Jiin-Chuan Wu:
A 3.3-V/5-V low power TTL-to-CMOS input buffer. 598-603 - Gustavo A. Ruiz
:
Evaluation of three 32-bit CMOS adders in DCVS logic for self-timed circuits. 604-613 - Alain Fabre, Omar Saaid, Francis Wiest, Christophe Boucheron:
High-frequency high-Q BiCMOS current-mode bandpass filter and mobile communication application. 614-625 - Angelo Nagari, Germano Nicollini:
A 3 V 10 MHz pseudo-differential SC bandpass filter using gain enhancement replica amplifier. 626-630 - Henrik Sjöland
, Sven Mattisson:
A 100-MHz CMOS wide-band IF amplifier. 631-634 - Andrea Baschirotto
, Rinaldo Castello
, Gianluigi Ezio Pessina
, Pier Giorgio Rancoita
, A. Seidman:
A versatile high-speed bipolar charge-sensitive preamplifier for calorimeter applications. 635-639 - Jean-Paul Eggermont, Denis Flandre
, Jean-Pierre Raskin, Jean-Pierre Colinge:
Potential and modeling of 1-μm SOI CMOS operational transconductance amplifiers for applications up to 1 GHz. 640-643 - Seyed R. Zarabadi, Mohammed Ismail, Chung-Chih Hung:
High performance analog VLSI computational circuits. 644-649 - Pietro Andreani, Franco Bigongiari, Roberto Roncella
, Roberto Saletti
, Pierangelo Terreni, Adriano Bigongiari, Maurizio Lippi:
Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution. 650-656 - Mankoo Lee:
A multilevel parasitic interconnect capacitance modeling and extraction for reliable VLSI on-chip clock delay evaluation. 657-661 - Phillip J. Restle, Keith A. Jenkins, Alina Deutsch, Peter W. Cook:
Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor. 662-665 - Kohei Fujii:
A sophisticated analysis procedure for an MMIC phase shifter. 666-668 - Harold J. Levy, Erik S. Daniel, Thomas C. McGill:
A transistorless-current-mode static RAM architecture. 669-672
Volume 33, Number 5, May 1998
- Paul E. Gronowski, William J. Bowhill, Ronald P. Preston, Michael K. Gowan, Randy L. Allmon:
High-performance microprocessor design. 676-686 - Rajeevan Amirtharajah
, Anantha P. Chandrakasan:
Self-powered signal processing using vibration-based power generation. 687-695 - Yong Moon, Deog-Kyoon Jeong:
A 32×32-b adiabatic register file with supply clock generator. 696-701 - Masafumi Nogawa, Yusuke Ohtomo:
A data-transition look-ahead DFF circuit for statistical reduction in power consumption. 702-706 - James A. Farrell, Timothy C. Fischer:
Issue logic for a 600-MHz out-of-order execution microprocessor. 707-712 - Chih-Kong Ken Yang, Ramin Farjad-Rad, Mark A. Horowitz:
A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling. 713-722 - Weinan Gao, W. Martin Snelgrove:
A 950-MHz IF second-order integrated LC bandpass delta-sigma modulator. 723-732 - Colby D. Boles, Bernhard E. Boser, Bruce H. Hasegawa, Joseph A. Heanue:
A multimode digital detector readout for solid-state medical imaging detectors. 733-742 - C. Patrick Yue, S. Simon Wong:
On-chip spiral inductors with patterned ground shields for Si-based RF ICs. 743-752 - Keith K. Onodera, Paul R. Gray:
A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]. 753-761 - Koji Kotani, Tadashi Shibata, Tadahiro Ohmi:
CMOS charge-transfer preamplifier for offset-fluctuation cancellation in low-power A/D converters. 762-769 - Takeshi Hamamoto, Masaki Tsukude, Kazutami Arimoto, Yasuhiro Konishi, Takayuki Miyamoto, Hideyuki Ozaki, Michihiro Yamada:
400-MHz random column operating SDRAM techniques with self-skew compensation. 770-778 - Kyu-Chan Lee, Changhyun Kim, Hongil Yoon, Keum-Yong Kim, Byung-Sik Moon, Sang-Bo Lee, Jung-Hwa Lee, Nam-Jong Kim, Soo-In Cho:
A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme. 779-786 - Daisaburo Takashima, Iwao Kunishima:
High-density chain ferroelectric random access memory (chain FRAM). 787-792 - Shoichiro Kawashima, Toshihiko Mori, Ryuhei Sasagawa, Makoto Hamaminato, Shigetoshi Wakayama, Kazuo Sukegawa, Isao Fukushi:
A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's. 793-799 - Kazushige Ayukawa, Takao Watanabe, Susumu Narita:
An access-sequence control scheme to enhance random-access performance of embedded DRAM's. 800-806 - Hiroshi Kawaguchi
, Takayasu Sakurai:
A reduced clock-swing flip-flop (RCSFF) for 63% power reduction. 807-811 - Hiroshi Komurasaki, Hisayasu Sato, Nagisa Sasaki, Takahiro Miki:
A 2-V 1.9-GHz Si down-conversion mixer with an LC phase shifter. 812-815 - Kyeongho Lee, Yeshik Shin, Sungjoon Kim, Deog-Kyoon Jeong, Gyudong Kim, Bruce Kim, Victor Da Costa:
1.04 GBd low EMI digital video interface system using small swing serial link technique. 816-823
Volume 33, Number 6, June 1998
- Christoph Kuratli, Qiuting Huang:
A fully integrated self-calibrating transmitter/receive IC for an ultrasound presence detector microsystem. 832-841 - Fernando Pardo, Bart Dierickx
, Danny Scheffer:
Space-variant nonorthogonal structure CMOS image sensor design. 842-849 - Mehran Aliahmad, C. André T. Salama:
Integration of a short-loop SLIC in a low-voltage submicron BiCMOS technology. 850-858 - Shuo-Yuan Hsiao, Chung-Yu Wu:
A parallel structure for CMOS four-quadrant analog multipliers and its application to a 2-GHz RF downconversion mixer. 859-869 - Kevin W. Kobayashi, Aaron K. Oki, Donald K. Umemoto, Tomas Ray Block, Dwight C. Streit:
A novel self-oscillating HEMT-HBT cascode VCO-mixer using an active tunable inductor. 870-876 - Alan L. L. Pun, Tony Yeung, Jack Lau, François J. R. Clément, David K. Su:
Substrate noise coupling through planar spiral inductor. 877-884 - Eleonora Franchi, Nicolò Manaresi, Riccardo Rovatti
, Alberto Bellini
, Giorgio Baccarani
:
Analog synthesis of nonlinear functions based on fuzzy logic. 885-895 - Hervé Mathias, Josette Berger-Toussan, Gilles Jacquemod, Frédéric Gaffiot, Michel Le Helley:
FLAG: a flexible layout generator for analog MOS transistors. 896-903 - Kyung-Wook Shin, Bang-Sup Song, Kantilal Bacrania:
A 200-MHz complex number multiplier using redundant binary arithmetic. 904-909 - Gab Joong Jeong, Moon Key Lee:
Design of a scalable pipelined RAM system. 910-914 - Fan You, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
Low-voltage class AB buffers with quiescent current control. 915-920 - Yoonjong Huh, Yungkwon Sung, Sung-Mo Kang:
A study of hot-carrier-induced mismatch drift: a reliability issue for VLSI circuits. 921-927 - Ali Hajimiri, Thomas H. Lee:
Corrections to "A General Theory of Phase Noise in Electrical Oscillators". 928 - Kevin J. McGee:
Comments on "A 64-point Fourier transform chip for video motion compensation using phase correlation". 928-932
Volume 33, Number 7, July 1998
- Alain Guyot, Bram Nauta:
Guest Editorial. 935-936 - Qiuting Huang, Michael Oberle:
A 0.5-mW passive telemetry IC for biomedical applications. 937-946 - Tonny A. F. Duisters, Eise Carel Dijkmans:
A -90-dB THD rail-to-rail input opamp using a new local charge pump in CMOS. 947-955 - Gerrit W. den Besten, Bram Nauta
:
Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC's in 3.3 V CMOS technology. 956-962 - Patrick J. Quinn:
High-accuracy charge-redistribution SC video bandpass filter in standard CMOS. 963-975