default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDIEEE Journal of Solid-State Circuits, Volume 58
Volume 58, Number 1, January 2023
- Masum Hossain, Arijit Raychowdhury, Sanu K. Mathew, Yakun Sophia Shao, Yih Wang:
Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC). 3-7 - Ahmad Khairi, Yoel Krupnik
, Amir Laufer, Yoav Segal, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Idan Lotan, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky Grafi, Udi Virobnik, Dror Lazar, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Frank O'Mahony, Ariel Cohen:
A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels. 8-18 - Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, Yandong He, Song Jia, Congcong Chen, Jiaqi Yu:
A 2.29-pJ/b 112-Gb/s Wireline Transceiver With RX Four-Tap FFE for Medium-Reach Applications in 28-nm CMOS. 19-29 - Arian Hashemi Talkhooncheh, Weiwei Zhang, Minwo Wang, David J. Thomson, Martin Ebert, Ke Li, Graham T. Reed, Azita Emami:
A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators. 30-44 - Kai Sheng, Haowei Niu, Boyang Zhang, Weixin Gai, Bingyi Ye, Hang Zhou, Congcong Chen:
A 4.6-pJ/b 200-Gb/s Analog DP-QPSK Coherent Optical Receiver in 28-nm CMOS. 45-56 - Yu Zhao, Onur Memioglu, Long Kong, Behzad Razavi:
A 56-GHz Fractional-N PLL With 110-fs Jitter. 57-67 - Chi-Hsiang Huang, Arindam Mandal, Diego Peña-Colaiocco, Edevaldo Pereira Da Silva, Visvesh S. Sathe:
Regenerative Breaking: Optimal Energy Recycling for Energy Minimization in Duty-Cycled Domains. 68-77 - Suneui Park, Seyeon Yoo, Yuhwan Shin, Jeonghyun Lee, Jaehyouk Choi:
A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68. 78-89 - Jae-Gon Lee, Younsik Choi, Hoyeon Jeon, Jong-Jin Lee, Dongsuk Shin:
Fully Automated Hardware-Driven Clock-Gating Architecture With Complete Clock Coverage for 4 nm Exynos Mobile SOC. 90-101 - Brian T. Vanderpool, Phillip J. Restle, Eric Fluhr, Gregory S. Still, Francesco A. Campisano, Ian Charmichael, Eric Marz, Rahul Batra, Richard L. Willaman:
Deterministic Frequency and Voltage Enhancements on the POWER10 Processor. 102-110 - Sumeet Singh Nagi, Uneeb Rathore, Krutikesh Sahoo, Tim Ling, Subramanian S. Iyer, Dejan Markovic:
A 16-nm 784-Core Digital Signal Processor Array, Assembled as a 2 × 2 Dielet With 10-μm Pitch Interdielet I/O for Runtime Multiprogram Reconfiguration. 111-123 - Yihong Zhu, Wenping Zhu, Chongyang Li, Min Zhu, Chenchen Deng, Chen Chen, Shuying Yin, Shouyi Yin, Shaojun Wei, Leibo Liu:
RePQC: A 3.4-uJ/Op 48-kOPS Post-Quantum Crypto-Processor for Multiple-Mathematical Problems. 124-140 - Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan:
A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures. 141-154 - Ji-Soo Chang, Eunsang Jang, Youngkil Choi, Moonkyu Song, Sanghyo Lee, Gi-Jin Kang, Junho Kim, Uijong Song, Chang-Yeon Cho, Giyeong Ko, Hyunseok Hwang, Junseo Lee, Han-Sol Lee, Yong-Il Kwon, Kyungduck Seo, Taeseon Kim, Hyun-Wook Lim, Seongwook Song, Jae-Youl Lee, Sung-Ung Kwak:
A 1.05-A/m Minimum Magnetic Field Strength Single-Chip, Fully Integrated Biometric Smart Card SoC Achieving 792.5-ms Transaction Time With Anti-Spoofing Fingerprint Authentication. 155-166 - Yi-Yen Hsieh, Yu-Cheng Lin, Chia-Hsiang Yang:
A 96.2-nJ/class Neural Signal Processor With Adaptable Intelligence for Seizure Prediction. 167-176 - Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo:
DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC. 177-188 - Jun-Seok Park, Changsoo Park, Suknam Kwon, Taeho Jeon, Yesung Kang, Heonsoo Lee, Dongwoo Lee, James Kim, Hyeong-Seok Kim, YoungJong Lee, Sangkyu Park, MinSeong Kim, Sanghyuck Ha, Jihoon Bang, Jinpyo Park, Sukhwan Lim, Inyup Kang:
A Multi-Mode 8k-MAC HW-Utilization-Aware Neural Processing Unit With a Unified Multi-Precision Datapath in 4-nm Flagship Mobile SoC. 189-202 - Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst:
DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. 203-215 - Yuhao Ju, Jie Gu:
A Systolic Neural CPU Processor Combining Deep Learning and General-Purpose Computing With Enhanced Data Locality and End-to-End Performance. 216-226 - Yang Wang, Yubin Qin, Dazheng Deng, Jingchuan Wei, Yang Zhou, Yuanqi Fan, Tianbao Chen, Hao Sun, Leibo Liu, Shaojun Wei, Shouyi Yin:
An Energy-Efficient Transformer Processor Exploiting Dynamic Weak Relevances in Global Attention. 227-242 - Fengbin Tu, Yiqi Wang, Zihan Wu, Ling Liang, Yufei Ding, Bongjin Kim, Leibo Liu, Shaojun Wei, Yuan Xie, Shouyi Yin:
ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration. 243-255 - Myeong-Jae Park, Jinhyung Lee, Kyungjun Cho, Ji Hwan Park, Junil Moon, Sung-Hak Lee, Tae-Kyun Kim, Sanghoon Oh, Seokwoo Choi, Yongsuk Choi, Ho Sung Cho, Tae-Sik Yun, Young Jun Koo, Jae-Seung Lee, Byung Kuk Yoon, Young Jun Park, Sangmuk Oh, Chang Kwon Lee, Seong-Hee Lee, Hyun-Woo Kim, Yucheon Ju, Seung-Kyun Lim, Kyo Yun Lee, Sang-Hoon Lee, Woo Sung We, Seungchan Kim, Seung Min Yang, Keonho Lee, In-Keun Kim, Younghyun Jeon, Jae-Hyung Park, Jong Chan Yun, Seonyeol Kim, Dong-Yeol Lee, Su-Hyun Oh, Junghyun Shin, Yeonho Lee, Jieun Jang, Joohwan Cho:
A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization. 256-269 - Yeonwook Jung, Seongseop Lee, Hyojun Kim, SeongHwan Cho:
A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM. 270-278 - Daewoong Lee, Jaehyeok Baek, Hye-Jung Kwon, Daehyun Kwon, Chulhee Cho, Sang-Hoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, Hyoung-Joo Kim, Ho-Seok Seol, Juhwan Kim, Jung-Bum Shin, Gil-Young Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, Chan-Yong Lee, Seungseob Lee, TaeHoon Park, Chi-Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, Jung-Hwan Choi, Jooyoung Lee:
A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ. 279-290 - Dae-Han Kwon, Seongju Lee, Kyuyoung Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dongyoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Guhyun Kim, Byeongju An, Jaewook Lee, Donguc Ko, Younggun Jun, Ilwoong Kim, Choungki Song, Ilkon Kim, Chanwook Park, Seho Kim, Chunseok Jeong, Euicheol Lim, Dongkyun Kim, Jieun Jang, Il Park, Junhyun Chun, Joohwan Cho:
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application. 291-302 - Je-Min Hung, Tai-Hao Wen, Yen-Hsiang Huang, Sheng-Po Huang, Fu-Chun Chang, Chin-I Su, Win-San Khwa, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices. 303-315 - Jonghak Yuh, Yen-Lung Jason Li, Heguang Li, Yoshihiro Oyama, Cynthia Hsu, Pradeep Anantula, Gwang Yeong Stanley Jeong, Anirudh Amarnath, Siddhesh Darne, Sneha Bhatia, Tianyu Tang, Aditya Arya, Naman Rastogi, Naoki Ookuma, Hiroyuki Mizukoshi, Alex Yap, Demin Wang, Steve Kim, Yonggang Wu, Min Peng, Jason Lu, Tommy Ip, Seema Malhotra, Taekeun Han, Masatoshi Okumura, Jiwen Liu, Jeongduk John Sohn, Hardwell Chibvongodze, Muralikrishna Balaga, Akihiro Matsuda, Chen Chen, Indra K. V, V. S. N. K. Chaitanya G., Venky Ramachandra, Yosuke Kato, Ravi Kumar, Huijuan Wang, Farookh Moogat, In-Soo Yoon, Kazushige Kanda, Takahiro Shimizu, Noboru Shibata, Kosuke Yanagidaira, Takuyo Kodama, Ryo Fukuda, Yasuhiro Hirashima, Mitsuhiro Abe:
A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface. 316-328
Volume 58, Number 2, February 2023
- Dennis Sylvester:
New Associate Editor. 331 - Jiayang Yu, Jixin Chen, Peigen Zhou, Huanbo Li, Zuojun Wang, Zekun Li, Zhe Chen, Pinpin Yan, Debin Hou, Hao Gao, Wei Hong:
A 211-to-263-GHz Dual-LC-Tank-Based Broadband Power Amplifier With 14.7-dBm PSAT and 16.4-dB Peak Gain in 130-nm SiGe BiCMOS. 332-344 - Ziyang Luo, Jin Liu, Hoi Lee:
A 40.68-MHz Active Rectifier With Cycle-Based On-/Off-Delay Compensation for High-Current Biomedical Implants. 345-356 - Bingzheng Yang, Huizhen Jenny Qian, Tianyi Wang, Xun Luo:
A CMOS Wideband Watt-Level 4096-QAM Digital Power Amplifier Using Reconfigurable Power-Combining Transformer. 357-370 - Haikun Jia, Pingda Guan, Wei Deng, Zhihua Wang, Baoyong Chi:
A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS. 371-385 - Ruixing He, Yahya M. Tousi:
A mm-Wave Signal Generation and Background Phase Alignment Technique for Scalable Arrays. 386-399 - Minjae Kim, Hyun-Su Lee, Jisan Ahn, Hyung-Min Lee:
A 13.56-MHz Wireless Power and Data Transfer System With Current-Modulated Energy-Reuse Back Telemetry and Energy-Adaptive Voltage Regulation. 400-410 - Wei Deng, Zipeng Chen, Haikun Jia, Pingda Guan, Taikun Ma, Angxiao Yan, Shiyan Sun, Xiangrong Huang, Guopei Chen, Ruichang Ma, Shengnan Dong, Luqiang Duan, Zhihua Wang, Baoyong Chi:
A D-Band Joint Radar-Communication CMOS Transceiver. 411-427 - Shusuke Kawai, Takeshi Ueno, Hiroki Ishikuro, Kohei Onizuka:
An Active Slew Rate Control Gate Driver IC With Robust Discrete-Time Feedback Technique for 600-V Superjunction MOSFETs. 428-438 - Daniel Wendler, Daniel De Dorigo, Mohammad Amayreh, Alexander Bleitner, Maximilian Marx, Roman Willaredt, Yiannos Manoli:
A 0.0046-mm2 Two-Step Incremental Delta-Sigma Analog-to-Digital Converter Neuronal Recording Front End With 120-mVpp Offset Compensation. 439-450 - Xiudeng Wang, Yinshui Xia, Zhangming Zhu, Ge Shi, Huakang Xia, Yidie Ye, Zhidong Chen, Libo Qian, Lianxi Liu:
Configurable Hybrid Energy Synchronous Extraction Interface With Serial Stack Resonance for Multi-Source Energy Harvesting. 451-461 - Chunxiao Hu, Yun Yin, Tong Li, Yangzi Liu, Liang Xiong, Hongtao Xu:
A Fully-Integrated Wideband Digital Polar Transmitter With 11-bit Digital-to-Phase Converter in 40nm CMOS. 462-473 - Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A 60-MS/s 5-MHz BW Noise-Shaping SAR ADC With Integrated Input Buffer Achieving 84.2-dB SNDR and 97.3-dB SFDR Using Dynamic Level-Shifting and ISI-Error Correction. 474-485 - Bo-Hao Chen, Tzu-Ying Wu, Kuo-Lin Zheng, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple. 486-496 - Yong-Hwa Wen, Tz-Wun Wang, Tzu-Hsien Yang, Sheng-Hsi Hung, Kuo-Lin Zheng, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A -10 to -20-V Inverting Buck-Boost Drive GaN Driver With Sub-1-μA Leakage Current Vth Tracking Technique for 20-MHz Depletion-Mode GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors. 497-507 - Nahmil Koo, Hyojun Kim, SeongHwan Cho:
A 43.3-μW Biopotential Amplifier With Tolerance to Common-Mode Interference of 18 Vpp and T-CMRR of 105 dB in 180-nm CMOS. 508-519 - Hsueh-Yen Shen, Yu-Chi Lee, Tzu-Wei Tong, Chia-Hsiang Yang:
A 40-nm 91-mW, 90-fps Learning-Based Full HD Super-Resolution Accelerator. 520-529 - Yuncheng Lu, Van Loi Le, Tony Tae-Hyoung Kim:
A 184-μW Error-Tolerant Real-Time Hand Gesture Recognition System With Hybrid Tiny Classifiers Utilizing Edge CNN. 530-542 - Junjie Mu, Bongjin Kim:
A Dynamic-Precision Bit-Serial Computing Hardware Accelerator for Solving Partial Differential Equations Using Finite Difference Method. 543-553 - Sumon Kumar Bose, Arindam Basu:
A 389 TOPS/W, Always ON Region Proposal Integrated Circuit Using In-Memory Computing in 65 nm CMOS. 554-568 - Thierry Tambe, En-Yu Yang, Glenn G. Ko, Yuji Chai, Coleman Hooper, Marco Donato, Paul N. Whatmough, Alexander M. Rush, David Brooks, Gu-Yeon Wei:
A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs. 569-581
Volume 58, Number 3, March 2023
- Farhana Sheikh, Yan Lu:
Guest Editorial 2022 Custom Integrated Circuits Conference. 587-588 - Xueyong Zhang, Arindam Basu:
A 915-1220 TOPS/W, 976-1301 GOPS Hybrid In-Memory Computing Based Always-On Image Processing for Neuromorphic Vision Sensors. 589-599 - Jaehoon Heo, Junsoo Kim, Sukbin Lim, Wontak Han, Joo-Young Kim:
T-PIM: An Energy-Efficient Processing-in-Memory Accelerator for End-to-End On-Device Training. 600-613 - Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo:
An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache. 614-623 - Xiaofeng Guo, Run Chen, Zhenqi Chen, Bin Li:
A 13b 600-675MS/s Tri-State Pipelined-SAR ADC With Inverter-Based Open-Loop Residue Amplifier. 624-633 - Francesco Buccoleri, Simone Mattia Dartizio, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner. 634-646 - Zhixian Deng, Changxuan Han, Yifan Li, Huizhen Jenny Qian, Xun Luo:
A 23-40-GHz Phased-Array Receiver Using 14-Bit Phase-Gain Manager and Wideband Noise-Canceling LNA. 647-661 - Yuanming Zhu, Julian Camilo Gomez Diaz, Srujan Kumar Kaile, Il-Min Yi, Tong Liu, Sebastian Hoyos, Samuel Palermo:
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET. 662-676 - Mohammadreza Beikmirza, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi:
A Wideband Energy-Efficient Multi-Mode CMOS Digital Transmitter. 677-690 - Bingzheng Yang, Huizhen Jenny Qian, Jie Zhou, Yiyang Shu, Xun Luo:
Millimeter-Wave Quadrature Mixed-Mode Transmitter With Distributed Parasitic Canceling and LO Leakage Self-Suppression. 691-704 - Tianshi Xie, Jianglin Zhu, Dragan Maksimovic, Hanh-Phuc Le:
A Highly Integrated Hybrid DC-DC Converter With nH-Scale IPD Inductors. 705-719 - Donghee Cho, Hyungjoo Cho, Sein Oh, Yoontae Jung, Sohmyung Ha, Chul Kim, Minkyu Je:
A High-Efficiency Single-Mode Dual-Path Buck-Boost Converter With Reduced Inductor Current. 720-731 - Tuur Van Daele, Filip Tavernier:
Fully Integrating a 400 V-to-12 V DC-DC Converter in High-Voltage CMOS. 732-741 - Sandeep Reddy Kukunuru, Yashar Naeimi, Loai G. Salem:
A Series-Parallel Switched-Photovoltaic DC-DC Converter. 742-756 - Shenglong Zhuo, Tao Xia, Lei Zhao, Miao Sun, Yifan Wu, Lei Wang, Hengwei Yu, Jiqing Xu, Jier Wang, Zhihong Lin, Yuan Li, Lei Qiu, Rui Bai, Xuefeng Chen, Patrick Yin Chiang:
Solid-State dToF LiDAR System Using an Eight-Channel Addressable, 20-W/Ch Transmitter, and a 128 × 128 SPAD Receiver With SNR-Based Pixel Binning and Resolution Upscaling. 757-770 - Dhruv Patel, Alireza Sharif Bakhtiar, Tony Chan Carusone:
A 112-Gb/s - 8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes. 771-784 - Yongxin Li, Nilanjan Pal, Tianyu Wang, Mostafa Gamal Ahmed, Ahmed E. AbdelRahman, Mohamed Badr Younis, Kyu-Sang Park, Ruhao Xia, Pavan Kumar Hanumolu:
A 20-μs Turn-On Time, 24-kHz Resolution, 1.5-100-MHz Digitally Programmable Temperature-Compensated Clock Generator. 785-795 - Tianxiang Qu, Qinjing Pan, Liheng Liu, Xiaoyang Zeng, Zhiliang Hong, Jiawei Xu:
A 1.8-GΩ Input-Impedance 0.15-μV Input-Referred-Ripple Chopper Amplifier With Local Positive Feedback and SAR-Assisted Ripple Reduction. 796-805 - Zhi-Heng Kang, Shen-Iuan Liu:
A 1.6-GHz DPLL Using Feedforward Phase-Error Cancellation. 806-816 - Soo-Hun Kim, Seong-Min Ko, Dong-Woo Jee:
A Pixelated Monolithic CMOS PPG Sensor for Spatial Feature Acquisition. 817-826 - Yongtae Lee, Byeonghwa Cho, Changuk Lee, Jongbaeg Kim, Youngcheol Chae:
A 0.5-ms 47.5-nJ Resistor-to-Digital Converter for Resistive BTEX Sensor Achieving 0.1-to-5 ppb Resolution. 827-837 - Qijun Liu, Miguel Jimenez, Maria Eugenia Inda, Arslan Riaz, Timur Zirtiloglu, Anantha P. Chandrakasan, Timothy K. Lu, Giovanni Traverso, Phillip M. Nadeau, Rabia Tugce Yazicigil:
A Threshold-Based Bioluminescence Detector With a CMOS-Integrated Photodiode Array in 65 nm for a Multi-Diagnostic Ingestible Capsule. 838-851 - Ruiqi Guo, Zhiheng Yue, Xin Si, Hao Li, Te Hu, Limei Tang, Yabing Wang, Hao Sun, Leibo Liu, Meng-Fan Chang, Qiang Li, Shaojun Wei, Shouyi Yin:
TT@CIM: A Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity Optimization and Variable Precision Quantization. 852-866 - Weiwei Shan, Junyi Qian, Lixuan Zhu, Jun Yang, Cheng Huang, Hao Cai:
AAD-KWS: A Sub-μ W Keyword Spotting Chip With an Acoustic Activity Detector Embedded in MFCC and a Tunable Detection Window in 28-nm CMOS. 867-876 - Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, Ta-Wei Liu, Pei-Jung Lu, Ping-Chun Wu, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Tianlong Pan, Chuan-Jia Jhang, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Xin Si, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips. 877-892
Volume 58, Number 4, April 2023
- Dennis Sylvester:
New Associate Editor. 895 - Dennis Sylvester:
New Associate Editor. 896 - Borivoje Nikolic, Mototsugu Hamada:
Guest Editorial Introduction to the Special Issue on the 2022 Symposium on VLSI Circuits. 897-900 - Zheng Li, Jian Pang, Yi Zhang, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Yun Wang, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Jeehoon Park, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada:
A 39-GHz CMOS Bidirectional Doherty Phased- Array Beamformer Using Shared-LUT DPD With Inter-Element Mismatch Compensation Technique for 5G Base Station. 901-914 - Yimai Peng, Gordy Carichner, Yejoong Kim, Li-Yu Chen, Rémy Tribhout, Benoît Piranda, Julien Bourgeois, David T. Blaauw, Dennis Sylvester:
A High-Voltage Generator and Multiplexer for Electrostatic Actuation in Programmable Matter. 915-928 - Seungjong Lee, Taewook Kang, Seungheun Song, Kyumin Kwon, Michael P. Flynn:
An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer. 929-938 - Hanyue Li, Yuting Shen, Eugenio Cantatore, Pieter Harpe:
A 77.3-dB SNDR 62.5-kHz Bandwidth Continuous-Time Noise-Shaping SAR ADC With Duty-Cycled Gm-C Integrator. 939-948 - Xiaolin Yang, Marco Ballini, Chutham Sawigun, Wen-Yang Hsu, Jan-Willem Weijers, Jan Putzeys, Carolina Mora Lopez:
An AC-Coupled 1st-Order Δ-ΔΣ Readout IC for Area-Efficient Neural Signal Acquisition. 949-960 - Hyunchul Yoon, Changuk Lee, Taewoong Kim, Yigi Kwon, Youngcheol Chae:
A 65-dB-SNDR Pipelined SAR ADC Using PVT-Robust Capacitively Degenerated Dynamic Amplifier. 961-971 - Amy Whitcombe, Chun C. Lee, Asma Kuriparambil Thekkumpate, Somnath Kundu, Jaykant Timbadiya, Abhishek Agrawal, Brent R. Carlton, Peter Sagazio, Stefano Pellerano, Christopher D. Hull:
A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW. 972-982 - Kunihiro Hatakeyama, Yu Okubo, Tomohiro Nakagome, Masahiro Makino, Hiroshi Takashima, Takahiro Akutsu, Takehide Sawamoto, Masanori Nagase, Tatsuo Noguchi, Shoji Kawahito:
A Hybrid ToF Image Sensor for Long-Range 3D Depth Measurement Under High Ambient Light Conditions. 983-992 - Wei-Jhih Jian, Wei-Zen Chen:
A Reference-Free Phase Noise Measurement Circuit Achieving 24.2-fs Periodic Jitter Sensitivity and 275-fsrms Resolution With Background Self-Calibration. 993-1001 - Minxiang Gong, Hua Chen, Xin Zhang, Rinkle Jain, Arijit Raychowdhury:
A 90.4% Peak Efficiency 48-to-1-V GaN/Si Hybrid Converter With Three-Level Hybrid Dickson Topology and Gradient Descent Run-Time Optimizer. 1002-1014 - Luya Zhang, Ali M. Niknejad:
GalEPR: A Galvanically Coupled Electron Paramagnetic Resonance Spectrometer for Deep Tissue Hypoxia Diagnosis. 1015-1024 - Subhajit Ray, Peter R. Kinget:
Ultra-Low-Power and Compact-Area Analog Audio Feature Extraction Based on Time-Mode Analog Filterbank Interpolation and Time-Mode Analog Rectification. 1025-1036 - Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Dan Lake, Brent R. Carlton:
A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference. 1037-1050 - Yesin Ryu, Sung-Gi Ahn, Jaehoon Lee, Jaewon Park, Yong-Ki Kim, Hyochang Kim, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Sukhan Lee, Kyounghwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong, Sunghwan Jo, Dajung Cho, Sooyoung Kim, Minsu Lee, Hyunho Kim, Minhwan Kim, Jae San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young-Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee:
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features. 1051-1061 - Yoshinori Nishi, John W. Poulton, Walker J. Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray:
A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS. 1062-1073 - Timothy O. Dickson, Zeynep Toprak Deniz, Martin Cochet, Troy J. Beukema, Marcel A. Kossel, Thomas Morf, Young-Ho Choi, Pier Andrea Francese, Matthias Brändli, Christian W. Baks, Jonathan E. Proesel, John F. Bulzacchelli, Michael P. Beakes, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel J. Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin:
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links. 1074-1086 - Yusung Kim, Clifford Ong, Anandkumar Mahadevan Pillai, Harish Jagadeesh, Gwanghyeon Baek, Iqbal Rajwani, Zheng Guo, Eric Karl:
Energy-Efficient High Bandwidth 6T SRAM Design on Intel 4 CMOS Technology. 1087-1093 - Yuwei Qin, Ruben Purdy, Alec Probst, Ching-Yi Lin, Jian-Gang Jimmy Zhu:
Non-Linear CNN-Based Read Channel for Hard Disk Drive With 30% Error Rate Reduction and Sequential 200-Mbits/s Throughput in 28-nm CMOS. 1094-1105 - Raghavan Kumar, Vikram B. Suresh, Sachin Taneja, Mark A. Anders, Steven Hsu, Amit Agarwal, Vivek De, Sanu K. Mathew:
A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS. 1106-1116 - Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy:
An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS. 1117-1128 - Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany:
A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm. 1129-1141 - Jinseok Park, Seungchan Lee, Jonghoon Chun, Laurence Jeon, Songcheol Hong:
A 28-GHz Four-Channel Beamforming Front-End IC With Dual-Vector Variable Gain Phase Shifters for 64-Element Phased Array Antenna Module. 1142-1159 - Junyao Tang, Lei Zhao, Cheng Huang:
A Wireless Hysteretic Controlled Wireless Power Transfer System With Enhanced Efficiency and Dynamic Response for Bioimplants. 1160-1171 - Zhaowen Wang, Peter R. Kinget:
A Very High Linearity Twin Phase Interpolator With a Low-Noise and Wideband Delta Quadrature DLL for High-Speed Data Link Clocking. 1172-1184 - Duhyun Jeon, Dongmin Lee, Dong Kyue Kim, Byong-Deok Choi:
A 325F2 Physical Unclonable Function Based on Contact Failure Probability With Bit Error Rate < 0.43 ppm After Preselection With 0.0177% Discard Ratio. 1185-1196
Volume 58, Number 5, May 2023
- Hossein Hashemi, Qun Jane Gu:
Guest Editorial 2022 Radio Frequency Integrated Circuits Symposium. 1199-1200 - Ce Yang, Shiyu Su, Mike Shuo-Wei Chen:
Millimeter-Wave Receiver With Non-Uniform Time-Approximation Filter. 1201-1211 - Samir Nooshabadi, Parham Porsandeh Khial, Austin Fikes, Ali Hajimiri:
A 28-GHz, Multi-Beam, Decentralized Relay Array. 1212-1227 - Tzu-Yuan Huang, Boce Lin, Naga Sasikanth Mannem, Basem Abdelaziz Abdelmagid, Hua Wang:
A Time-Modulated Concurrent Steerable Multibeam MIMO Receiver Array With Spectral-Spatial Mapping Using One Beamformer and Single-Wire Interface. 1228-1240 - Hongxin Tang, Huizhen Jenny Qian, Bingzheng Yang, Xun Luo:
A Self-Calibration SCPA With Storage Capacitor Array Supporting 64-/256-/1024-QAM. 1241-1255 - Xiaohan Zhang, Sensen Li, Daquan Huang, Taiyun Chi:
A Millimeter-Wave Three-Way Doherty Power Amplifier for 5G NR OFDM. 1256-1270 - Kyumin Kwon, Omar A. B. Abdelatty, David D. Wentzloff:
PLL Fractional Spur's Impact on FSK Spectrum and a Synthesizable ADPLL for a Bluetooth Transmitter. 1271-1284 - Renzhi Liu, K. T. Asma Beevi, Richard Dorrance, Timothy F. Cox, Rinkle Jain, Tolga Acikalin, Zhen Zhou, Tae-Young Yang, Johanny Escobar-Pelaez, Shuhei Yamada, Kenneth P. Foust, Brent R. Carlton:
A 2-Gb/s UWB Transceiver for Short-Range Reconfigurable FDD Wireless Networks. 1285-1298 - Feng Qiu, Haoshen Zhu, Wenquan Che, Quan Xue:
A K-Band Full 360° Phase Shifter Using Novel Non-Orthogonal Vector Summing Method. 1299-1309 - Alper Karakuzulu, Wael Abdullah Ahmad, Dietmar Kissinger, Andrea Malignaggi:
A Four-Channel Bidirectional D-Band Phased-Array Transceiver for 200 Gb/s 6G Wireless Communications in a 130-nm BiCMOS Technology. 1310-1322 - Hany Abolmagd, Raghav Subbaraman, Omid Esmaeeli, Yeswanth Guntupalli, Ahmad Sharkia, Dinesh Bharadia, Sudip Shekhar:
A Hierarchical Self-Interference Canceller for Full-Duplex LPWAN Applications Achieving 52-70-dB RF Cancellation. 1323-1336 - Kai Tang, Chuanshi Yang, Yanshu Guo, Nan Wang, Yao Zhu, Ying Zhang, Eldwin Jiaqiang Ng, Joshua En-Yuan Lee, Zhongyuan Fang, Wensong Wang, Hanjun Jiang, Chun-Huat Heng, Yuanjin Zheng:
A 107 pJ/b TX 260 pJ/b RX Ultralow-Power MEMS-Based Transceiver With Wake-Up in ISM-Bands for IoT Applications. 1337-1349 - Tuomo Talala, Eetu Parkkinen, Ilkka Nissinen:
CMOS SPAD Line Sensor With Fine-Tunable Parallel Connected Time-to-Digital Converters for Raman Spectroscopy. 1350-1361 - Jiang Gong, Edoardo Charbon, Fabio Sebastiano, Masoud Babaie:
A Cryo-CMOS PLL for Quantum Computing Applications. 1362-1375 - Sajjad Moazeni, Kevin Renehan, Eric H. Pollmann, Kenneth L. Shepard:
An Integrated-Circuit Node for High-Spatiotemporal Resolution Time-Domain Near-Infrared Diffuse Optical Tomography Imaging Arrays. 1376-1385 - Mohamed Megahed, Tejasvi Anand:
A Sub-μW Energy Harvester Architecture With Reduced Top/Bottom Plate Switching Loss Achieving 80.66% Peak Efficiency in 180-nm CMOS. 1386-1399 - Min-Woo Ko, Hyunki Han, Hyun-Sik Kim:
A Bipolar-Output Switched-Capacitor DC-DC Boost Converter With Residual-Energy-Recycling Regulation and Low Dropout Post-Filtering Techniques. 1400-1413 - Woosong Jung, Kwangho Lee, Kwanseo Park, Haram Ju, Jinhyung Lee, Deog-Kyoon Jeong:
A 48 Gb/s PAM-4 Receiver With Pre-Cursor Adjustable Baud-Rate Phase Detector in 40 nm CMOS. 1414-1424 - Koen Goetschalckx, Fengfeng Wu, Marian Verhelst:
DepFiN: A 12-nm Depth-First, High-Resolution CNN Processor for IO-Efficient Inference. 1425-1435 - Bo Zhang, Shihui Yin, Minkyu Kim, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-Sun Seo, Mingoo Seok:
PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference. 1436-1449 - Xiangxing Yang, Keren Zhu, Xiyuan Tang, Meizhi Wang, Mingtao Zhan, Nanshu Lu, Jaydeep P. Kulkarni, David Z. Pan, Yongpan Liu, Nan Sun:
An In-Memory-Computing Charge-Domain Ternary CNN Classifier. 1450-1461 - Zhengguo Shen, Weiwei Shan, Yuxuan Du, Ziyu Li, Jun Yang:
Beyond Eliminating Timing Margin: An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator Without Accuracy Loss. 1462-1471 - Zhiting Lin, Zhongzhen Tong, Fangming Wang, Jin Zhang, Yue Zhao, Peng Sun, Tian Xu, Cheng Zhang, Xingwei Li, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Junning Chen:
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. 1472-1486 - Chun-Yen Yao, Tsung-Yen Wu, Han-Chung Liang, Yu-Kai Chen, Tsung-Te Liu:
A Fully Bit-Flexible Computation in Memory Macro Using Multi-Functional Computing Bit Cell and Embedded Input Sparsity Sensing. 1487-1495 - Gicheol Shin, Eunyoung Lee, Jongmin Lee, Yongmin Lee, Yoonmyung Lee:
A Differential Flip-Flop With Static Contention-Free Characteristics in 28 nm for Low-Voltage, Low-Power Applications. 1496-1504
Volume 58, Number 6, June 2023
- Dennis Sylvester:
New Associate Editor. 1507 - Stephen Weinreich, Boris Murmann:
A 0.6-1.8-mW 3.4-dB NF Mixer-First Receiver With an N-Path Harmonic-Rejection Transformer-Mixer. 1508-1518 - Paula Palacios, Mohamed Saeed, Renato Negra:
Design Considerations for a Low-Power Fully Integrated MMIC Parametric Upconverter in SiGe BiCMOS. 1519-1534 - David Joseph Munzer, Naga Sasikanth Mannem, Jeongseok Lee, Hua Wang:
Broadband mm-Wave Current/Voltage Sensing-Based VSWR-Resilient True Power/Impedance Sensor Supporting Single-Ended Antenna Interfaces. 1535-1551 - Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Morteza S. Alavi, Robert Bogdan Staszewski, Masoud Babaie:
A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit. 1552-1571 - Naga Sasikanth Mannem, Elham Erfani, Tzu-Yuan Huang, Hua Wang:
A mm-Wave Frequency Modulated Transmitter Array for Superior Resolution in Angular Localization Supporting Low-Latency Joint Communication and Sensing. 1572-1585 - Alican Çaglar, Steven Van Winckel, Steven Brebels, Piet Wambacq, Jan Craninckx:
Design and Analysis of a 4.2 mW 4 K 6-8 GHz CMOS LNA for Superconducting Qubit Readout. 1586-1596 - Yu Zhao, Mahdi Forghani, Behzad Razavi:
A 20-GHz PLL With 20.9-fs Random Jitter. 1597-1609 - Qian Chen, Chirn Chye Boon, Qing Liu, Yuan Liang:
A Single-Channel Voltage-Scalable 8-GS/s 8-b >37.5-dB SNDR Time-Domain ADC With Asynchronous Pipeline Successive Approximation in 28-nm CMOS. 1610-1622 - Amit Kumar Mishra, Yifei Li, Pawan Agarwal, Sudip Shekhar:
Improving Linearity in CMOS Phase Interpolators. 1623-1635 - Lingxin Meng, Yaopeng Hu, Yibo Zhao, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan:
A 1.2-V 2.87-μ W 94.0-dB SNDR Discrete-Time 2-0 MASH Delta-Sigma ADC. 1636-1645 - Yuyan Liu, Menglian Zhao, Yibo Zhao, Xiaopeng Yu, Nianxiong Nick Tan, Le Ye, Zhichao Tan:
A 4.96-μW 15-bit Self-Timed Dynamic-Amplifier-Based Incremental Zoom ADC. 1646-1656 - Sujin Park, Hyungil Chae, SeongHwan Cho:
A 3.68 aFrms Resolution Continuous-Time Bandpass Δ Σ Capacitance-to-Digital Converter for Full-CMOS Sensors in 0.18 μm CMOS. 1657-1666 - Keun-Mok Kim, Kyung-Sik Choi, Hyunki Jung, Byeonghun Yun, Jinglong Xu, Jinho Ko, Sang-Gug Lee:
A -124-dBm Sensitivity Interference-Resilient Direct-Conversion Duty-Cycled Wake-Up Receiver Achieving 0.114 mW at 1.966-s Wake-Up Latency. 1667-1680 - Xianbo Li, Hengbo Wang, Jianping Zhu, C. Patrick Yue:
Dual-Photodiode Differential Receivers Achieving Double Photodetection Area for Gigabit-Per-Second Optical Wireless Communication. 1681-1692 - Peng Guo, Zu-Yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Nico de Jong, Martin D. Verweij, Michiel A. P. Pertijs:
A Pitch-Matched Low-Noise Analog Front-End With Accurate Continuous Time-Gain Compensation for High-Density Ultrasound Transducer Arrays. 1693-1705 - Inho Park, Jinwoo Jeon, Hyunjin Kim, Taehyeong Park, Junwon Jeong, Chulwoo Kim:
A Thermoelectric Energy-Harvesting Interface With Dual-Conversion Reconfigurable DC-DC Converter and Instantaneous Linear Extrapolation MPPT Method. 1706-1718 - Panagiotis G. Zarkos, Sidney Buchbinder, Christos G. Adamopoulos, Sarika Madhvapathy, Olivia Hsu, Jake Whinnery, Pavan Bhargava, Vladimir Stojanovic:
Fully Integrated Electronic-Photonic Ultrasound Receiver Array for Endoscopic Applications in a Zero-Change 45-nm CMOS-SOI Process. 1719-1734 - Qinjing Pan, Tianxiang Qu, Biao Tang, Fei Shan, Zhiliang Hong, Jiawei Xu:
A 0.5-mΩ/√Hz Dry-Electrode Bioimpedance Interface With Current Mismatch Cancellation and Input Impedance of 100 MΩ at 50 kHz. 1735-1745 - Xianglong Bai, Yan Lu, Chenchang Zhan, Rui Paulo Martins:
A 6.78-MHz Wireless Power Transfer System With Inherent Wireless Phase Shift Control Without Feedback Data Sensing Coil. 1746-1757 - Guigang Cai, Yan Lu, Rui Paulo Martins:
An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current. 1758-1768 - Jonghyun Oh, Young-Ha Hwang, Jun-Eun Park, Mingoo Seok, Deog-Kyoon Jeong:
An Output-Capacitor-Free Synthesizable Digital LDO Using CMP-Triggered Oscillator and Droop Detector. 1769-1781 - Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. 1782-1797 - Fengbin Tu, Zihan Wu, Yiqi Wang, Ling Liang, Liu Liu, Yufei Ding, Leibo Liu, Shaojun Wei, Yuan Xie, Shouyi Yin:
TranCIM: Full-Digital Bitline-Transpose CIM-based Sparse Transformer Accelerator With Pipeline/Parallel Reconfigurable Modes. 1798-1809 - Sheng-Jung Yu, Yu-Chi Lee, Liang-Hsin Lin, Chia-Hsiang Yang:
An Energy-Efficient Double Ratchet Cryptographic Processor With Backward Secrecy for IoT Devices. 1810-1819
Volume 58, Number 7, July 2023
- Makoto Nagata, Massimo Alioto:
Guest Editorial IEEE 2022 European Solid-State Circuits Conference. 1823-1824 - Chao Chen, Dan Huang, Yan Zhao, Yuemin Jin, Jun Yang:
An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3. 1825-1837 - Daniel Krüger, Aoyang Zhang, Behdad Aghelnejad, Henry Hinton, Victor Marrugat Arnal, Yi-Qiao Song, Yiqiao Tang, Ka-Meng Lei, Jens Anders, Donhee Ham:
A Portable CMOS-Based Spin Resonance System for High-Resolution Spectroscopy and Imaging. 1838-1849 - Si-Yi Li, Sheng Cheng Lee, Sheng-Hsi Hung, Zheng-Lun Huang, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A 4-40 V Wide Input Range Boost Converter With the Protection Re-Cycling Technique for 200 W High Power LiDAR System in a Long-Distance Object Detection. 1850-1859 - Sehee Lim, Youngin Goh, Young Kyu Lee, Dong Han Ko, Junghyeon Hwang, Yeongseok Jeong, Hunbeom Shin, Sanghun Jeon, Seong-Ook Jung:
Dual-Mode Operations of Self-Rectifying Ferroelectric Tunnel Junction Crosspoint Array for High-Density Integration of IoT Devices. 1860-1870 - Adrian Kneip, Martin Lefebvre, Julien Verecken, David Bol:
IMPACT: A 1-to-4b 813-TOPS/W 22-nm FD-SOI Compute-in-Memory CNN Accelerator Featuring a 4.2-POPS/W 146-TOPS/mm2 CIM-SRAM With Multi-Bit Analog Batch-Normalization. 1871-1884 - Shreyas Kolala Venkataramanaiah, Jian Meng, Han-Sok Suh, Injune Yeo, Jyotishman Saikia, Sai Kiran Cherupally, Yichi Zhang, Zhiru Zhang, Jae-Sun Seo:
A 28-nm 8-bit Floating-Point Tensor Core-Based Programmable CNN Training Processor With Dynamic Structured Sparsity. 1885-1897 - Naga Sasikanth Mannem, Jeongsoo Park, Elham Erfani, Edward Liu, Jeongseok Lee, Hua Wang:
A Reconfigurable Phase-Time Array Transmitter Achieving Keyless Secured Transmission and Multi-Receiver Localization for Low-Latency Joint Communication and Sensing. 1898-1912 - Zekun Li, Jixin Chen, Huanbo Li, Jiayang Yu, Yuxiang Lu, Rui Zhou, Zhe Chen, Wei Hong:
A 220-GHz Sliding-IF Quadrature Transmitter and Receiver Chipset for High Data Rate Communication in 0.13-µm SiGe BiCMOS. 1913-1927 - Reza Ehsani Alashti, Shahabeddin Mohin, Fatemeh Tavana, Mehrdad Sharif Bakhtiar:
Digital to RF Wideband Multi-Standard Multi-Path Transmitter. 1928-1944 - Xi Chen, Yizhe Hu, Teerachot Siriburanon, Jianglin Du, Robert Bogdan Staszewski, Anding Zhu:
A 30-GHz Class-F Quadrature DCO Using Phase Shifts Between Drain-Gate-Source for Low Flicker Phase Noise and I/Q Exactness. 1945-1958 - Chao Li, Jinhua Guo, Pei Qin, Quan Xue:
A Wideband Mode-Switching Quad-Core VCO Using Compact Multi-Mode Magnetically Coupled LC Network. 1959-1972 - Sandeep Hari, Cody J. Ellington, Brian A. Floyd:
A Reflection-Mode N-Path Filter Tunable From 6 to 31 GHz. 1973-1986 - Alok Sethi, Rehman Akbar, Mikko Hietanen, Janne P. Aikio, Olli Kursu, Markku Jokinen, Marko E. Leinonen, Timo Rahkonen, Aarno Pärssinen:
Chip-to-Chip Interfaces for Large-Scale Highly Configurable mmWave Phased Arrays. 1987-2004 - Yoonjae Choi, Hyunsu Park, Jonghyuck Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Chulwoo Kim:
A 25-Gb/s Single-Ended PAM-4 Receiver With Time-Windowed LSB Decoder for High-Speed Memory Interfaces. 2005-2015 - Gerd Kiene, Ramon W. J. Overwater, Alessandro Catania, Aishwarya Gunaputi Sreenivasulu, Paolo Bruschi, Edoardo Charbon, Masoud Babaie, Fabio Sebastiano:
A 1-GS/s 6-8-b Cryo-CMOS SAR ADC for Quantum Computing. 2016-2027 - Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3 Field of View. 2028-2039 - Chan Sam Park, Hyunjoong Kim, Kwangmuk Lee, Dae Sik Keum, Dong Pyo Jang, Jae Joon Kim:
A Baseline-Tracking Single-Channel I/Q Impedance Plethysmogram IC for Neckband-Based Blood Pressure and Cardiovascular Monitoring. 2040-2052 - Zhuhao Li, Changgui Yang, Yunshan Zhang, Ting-Hsun Wang, Ziyi Chang, Boyu Zhu, Lin Zhou, Yuxuan Luo, Bin Su, Bo Zhao:
A 1 mm ×1 mm CGM System on Die Achieving 1.65-nA/mM In Vivo Resolution and 0-40-mM/L Detection Range With ΔΣ Backscatter Technique. 2053-2063 - Kyu-Sang Park, Amr Khashaba, Ahmed E. AbdelRahman, Yongxin Li, Tianyu Wang, Ruhao Xia, Nilanjan Pal, Pavan Kumar Hanumolu:
A 1-μW/MHz RC Oscillator With Three-Point Trimmed 2.1-ppm/°C and Single-Point Trimmed 8.7-ppm/°C Stability From40 °C to 95 °C. 2064-2074 - Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda:
A 7-nm FinFET 1.2-TB/s/mm2 3D-Stacked SRAM Module With 0.7-pJ/b Inductive Coupling Interface Using Over-SRAM Coil and Manchester-Encoded Synchronous Transceiver. 2075-2086 - Yan He, Dai Li, Zhanghao Yu, Kaiyuan Yang:
ASCH-PUF: A "Zero" Bit Error Rate CMOS Physically Unclonable Function With Dual-Mode Low-Cost Stabilization. 2087-2097 - Yoshisato Yokoyama, Koji Nii, Yuichiro Ishii, Shinji Tanaka, Kazutoshi Kobayashi:
Disturbance Aware Dynamic Power Reduction in Synchronous 2RW Dual-Port 8T SRAM by Self-Adjusting Wordline Pulse Timing. 2098-2108 - Rishabh Sehgal, Tanmay Thareja, Shanshan Xie, Can Ni, Jaydeep P. Kulkarni:
A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integrating ADCs and Input Dependent Binary Scaled Precharge Eliminating DACs for Energy-Efficient DNN Inference. 2109-2124
Volume 58, Number 8, August 2023
- Dennis Sylvester:
New Associate Editor. 2127 - Dennis Sylvester:
New Associate Editor. 2128 - Hossein Razavi, Behzad Razavi:
A Study of Injection Locking in Oscillators and Frequency Dividers. 2129-2140 - Onur Memioglu, Yu Zhao, Behzad Razavi:
A 300-GHz 52-mW CMOS Receiver With On-Chip LO Generation. 2141-2156 - Mohammad Ali Montazerolghaem, Leo C. N. de Vreede, Masoud Babaie:
A Highly Linear Receiver Using Parallel Preselect Filter for 5G Microcell Base Station Applications. 2157-2172 - Zhen Yang, Kaixue Ma, Fanyi Meng, Bing Liu:
A 120-GHz Class-F Frequency Doubler With 7.8-dBm POUT in 55-nm Bulk CMOS. 2173-2188 - Johan Nguyen, Khaled Khalaf, Xinyan Tang, Steven Brebels, Kristof Vaesen, Mithlesh Shrivas, Piet Wambacq:
Design of a 10.56-Gb/s 64-QAM Polar Transmitter at 60 GHz in 28-nm CMOS. 2189-2201 - Abdelrahman H. Ahmed, Leonardo Vera, Lorenzo Iotti, Ruizhi Shi, Sudip Shekhar, Alexander V. Rylyakov:
A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelength. 2202-2213 - Joep Zanen, Eric A. M. Klumperink, Bram Nauta:
A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation. 2214-2225 - Longjie Zhong, Shubin Liu, Pengpeng Shang, Wenfei Cao, Zhangming Zhu:
A 100- to- 10-kHz 5.4- to- 216- μW Power-Efficient Readout Circuit Employing Closed-Loop Dynamic Amplifier for MEMS Capacitive Accelerometer. 2226-2238 - Martin Lefebvre, Denis Flandre, David Bol:
A 1.1-/0.9-nA Temperature-Independent 213-/565-ppm/°C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI. 2239-2251 - Yizhuo Wang, Jiahe Shi, Hao Xu, Shujiang Ji, Yiyun Mao, Tenghao Zou, Jun Tao, Hao Min, Na Yan:
Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL. 2252-2266 - Soumen Mohapatra, Chung-Ching Lin, Subhanshu Gupta, Deukhyoun Heo:
Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based Phase Interpolator. 2267-2277 - Fabio Severini, Iris Cusini, Francesca Madonini, Davide Brescia, Robin Camphausen, Álvaro Cuevas, Simone Tisa, Federica A. Villa:
Spatially Resolved Event-Driven 24 × 24 Pixels SPAD Imager With 100% Duty Cycle for Low Optical Power Quantum Entanglement Detection. 2278-2287 - Marcel Runge, Julius Edler, Tobias Kaiser, Kai Misselwitz, Friedel Gerfers:
An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter. 2288-2299 - Yuanming Zhu, Tong Liu, Srujan Kumar Kaile, Shiva Kiran, Il-Min Yi, Ruida Liu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo:
A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET. 2300-2313 - Youngwook Kwon, Hyunsu Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Seungwoo Park, Kyeong-Min Kim, Changkyu Choi, Hae-Kang Jung, Chulwoo Kim:
A 33-Gb/s/Pin 1.09-pJ/Bit Single-Ended PAM-3 Transceiver With Ground-Referenced Signaling and Time-Domain Decision Technique for Multi-Chip Module Memory Interfaces. 2314-2325 - Qian Liu, Li Du, Yuan Du:
A 0.90-Tb/s/in 1.29-pJ/b Wireline Transceiver With Single-Ended Crosstalk Cancellation Coding Scheme for High-Density Interconnects. 2326-2336 - Chao Xie, Guangshu Zhao, Yuan Ma, Man-Kay Law, Milin Zhang:
Fully Integrated Frequency-Tuning Switched-Capacitor Rectifier for Piezoelectric Energy Harvesting. 2337-2348 - Travis Forbes, Benjamin Magstadt, Jesse Moody, Justine Saugen, Andrew Suchanek, Spencer Nelson:
A 0.2-2 GHz Time-Interleaved Multistage Switched-Capacitor Delay Element Achieving 2.55-448.6 ns Programmable Delay Range and 330 ns/mm2 Area Efficiency. 2349-2359 - Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Linyan Mei, Bert Boons, Marian Verhelst:
TinyVers: A Tiny Versatile System-on-Chip With State-Retentive eMRAM for ML Inference at the Extreme Edge. 2360-2371 - Chengshuo Yu, Junjie Mu, Yuqi Su, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim:
A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array. 2372-2382 - Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen:
A 334 μW 0.158 mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom-Cook Multiplication. 2383-2398
Volume 58, Number 9, September 2023
- Dennis Sylvester:
New Associate Editor. 2403 - Dennis Sylvester:
New Associate Editor. 2404 - Yuriy M. Greshishchev:
Guest Editorial IEEE 2022 BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium. 2405-2406 - Sidharth Thomas, Sam Razavian, Wei Sun, Benyamin Fallahi Motlagh, Anthony D. Kim, Yu Wu, Benjamin S. Williams, Aydin Babakhani:
A 0.4-4 THz p-i-n Diode Frequency Multiplier in 90-nm SiGe BiCMOS. 2407-2420 - Utku Soylu, Amirreza Alizadeh, Munkyo Seo, Mark J. W. Rodwell:
280-GHz Frequency Multiplier Chains in 250-nm InP HBT Technology. 2421-2429 - Justin Romstadt, Ahmad Zaben, Hakan Papurcu, Pascal Stadler, Tobias Welling, Klaus Aufinger, Nils Pohl:
A 117.5-155-GHz SiGe ×12 Frequency Multiplier Chain With Push-Push Doublers and a Gilbert Cell-Based Tripler. 2430-2440 - Kevin W. Kobayashi, Paul Partyka, Tim Howle, Tony Sellas, Leonard Hayden:
A Ka-Band InP HBT MMIC Power Amplifier With 19.8:1 IP3/Pdc LFOM at 48 GHz. 2441-2450 - Hao Wang, Hamidreza Afzal, Omeed Momeni:
A Highly Accurate and Sensitive mmWave Displacement-Sensing Doppler Radar With a Quadrature-Less Edge-Driven Phase Demodulator. 2451-2465 - Francesco Tesolin, Simone Mattia Dartizio, Francesco Buccoleri, Alessio Santiccioli, Luca Bertulessi, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays. 2466-2477 - Sumit Pratap Singh, Timo Rahkonen, Marko E. Leinonen, Aarno Pärssinen:
Design Aspects of Single-Ended and Differential SiGe Low-Noise Amplifiers Operating Above fmax/2in Sub-THz/THz Frequencies. 2478-2488 - Yiyu Shen, Martijn Hoogelander, Rob Bootsman, Morteza S. Alavi, Leo C. N. de Vreede:
A Wideband Digital-Intensive Current-Mode Transmitter Line-Up. 2489-2500 - Miao Meng, Manideep Dunna, Shihkai Kuo, Hans Chinghan Yu, Po-Han Peter Wang, Dinesh Bharadia, Patrick P. Mercier:
A Fully-Reflective Wi-Fi-Compatible Backscatter Communication System With Retro-Reflective MIMO Gain for Improved Range. 2501-2512 - David Murphy, Dihang Yang, Hooman Darabi, Arya Behzad:
A Calibration-Free Fractional-N Analog PLL With Negligible DSM Quantization Noise. 2513-2525 - Zhong Gao, Martin Fritz, Gerd Spalink, Robert Bogdan Staszewski, Masoud Babaie:
A Digital PLL-Based Phase Modulator With Non-Uniform Clock Compensation and Non-linearity Predistortion. 2526-2542 - Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.4-V 0.0294-mm2 Resistor-Based Temperature Sensor Achieving ±0.24 °C p2p Inaccuracy From40 °C to 125 °C and 385 fJ · K2 Resolution FoM in 65-nm CMOS. 2543-2553 - Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A 372 μW 10 kHz-BW 109.2 dB-SNDR Nested Delta-Sigma Modulator Using Hysteresis-Comparison MSB-Pass Quantization. 2554-2563 - Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Zongnan Wang, Wei Shi, David Z. Pan, Nan Sun:
A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier. 2564-2574 - Zhaonan Lu, Huaikun Ji, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan:
A 1 V 1.07 μW 15-Bit Pseudo-Pseudo-Differential Incremental Zoom ADC. 2575-2584 - Alexander S. Delke, Thomas J. Hoen, Anne-Johan Annema, Yanyu Jin, Jos Verlinden, Bram Nauta:
A Single-Trim Frequency Reference System With 0.7 ppm/°C From -63 °C to 165 °C Consuming 210 μW at 70 MHz. 2585-2596 - Xinling Yue, Sijun Du:
A Synchronized Switch Harvesting Rectifier With Reusable Storage Capacitors for Piezoelectric Energy Harvesting. 2597-2606 - Peng Guo, Fabian Fool, Zu-Yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Nico de Jong, Martin D. Verweij, Michiel A. P. Pertijs:
A 1.2-mW/Channel Pitch-Matched Transceiver ASIC Employing a Boxcar-Integration-Based RX Micro-Beamformer for High-Resolution 3-D Ultrasound Imaging. 2607-2618 - Tan-Tan Zhang, Hyunwoo Son, Jianming Zhao, Chun-Huat Heng, Yuan Gao:
A 26.6-119.3-μW 101.9-dB SNR Direct Digitization Bio-Impedance Readout IC. 2619-2631 - Pouyan Keshavarzian, Karthick Ramu, Duy Tang, Carlos Weill, Francesco Gramuglia, Shyue Seng Tan, Michelle Tng, Louis Lim, Elgin Quek, Denis Mandich, Mario Stipcevic, Edoardo Charbon:
A 3.3-Gb/s SPAD-Based Quantum Random Number Generator. 2632-2647 - Xiangxing Yang, Nan Sun:
A 4-Bit Mixed-Signal MAC Macro With One-Shot ADC Conversion. 2648-2658 - Yong-Un Jeong, Joo-Hyung Chae, Suhwan Kim:
A 0.85-pJ/b 16-Gb/s/Pin Single-Ended Transmitter With Integrated Voltage Modulation for Low-Power Memory Interfaces. 2659-2667
Volume 58, Number 10, October 2023
- SeongHwan Cho, Joo-Young Kim, Minoru Fujishima, Jun Zhou:
Introduction to the Special Section on the 2022 Asian Solid-State Circuits Conference (A-SSCC). 2671-2674 - Chongsoo Jung, Hoyong Seong, Injun Choi, Sohmyung Ha, Minkyu Je:
A Process-Scalable Ultra-Low-Voltage Sleep Timer With a Time-Domain Amplifier and a Switch-Less Resistance Multiplier. 2675-2684 - Cong Huang, Hailong Jiao:
C3MLS: An Ultra-Wide-Range Energy-Efficient Level Shifter With CCLS/CMLS Hybrid Structure. 2685-2695 - Hyunjun Park, Woojoong Jung, Minsu Kim, Hyung-Min Lee:
A Wide-Load-Range and High-Slew Capacitor-Less NMOS LDO With Adaptive-Gain Nested Miller Compensation and Pre-Emphasis Inverse Biasing. 2696-2708 - Wenning Jiang, Yan Zhu, Chixiao Chen, Hao Xu, Qi Liu, Ming Liu, Rui Paulo Martins, Chi-Hang Chan:
A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier. 2709-2721 - Shulin Zhao, Mingqiang Guo, Liang Qi, Dengke Xu, Guoxing Wang, Rui Paulo Martins, Sai-Weng Sin:
A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward. 2722-2732 - Jia-Sheng Huang, Shih-Che Kuo, Chia-Hung Chen:
A Multistep Multistage Fifth-Order Incremental Delta Sigma Analog-to-Digital Converter for Sensor Interfaces. 2733-2744 - Donguk Seo, Minsik Cho, Minhyeok Jeong, Gicheol Shin, Inhee Lee, David T. Blaauw, Yoonmyung Lee:
An RC Delay-Based Pressure-Sensing System With Energy-Efficient Bit-Level Oversampling Techniques for Implantable IOP Monitoring Systems. 2745-2756 - Dong-Hwi Choi, Dong-Woo Jee:
A 1984-Pixels, 1.26 nW/Pixel Retinal Prosthesis Chip With Time-Domain In-Pixel Image Processing and Bipolar Stimulating Electrode Sharing. 2757-2766 - Min-Yang Chiu, Guan-Cheng Chen, Tzu-Hsiang Hsu, Ren-Shuo Liu, Chung-Chuan Lo, Kea-Tiong Tang, Meng-Fan Chang, Chih-Cheng Hsieh:
A Multimode Vision Sensor With Temporal Contrast Pixel and Column-Parallel Local Binary Pattern Extraction for Dynamic Depth Sensing Using Stereo Vision. 2767-2777 - Kyeongwon Jeong, Gichan Yun, Jaesuk Choi, Injun Choi, Jeehoon Son, Jae Youn Hwang, Sohmyung Ha, Minkyu Je:
A Wide-Bandwidth Ultrasound Receiver and On-Chip Ultrasound Transmitter for Ultrasound Capsule Endoscopy. 2778-2789 - Han Wu, Jeong Hoan Park, Rucheng Jiang, Jung-Hwan Choi, Jerald Yoo:
A Charge Recycling Logic Data Links for Single- and Multiple-Channel I/Os. 2790-2800 - Yao-Chia Liu, Wei-Zen Chen, Yuan-Sheng Lee, Yu-Hsiang Chen, Shawn Ming, Ying-Hsi Lin:
A 103 fJ/b/dB, 10-26 Gb/s Receiver With a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement. 2801-2811 - Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Juhyoung Lee, Hoi-Jun Yoo:
SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit. 2812-2825 - Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent R. Carlton:
An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET. 2826-2838 - Wang Ye, Linfang Wang, Zhidao Zhou, Junjie An, Weizeng Li, Hanghang Gao, Zhi Li, Jinshan Yue, Hongyang Hu, Xiaoxin Xu, Jianguo Yang, Jing Liu, Dashan Shang, Feng Zhang, Jinghui Tian, Chunmeng Dou, Qi Liu, Ming Liu:
A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference. 2839-2850 - Yudai Yamazaki, Jun Sakamaki, Jian Pang, Joshua Alvin, Zheng Li, Dongwon You, Jill C. Mayeda, Atsushi Shirane, Kenichi Okada:
A 37-43.5-GHz Phase and Amplitude Detection Circuit With 0.049° and 0.036-dB Accuracy for 5G Phased-Array Calibration Using Transformer-Based Injection-Enhanced ILFD. 2851-2860 - Yaqian Sun, Wei Deng, Haikun Jia, Yejun He, Zhihua Wang, Baoyong Chi:
A Compact and Low Phase Noise Square-Geometry Quad-Core Class-F VCO Using Parallel Inductor-Sharing Technique. 2861-2873 - Amirhossein Jouyaeian, Qinwen Fan, Roger Luis Brito Zamparette, Udo Ausserlechner, Mario Motz, Kofi A. A. Makinwa:
A Hybrid Magnetic Current Sensor With a Multiplexed Ripple-Reduction Loop. 2874-2882 - Haoyi Zhao, Fa Foster Dai:
A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment. 2883-2896 - Chih-Cheng Chen, Yu-Hsiang Huang, John Carl Joel Salao Marquez, Chih-Cheng Hsieh:
A 12-ENOB Second-Order Noise-Shaping SAR ADC With PVT-Insensitive Voltage- Time-Voltage Converter. 2897-2906 - Ahmad Sharkia, Shahriar Mirabbasi, Sudip Shekhar:
A Serrodyne Modulator-Based Fractional Frequency Synthesis Technique for Low-Noise, GHz-Rate Clocking. 2907-2918 - Hui Zhang, Longyang Lin, Qiang Fang, Massimo Alioto:
Laser Voltage Probing Attack Detection With 100% Area/Time Coverage at Above/Below the Bandgap Wavelength and Fully-Automated Design. 2919-2930 - Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo:
Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks. 2931-2945
Volume 58, Number 11, November 2023
- Dennis Sylvester:
New Associate Editor. 2951 - Mehdi Kiani, Kaushik Sengupta:
Guest Editorial Introduction to the Special Section on the 2023 IEEE International Solid-State Circuits Conference (ISSCC). 2952-2954 - Menghan Guo, Shoushun Chen, Zhe Gao, Wenlei Yang, Peter Bartkovjak, Qing Qin, Xiaoqin Hu, Dahai Zhou, Qiping Huang, Masayuki Uchiyama, Yoshiharu Kudo, Shimpei Fukuoka, Chengcheng Xu, Hiroaki Ebihara, Xueqing Wang, Peiwen Jiang, Bo Jiang, Bo Mu, Huan Chen, Jason Yang, TJ Dai, Andreas Suess:
A Three-Wafer-Stacked Hybrid 15-MPixel CIS + 1-MPixel EVS With 4.6-GEvent/s Readout, In-Pixel TDC, and On-Chip ISP and ESP Function. 2955-2964 - Byungchoul Park, Hyun-Seung Choi, Jinwoong Jeong, Taewoo Kim, Myung-Jae Lee, Youngcheol Chae:
A 113.3-dB Dynamic Range 600 Frames/s SPAD X-Ray Detector With Seamless Global Shutter and Time-Encoded Extrapolation Counter. 2965-2975 - Kyeongho Eom, Minju Park, Han-Sol Lee, Seung-Beom Ku, Namju Kim, Seongkwang Cha, Yong-Sook Goo, Sohee Kim, Seong-Woo Kim, Hyung-Min Lee:
A Low-Stimulus-Scattering Pixel-Sharing Sub-Retinal Prosthesis SoC With Time-Based Photodiode Sensing and Per-Pixel Dynamic Voltage Scaling. 2976-2989 - Yingping Chen, Bernardo Tacca, Yunzhu Chen, Dwaipayan Biswas, Georges G. E. Gielen, Francky Catthoor, Marian Verhelst, Carolina Mora Lopez:
An Online-Spike-Sorting IC Using Unsupervised Geometry-Aware OSort Clustering for Efficient Embedded Neural-Signal Processing. 2990-3002 - Fatemeh Aghlmand, Chelsea Hu, Saransh Sharma, Krishna K. Pochana, Richard M. Murray, Azita Emami:
A 65-nm CMOS Fluorescence Sensor for Dynamic Monitoring of Living Cells. 3003-3019 - Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM. 3020-3029 - Craig Ives, Debjit Sarkar, Ali Hajimiri:
Subtractive Photonics in Bulk CMOS. 3030-3043 - Juhwan Yoo, Zijun Chen, Frank Arute, Shirin Montazeri, Marco Szalay, Catherine Erickson, Evan Jeffrey, Reza Fatemi, Marissa Giustina, Markus Ansmann, Erik Lucero, Julian Kelly, Joseph C. Bardin:
Design and Characterization of a <4-mW/Qubit 28-nm Cryo-CMOS Integrated Circuit for Full Control of a Superconducting Quantum Processor Unit Cell. 3044-3059 - Yanshu Guo, Qichun Liu, Yaoyu Li, Wenqiang Huang, Tian Tian, Siqi Zhang, Nan Wu, Songyao Tan, Ning Deng, Zhihua Wang, Hanjun Jiang, Tiefu Li, Yuanjin Zheng:
A Polar-Modulation-Based Cryogenic Transmon Qubit State Controller in 28 nm Bulk CMOS for Superconducting Quantum Computing. 3060-3073 - Emir Ali Karahan, Zheng Liu, Kaushik Sengupta:
Deep-Learning-Based Inverse-Designed Millimeter-Wave Passives and Power Amplifiers. 3074-3088 - Byeonghun Yun, Dae-Woong Park, Sang-Gug Lee:
H-Band Power Amplifiers in 65-nm CMOS by Adopting Output Power Maximized Gmax-Core and Transmission Line-Based Zero-Degree Power Combining Networks. 3089-3102 - Zongming Duan, Bowen Wu, Yan Wang, Yun Fang, Yongjie Li, Yanhui Wu, Tao Zhang, Chuanming Zhu, Yuefei Dai, Lei Sang, Hao Gao:
A 76-81 GHz 2×8 MIMO Radar Transceiver With Broadband Fast Chirp Generation and 16-Antenna-in-Package Virtual Array. 3103-3112 - Hamidreza Afzal, Cheng Li, Omeed Momeni:
A Highly Efficient 165-GHz 4FSK 17-Gb/s Transceiver System With Frequency Overlapping Architecture in 65-nm CMOS. 3113-3126 - Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui Paulo Martins:
All Rivers Flow to the Sea: A High-Density Wireless Power Receiver With Split-Dual-Path and Hybrid-Quad-Path Step-Down Rectifying Conversion. 3127-3137 - Enrico Genco, Carmine Garripoli, Jan-Laurens P. J. van der Steen, Gerwin H. Gelinck, Sahel Abdinia, Pieter Harpe, Eugenio Cantatore:
An EMG Interface Comprising a Flexible a-IGZO Active Electrode Matrix and a 65-nm CMOS IC. 3138-3149 - Rahul Gulve, Navid Sarhangnejad, Gairik Dutta, Motasem Sakr, Don Nguyen, Roberto Rangel, Wenzheng Chen, Zhengfan Xia, Mian Wei, Nikita Gusev, Esther Y. H. Lin, Xiaonong Sun, Leo Hanxu, Nikola Katic, Ameer M. S. Abdelhadi, Andreas Moshovos, Kiriakos N. Kutulakos, Roman Genov:
39 000-Subexposures/s Dual-ADC CMOS Image Sensor With Dual-Tap Coded-Exposure Pixels for Single-Shot HDR and 3-D Computational Imaging. 3150-3163 - Gyu-Wan Lim, Gyeong-Gu Kang, Hyunggun Ma, Moonjae Jeong, Hyun-Sik Kim:
An Area-Efficient 10-Bit Source-Driver IC With LSB-Stacked LV-to-HV-Amplify DAC for Mobile OLED Displays. 3164-3178 - Chenghao Zhang, Jiangbo Wei, Yong Chen, Maliang Liu, Yintang Yang:
A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS. 3179-3193 - Yunshan Zhang, Changgui Yang, Ziyi Chang, Zhuhao Li, Huan Gao, Yuxuan Luo, Kedi Xu, Gang Pan, Bo Zhao:
An 8-Shaped Antenna-Based Battery-Free Neural-Recording System Featuring 3 cm Reading Range and 140 pJ/bit Energy Efficiency. 3194-3206 - Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu:
A 12-to-1 Flying Capacitor Cross-Connected Buck Converter With Inserted D > 0.5 Control for Fast Transient Response. 3207-3218 - Caolei Pan, Wen-Liang Zeng, Chi-Seng Lam, Sai-Weng Sin, Chenchang Zhan, Rui Paulo Martins:
A 95% Peak Efficiency Modified KY Converter With Improved Flying Capacitor Charging in DCM for IoT Applications. 3219-3230 - Indranil Bhattacharjee, Gajendranath Chowdary:
A 0.45 mV/V Line Regulation, 0.6 V Output Voltage, Reference-Integrated, Error Amplifier-Less LDO With a 5-Transistor Regulation Core. 3231-3241 - Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Ki-Ryong Kim, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung:
An Energy-Efficient Design of TSV I/O for HBM With a Data Rate up to 10 Gb/s. 3242-3252 - Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim:
A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links. 3253-3265 - Tzu-Hsiang Hsu, Guan-Cheng Chen, Yi-Ren Chen, Ren-Shuo Liu, Chung-Chuan Lo, Kea-Tiong Tang, Meng-Fan Chang, Chih-Cheng Hsieh:
A 0.8 V Intelligent Vision Sensor With Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification. 3266-3274 - Bing-Chen Wu, Wei-Ting Chen, Tsung-Te Liu:
An Error-Resilient RISC-V Microprocessor With a Fully Integrated DC-DC Voltage Regulator for Near-Threshold Operation in 28-nm CMOS. 3275-3285
Volume 58, Number 12, December 2023
- James F. Buckwalter, Alireza Zolfaghari, Drew A. Hall, Ke-Horng Chen, Dominique Morche:
Guest Editorial Introduction to the Special Section on the 2023 IEEE International Solid-State Circuits Conference (ISSCC). 3291-3295 - Jiaxiang Li, Yun Yin, Hang Chen, Jie Lin, Yicheng Li, Xianglong Jia, Zhen Hu, Ziyu Liu, Xiuyin Zhang, Hongtao Xu:
A Transformer-Based Quadrature Doherty Digital Power Amplifier With 4.1 W Peak Power in 28 nm Bulk CMOS. 3296-3307 - Yiyang Shu, Xun Luo:
Scalable Inter-Core-Shaping Multi-Core Oscillator With Canceled Common-Mode Destructive Coupling and Robust Common-Mode Resonance. 3308-3319 - Simone Mattia Dartizio, Francesco Tesolin, Giacomo Castoro, Francesco Buccoleri, Michele Rossoni, Dmytro Cherniak, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering. 3320-3337 - Yongwoo Jo, Juyeop Kim, Yuhwan Shin, Hangi Park, Chanwoong Hwang, Younghyun Lim, Jaehyouk Choi:
A Wideband LO Generator for 5G FR1 Bands Using a Single LC-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier. 3338-3350 - Aravind Nagulu, Yi Zhuang, Mingyu Yuan, Sasank Garikapati, Harish Krishnaswamy:
A Third-Order Quasi-Elliptic N-Path Filter With Enhanced Linearity Through Clock Boosting. 3351-3363 - Abhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas William Brown, Brent R. Carlton, Christopher Dennis Hull, Steven Callender, Stefano Pellerano:
A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. 3364-3379 - Xi Fu, Dongwon You, Xiaolin Wang, Yun Wang, Carolyn Jill Mayeda, Yuan Gao, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashbir Aviat Fadila, Zheng Li, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane:
A Low-Power 256-Element Ka-Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations. 3380-3395 - Soroush Araei, Shahabeddin Mohin, Negar Reiskarimian:
Harmonic-Resilient Fully Passive Mixer-First Receiver for Software-Defined Radios. 3396-3407 - Wan Kim, Hyun-Gi Seok, Geunhaeng Lee, Sinyoung Kim, Jae-Keun Lee, Chanho Kim, Wonkang Kim, Wonjun Jung, Youngsea Cho, Seungyong Bae, Jongpil Cho, Hyuokju Na, Byoungjoong Kang, Honggul Han, Hyeonuk Son, Suhyeon Lee, Dongsu Kim, Ji-Seon Paek, Seunghyun Oh, Jongwoo Lee, Sungung Kwak, Joonsuk Kim:
A Fully Integrated IEEE 802.15.4/4z-Compliant UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28-nm Process. 3408-3420 - Hayden Bialek, Matthew L. Johnston, Arun Natarajan:
A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios. 3421-3432 - Zhong Tang, Sining Pan, Milos Grubor, Kofi A. A. Makinwa:
A Sub-1 V Capacitively Biased BJT-Based Temperature Sensor With an Inaccuracy of ±0.15 °C (3σ) From - 55 °C to 125 °C. 3433-3441 - Amirhossein Jouyaeian, Qinwen Fan, Udo Ausserlechner, Mario Motz, Kofi A. A. Makinwa:
A Hybrid Magnetic Current Sensor With a Dual Differential DC Servo Loop. 3442-3449 - Sining Pan, Xiaomeng An, Zheru Yu, Hui Jiang, Kofi A. A. Makinwa:
A Compact 10-MHz RC Frequency Reference With a Versatile Temperature Compensation Scheme. 3450-3458 - Kyu-Sang Park, Nilanjan Pal, Yongxin Li, Ruhao Xia, Tianyu Wang, Ahmed E. AbdelRahman, Pavan Kumar Hanumolu:
A Temperature- and Aging-Compensated RC Oscillator With ±1030-ppm Inaccuracy From40 °C to 85 °C After Accelerated Aging for 500 h at 125 °C. 3459-3469 - Huajun Zhang, Marco Berkhout, Kofi A. A. Makinwa, Qinwen Fan:
A 120.9-dB DR Digital-Input Capacitively Coupled Chopper Class-D Audio Amplifier. 3470-3480 - Lixiong Du, Dong Yan, Dongsheng Brian Ma:
On-Chip Condition-Adaptive Δ f3 EMI Control for Switching Power ICs. 3481-3491 - Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu:
A 12-to-1 V Quad-Output Switched-Capacitor Buck Converter With Shared DC Capacitors. 3492-3502 - Casey Hardy, Hanh-Phuc Le:
A Reconfigurable Single-Inductor Multi-Stage Hybrid Converter for 1-Cell Battery Chargers. 3503-3518 - Yeon-Woo Jeong, Seung-Ju Lee, Se-Un Shin:
A Scalable N-Step Equally Split SSHI Rectifier for Piezoelectric Energy Harvesting With Low-Q Inductor. 3519-3529 - Yanqiao Li, Bahlakoana Mabetha, Jason T. Stauth:
A Modular Switched-Capacitor Chip-Stacking Drive Platform for kV-Level Electrostatic Actuators. 3530-3543 - Seung-Ju Lee, Yeon-Woo Jeong, Se-Un Shin:
A Three-Level Boost Converter With Fully State-Based Phase Selection Technique for High-Speed VCF Calibration and Smooth Mode Transition. 3544-3554 - Manxin Li, Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon:
A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting. 3555-3564 - Hongshuai Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator. 3565-3575 - Mingtao Zhan, Lu Jie, Yi Zhong, Nan Sun:
A 10-mW 10-ENoB 1-GS/s Ring-Amp-Based Pipelined TI-SAR ADC With Split MDAC and Switched Reference Decoupling Capacitor. 3576-3585 - Hongzhi Zhao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A 52.5-dB 2× Time-Interleaved 2.8-GS/s SAR ADC With 5-bit/Cycle Time-Domain Quantization and a Compact Signal DAC. 3586-3597
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-05-23 00:25 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
