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ORCIDIEEE Micro, Volume 8
Volume 8, Number 1, February 1988
- Jean-Daniel Nicoud:
Video RAMs: structure and applications. 8-27 - Harry Vlahos, Veljko Milutinovic:
GaAs microprocessors and digital systems: an overview of R&D efforts. 28-56 - Shreekant S. Thakkar, Paul Gifford, Gary N. Fielland:
The Balance multiprocessor system. 57-69
Volume 8, Number 2, April 1988
- Hideo Inayoshi, Ikuya Kawasaki, Tadahiko Nishimukai, Ken Sakamura:
Realization of Gmicro/200. 12-21 - Shinya Kimura, Yasuhiko Komoto, Yoichi Yano:
Implementation of the V60/V70 and its FRM function. 22-36 - Misao Miyata, Hidechika Kishigami, Kosei Okamoto, Shigeo Kamiya:
The TX1 32-bit microprocessor: performance analysis, and debugging support. 37-46 - Ken Sakamura, Royichi Sano, Kazuhiko Honma:
Introducing Tobus: the system bus in the TRON architecture. 47-59 - Ken Sakamura, Kanehisha Tsurumi, Hiro Kato:
Applying the μBTRON bus to a music LAN. 60-66 - Borivoje Furht:
A RISC architecture with two-size, overlapping register windows. 67-80
Volume 8, Number 3, June 1988
- Clif Purkiser, Jim Kardach:
The Intel 376 family for embedded processor applications. 10-26 - Ron Cates:
Processor architecture considerations for embedded controller applications. 28-38 - Karl M. Guttag, Thomas M. Albers, Michael D. Asal, Kevin G. Rose:
The TMS34010: an embedded microprocessor. 39-52 - Chris Rowen, Mark Johnson, Paul Ries:
The MIPS R3010 floating-point coprocessor. 53-62 - David P. Ryan:
Intel's 80960: an architecture optimized for embedded control. 63-76 - Sorin Iacobovici:
A pipelined interface for high floating-point performance with precise exceptions. 77-87
Volume 8, Number 4, August 1988
- Steven W. Yates, Ronald D. Williams:
A fault-tolerant multiprocess controller for magnetic bearings. 6-17 - Ronald D. Williams, Barry W. Johnson, Thomas E. Roberts:
An operating system for a fault-tolerant multiprocessor controller. 18-29 - Brenda M. Ozaki, Eduardo B. Fernández
, Ehud Gudes:
Software fault tolerance in architectures with hierarchical protection levels. 30-43 - Donald B. Alpert, Michael J. Flynn:
Performance trade-offs for microprocessor cache memories. 44-54 - Elvira Argon, I-Lok Chang, Gamini Gunaratna, David K. Kahaner, Martin A. Reed:
Mathematical software: Plod. 56-61 - Tenkasi V. Ramabadran, Sunil S. Gaitonde:
A tutorial on CRC computations. 62-75
Volume 8, Number 5, October 1988
- R. M. Lea:
ASP: a cost-effective parallel microcomputer. 10-29 - Jörg Kaiser:
MUTABOR, a coprocessor supporting memory management in an object-oriented architecture. 30-46 - Björn Bergsten, Rubén González-Rubio, Brigitte Kerhervé, Jean Rohmer:
An advanced database accelerator. 47-63 - David F. Hinnant:
Accurate Unix benchmarking: art, science, or black magic? 64-75
Volume 8, Number 6, December 1988
- Panos Papamichalis, Ray Simar Jr.:
The TMS320C30 floating-point digital signal processor. 13-29 - Michael L. Fuccio, Renato N. Gadenz, Craig J. Garen, Joan M. Huser, Benjamin Ng, Steven P. Pekarich, Kreg D. Ulery:
The DSP32C: AT&Ts second generation floating point digital signal processor. 30-48 - Guy R. L. Sohie, Kevin L. Kloker:
A digital signal processor with IEEE floating-point arithmetic. 49-67 - L. Robert Morris:
A PC-based digital speech spectrograph. 68-85
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