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SIGARCH Computer Architecture News, Volume 14

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Volume 14, Number 1, January 1986

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Nam Sung Woo, Richard A. O'Keefe:
A coment on "A hardware unification unit: design and analysis, ". 2-3
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Anthonie B. Ruighaver:
Design aspects of the delft parallel processor DPP84 and its programming system. 4-8
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Dan Hammerstrom, David Maier, Shreekant S. Thakkar:
The cognitive architecture project. 9-21
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Alan Jay Smith:
Bibliography and reading on CPU cache memories and related topics. 22-42

Volume 14, Number 2, May 1986

Special Issue: Proceedings of the 13th annual international symposium on Computer architecture (ISCA '86)

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Hideo Aiso:
Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986. IEEE Computer Society 1986, ISBN 0-8186-0719-X [contents]

Volume 14, Number 3, June 1986

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Nam Sung Woo:
A reply to comments "a comment on 'a hardware unification unit: design and analysis, '". 2-4
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David K. DuBose, Dimitris K. Fotakis, Daniel Tabak:
A microcoded RISC. 5-16
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Tomás Lang, Miquel Huguet:
Reduced register saving/restoring in single-window register files. 17-26
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Larry O'Neal Rouse:
The twisted double helix: a minimum distance architecture for 5th generation computing. 27-33
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David M. Harland:
A recursively microcodable tagged architecture. 34-40
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Cedell Alexander, William Keshlear, Furrokh Cooper, Faye A. Briggs:
Cache memory performance in a unix enviroment. 41-61

Volume 14, Number 4, September 1986

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Roger Stokes:
Traces for hardware verification. 7-14
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Claudio Kirner, Eduardo Marques:
Design of a distributed system support based on a centralized parallel bus. 15-26
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Mary Jane Irwin:
Secretary/Treasurer's Report. 28

Volume 14, Number 5, December 1986

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David M. Harland, Bruno Beloff:
Microcoding an object-oriented instruction set. 3-12
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William Stallings:
An annotated bibliography on reduced instruction set computers. 13-19

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