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SIGARCH Computer Architecture News, Volume 34
Volume 34, Number 1, March 2006
- Sandro Bartolini, Pierfrancesco Foglia, Roberto Giorgi, Cosimo Antonio Prete:

Memory performance: dealing with applications, systems and architecture. 1-2 - Scott J. Friedman, Praveen Krishnamurthy, Roger D. Chamberlain, Ron K. Cytron, Jason E. Fritts:

Dusty caches for reference counting garbage collection. 3-10 - Subramanian Ramaswamy, Jaswanth Sreeram, Sudhakar Yalamanchili, Krishna V. Palem:

Data trace cache: an application specific cache architecture. 11-18 - Afrin Naz, Krishna M. Kavi, Mehran Rezaei, Wentong Li:

Making a case for split data caches for embedded applications. 19-26 - Bramha Allu, W. Zhang, M. Kandala:

Exploiting the replication cache to improve cache read bandwidth cost effectively. 27-32 - Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa:

An efficient synchronization technique for multiprocessor systems on-chip. 33-40 - Farshad Khunjush

, Nikitas J. Dimopoulos:
Hiding message delivery and reducing memory access latency by providing direct-to-cache transfer during receive operations in a message passing environment. 41-48 - Yao Yue, Chuang Lin, Zhangxi Tan:

NPCryptBench: a cryptographic benchmark suite for network processors. 49-56 - Abelardo López-Lagunas, Sek M. Chai:

Memory bandwidth optimization through stream descriptors. 57-64 - Akihiro Chiyonobu, Toshinori Sato:

Energy-efficient instruction scheduling utilizing cache miss information. 65-70 - Alessandro Bardine, Alessio Bechini

, Pierfrancesco Foglia, Cosimo Antonio Prete:
Analysis of embedded video coder systems: a system-level approach. 71-76 - Alex Gontmakher, Assaf Schuster, Avi Mendelson:

Inthreads: a low granularity parallelization model. 77-80
- Mark Thorson:

Internet nuggets. 81-86
Volume 34, Number 2, May 2006
- 33rd International Symposium on Computer Architecture (ISCA 2006), June 17-21, 2006, Boston, MA, USA. IEEE Computer Society 2006, ISBN 0-7695-2608-X [contents]

Volume 34, Number 3, June 2006
- Martin Burtscher:

TCgen 2.0: a tool to automatically generate lossless trace compressors. 1-8 - Abhas Kumar, Nisheet Jain, Mainak Chaudhuri:

Long-latency branches: how much do they matter? 9-15
- Mark Thorson:

Internet nuggets. 16-21
Volume 34, Number 4, September 2006
- John L. Henning:

SPEC CPU2006 benchmark descriptions. 1-17 - Daniel Citron, Adham Hurani, Alaa Gnadrey:

The harmonic or geometric mean: does it really matter? 18-25 - James Poe, Tao Li:

BASS: a benchmark suite for evaluating architectural security systems. 26-33
- Mark Thorson:

Internet nuggets. 34-37
Volume 34, Number 5, December 2006
- John Paul Shen, Margaret Martonosi:

Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006. ACM 2006, ISBN 1-59593-451-0 [contents]

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