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IEEE Transactions on Electronic Computers, Volume 12
Volume 12, Number 1, February 1963
- George J. Y. Fan, Eric Donath, Euval S. Barrekette, Armand Wirgin:

Analysis of a Magneto-Optic Readout System. 3-9 - Theodore R. Bashkow, Joan E. Friets, Allan Karson:

A Programming System for Detection and Diagnosis of Machine Malfunctions. 10-17 - S. C. Gupta, J. J. O'Donnell:

Manipulation of State Transition Matrices of Finite Markov Chains. 19-20 - Donald L. Dietmeyer:

Conversion from Positive to Negative and Imaginary Radix. 20-22 - George H. Barnes:

Comment on "An Electronic Generator of Random Numbers. 22 - A. Thiney:

Rise and Fall Times of Transistors in Switching Operation Regardless of the Driving Source Impedance. 23 - J. Torkel Wallmark, A. G. Revesz:

Redundancy in Unipolar Field-Effect Transistor Circuits. 23-25 - C. K. Chow:

An Experimental Result on Character Recognition. 25 - John A. Bradshaw:

Letter Recognition Using a Captive Scan. 26 - Yngvar Lundh:

A Digital Integrator for On-Line Signal Processing. 26-28
Volume 12, Number 2, April 1963
- Rocco H. Urbano:

Boolean Matrices and the Stability of Neural Nets. 61-66 - Janusz A. Brzozowski, Edward J. McCluskey:

Signal Flow Graph Techniques for Sequential Circuit State Diagrams. 67-76 - Irving Stein:

Generalized Pulse Recording. 77-92 - M. F. Barkouki, Irving Stein:

Theoretical and Experimental Evaluation of RZ and NRZ Recording Characteristics. 92-100 - Marvin L. Stein:

Automatic Digital Programming of Analog Computers. 100-111 - Robert H. Wilkinson:

A Method of Generating Functions of Several Variables Using Analog Diode Logic. 112-129 - Robert J. Lechner:

Transformations Among Switching Function Canonical Forms. 129-130 - Robert C. Minnick, Bernard Elspas, Robert A. Short:

Symmetric Latin Squares. 130-131 - Otakar A. Horna:

Majority-Logic Synthesis. 131-132 - James L. Costanza:

The Identification of Combinational Logic Switching Structure. 132-133 - Frank M. Brown:

A Node-Elimination Theorem for Boolean Matrices. 133-134 - C. A. Gaston:

A Simple Test for Linear Separability. 134-135 - Wilbur H. Highleyman:

Data for Character Recognition Studies. 135-136 - Louis Fein:

Renaming the PTGEC. 136 - Louis Fein:

Scientific and Technical Conventions. 141-142 - Jack Sklansky:

Ultimate-Speed Adders. 142-148 - Paul M. Chirlian:

The Fabrication of Low Resistances at Liquid Helium Temperatures. 148
Volume 12, Number 3, June 1963
- Fusachika Miyata:

Realization of Arbitrary Logical Functions Using Majority Elements. 183-191 - William H. Hanson:

Ternary Threshold Logic. 191-197 - Leo Hellerman:

A Catalog of Three-Variable Or-Invert and And-Invert Logical Circuits. 198-223 - Juris Hartmanis, Richard Edwin Stearns:

A Study of Feedback and Errors in Sequential Machines. 223-232 - Micha A. Perles, Michael O. Rabin, Eliahu Shamir:

The Theory of Definite Automata. 233-243 - Richard F. Arnold, Michael A. Harrison:

Algebraic Properties of Symmetric and Partially Symmetric Boolean Functions. 244-251 - J. K. Hawkins, C. J. Munsey:

A Parallel Computer Organization and Mechanizations. 251-262 - V. O. Muth, Allan K. Scidmore:

A Memory Organization for an Elementary List-Processing Computer. 262-265 - Mu Yue Hsiao, Frederick F. Sellers Jr.:

The Carry-Dependent Sum Adder. 265-268 - Robert K. Brayton, Ralph A. Willoughby:

An Analysis of the Effect of Component Tolerances on the Amplification of the Balanced-Pair Tunnel-Diode Circuit. 269-274 - Gerald F. Songster:

Negative-Base Number-Representation Systems. 274-277 - William H. Pierce:

Predicting Signal Degeneration and Gate Compatibility in Logic Circuits. 277-281 - Bruce A. Kaufman, John S. Hammond III:

A High-Speed Direct-Coupled Magnetic Memory Sense Amplifier Employing Tunnel-Diode Discriminators. 282-295 - Eduardo Tomas Ulzurrun:

Tunnel-Diode Threshold Discriminator Tolerance Analysis. 296-299 - Richard L. Mattson, Oscar Firschein, Martin A. Fischler:

An Experimental Investigation of a Class of Pattern Recognition Synthesis Algorithms. 300-306 - S. G. Margolis, J. J. O'Donnell:

Rigorous Treatments of Variable Time Delays. 307-309 - Granino A. Korn:

Performance of Operational Amplifiers With Electronic Mode Switching. 310-312 - Per Asbjørn Holst:

Dynamic Accuracy and Error in Analog Computations. 313-316 - Gerhard L. Hollander:

Effect of Fan-In and Fan-Out Limitations on the Value of Computer Circuits. 317-318 - Takahiko Fukinuki, Megumi Fujinaka:

A Stable Basic Logic Circuit. 318-319 - Donald W. Davies:

An 11-Cryotron Full Adder. 319 - Edayathu V. Krishnamurthy:

On Computer Multiplication and Division Using Binary Logarithms. 319-320 - John F. Randolph:

A Polynomial Counter. 320 - Philip M. Lewis II, Clarence L. Coates:

Is Switching Theory Mathematics or Engineering? 320-321 - Ernest J. Schubert:

The Relative Merits of Minimization Techniques for Switching Circuits. 321-322 - Michael Yoeli:

Cascade-Parallel Decompositions of Sequential Machines. 322-324
Volume 12, Number 4, August 1963
- Michael Yoeli:

Counting with Nonlinear Binary Feedback Shift Registers. 357-361 - Mitchell P. Marcus:

Cascaded Binary Counters with Feedback. 361-364 - Anton Holick:

Analysis of Noncatastrophic Failures in Digital Guidance Systems. 365-371 - Frank C. Yao:

Analysis of Signal Transmission in Ultra High Speed Transistorized Digital Computers. 372-382 - Lester F. Shew:

Discrete Tracks for Saturation Magnetic Recording. 383-387 - George Nagy

:
A Survey of Analog Memory Devices. 388-393 - Robert H. Kohr:

A Method for the Determination of a Differential Equation Model for Simple Nonlinear Systems. 394-400 - William H. Hanson:

Threshold-Logic Synthesis by Algebraic Methods. 401-402 - Janusz A. Brzozowski, J. F. Poage:

On the Construction of Sequential Machines from Regular Expressions. 402-403 - Paul E. Wood Jr.:

A Note On Threshold Device Error Analysis. 403-405 - Donald Liss:

A Test for Unate Truth Functions. 405 - Mitchell P. Marcus:

Relay Essential Hazards. 405-407 - A. J. Nichols:

Comments on Armstrong's State Assignment Techniques. 407-409 - M. Lehman:

The Minimization of Assimilations in Binary Carry-Storage Arithmetic Units. 409-410 - Daniel L. Slotnick, W. Carl Borck, Robert C. McReynolds:

Comments on H.J. Heijf's Review of "The SOLOMON Computer. 410 - Hillel Weinstein:

A High-Speed "Compare" Circuit. 410-411 - Granino A. Korn:

Analog/Hybrid Storage and Pulse Modulation. 411-412 - Robert L. T. Hampton, Granino A. Korn, Baker A. Mitchell Jr.:

Hybrid Analog-Digital Random-Noise Generation. 412-413 - N. Seshagiri:

Analog-Computer Technique for Impulsive Atmospheric Radio-Noise Analysis. 413-414
Volume 12, Number 5, October 1963
- Philip M. Lewis II, Clarence L. Coates:

Realization of Logical Functions by a Network of Threshold Components with Specified Sensitivity. 443-454 - Clarence L. Coates, Philip M. Lewis II:

A Realization Procedure for Threshold Gate Networks. 454-461 - Carl David Todd:

An Annotated Bibliography on NOR and NAND Logic. 462-464 - Jack Sklansky:

General Synthesis of Tributary Switching Networks. 464-469 - Chung Laung Liu:

kth-Order Finite Automaton. 470-475 - Denis B. Jarvis:

The Effects of Interconnections on High-Speed Logic Circuits. 476-487 - Donald A. Pierre:

Optimization of Pulse and Digital Circuits by Use of the Lagrange Multiplier Technique. 488-492 - Yolan Cho:

A Method of Theoretical Analysis of High-Speed Junction Diode Logic Circuits. 492-502 - William G. Daly, Joseph F. Kruy:

A High-Speed Arithmetic Unit Using Tunnel Diodes. 503-511 - Michael J. Flynn, Derek S. Henderson:

Variable Field-Length Data Manipulation in a Fixed Word-Length Memory. 512-516 - Alvin A. Read:

A Dynamic Large Signal Model for a Single-Domain Thin Magnetic Film Inductor. 517-521 - Pier Giorgio Perotto:

A New Method for Automatic Character Recognition. 521-526 - Amos Nathan:

Linear and Nonlinear Interpolators. 526-532 - Maurice G. Isaac, Vincent T. DeBuono:

Deterministic and Stochastic Response of Linear Time Variable Systems. 532-540 - Don Jerome Nelson:

A Fundamental Error Theory for Analog Computers. 541-550 - David Mandelbaum:

Optimal Scheduling of Disk File Data Transfers. 551 - Robert Tienwen Chien, R. J. Barbetta:

A Class of Simple Decoding Networks for Marcus Matrix Switches. 551-553 - Amarendra Mukhopadhyay:

Detection of Total or Partial Symmetry of a Switching Function with the Use of Decomposition Charts. 553-557 - Antonín Svoboda:

An Algorithm for Solving Boolean Equations. 557-559 - Michael A. Harrison:

The Number of Equivalence Classes of Boolean Functions Under Groups Containing Negation. 559-561 - Robert O. Winder:

Bounds on Threshold Gate Realizability. 561-564 - Hillel Weinstein:

Proposals for Ordered Sequential Detection of Simultaneous Multiple Responses. 564-567 - Sidney B. Geller, Paul A. Mantek:

A 100 Megapulse per Second Binary Counter with Impedance Steering. 568 - Michael Godfrey Harman:

A New Form of Cryotron Logical Circuitry. 568-570 - Donald A. Pierre:

Terminal Properties of Toroidal Cores with Circular Cross Sections. 570-572 - Paul W. Cooper:

Multivariate Extension of Univariate Distributions. 572-573 - Sanford M. Levy:

A Counter Example to an Assertion of Jackson. 573
Volume 12, Number 6, December 1963
- Daniel L. Slotnick:

The Computer System Issue. 607-608 - Leon Lukaszewicz:

Outline of the Logical Design of the ZAM-41 Computer. 609-612 - Egbert Ulbrich:

Struktur und Arbeitsweise der Telefunken-Digitalrechenanlage TR 4. 613-618 - Meir M. Lehman, Rayna Eshed, Z. Netter:

Sabrac-A New Generation Serial Computer. 618-628 - Christian Gram, Ole Hestvik, Henning Isaksson, P. T. Jacobsen, Jørn Jensen, Peter Naur, Bent Scharøe Petersen, B. Svejgaard:

GIER-A Danish Computer of Medium Size. 629-650 - Börje Langefors:

The D21 Data Processing System by Svenska Aeroplan Aktiebolaget, Sweden. 650-662 - M. W. Allen, Trevor Pearcey, John P. Penny, Gordon A. Rose, J. G. Sanderson:

CIRRUS, An Economical Multiprogram Computer with Microprogram Control. 663-671 - William F. Miller, R. Aschenbrenner:

The GUS Multicomputer System. 671-676 - Thomas B. Lewis:

Primary Processor and Data Storage Equipment for the Orbiting Astronomical Observatory. 677-687 - Ray L. Alonso, Hugh Blair-Smith, Albert L. Hopkins Jr.:

Some Aspects of the Logical Design of a Control Computer: A Case Study. 687-697 - Herbert Schorr, Neil E. Wiseman:

System Design of a Small, Fast Digital Computer. 698-706 - Ronald L. Wigington:

A Machine Organization for a General Purpose List Processor. 707-714 - Hermann Schmid:

An Operational Hybrid Computing System Provides Analog-Type Computation with Digital Elements. 715-732 - Giovanni Battista Gerace:

Microprogrammed Control for Computing Systems. 733-747 - Gerald Estrin, Bertram Bussell, Rein Turn, James Bibb:

Parallel Processing in a Restructurable Computer System. 747-755 - Gerald Estrin, Rein Turn:

Automatic Assignment of Computations in a Variable Structure Computer System. 755-773 - J. Gregory, Robert C. McReynolds:

The SOLOMON Computer. 774-781 - Rodolfo Gonzalez:

A Multilayer Iterative Circuit Computer. 781-790 - Bruce H. McCormick:

The Illinois Pattern Recognition Computer-ILLIAC III. 791-813 - Morton Nadler:

An Analog-Digital Character Recognition System. 814-821 - H. Kazmierczak, Karl Steinbuch:

Adaptive Systems in Pattern Recognition. 822-835 - Toshiyuki Sakai, Shuji Doshita:

The Automatic Speech Recognition System for Conversational Sound. 835-846 - Karl Steinbuch, Uwe A. W. Piske:

Learning Matrices and Their Applications. 846-862 - Walter I. Landauer:

The Balanced Tree and Its Utilization in Information Retrieval. 863-871 - P. A. Lord, Cyril J. Tunis, H. L. Witter:

A Delay-Line Push-Down List. 872-874 - William T. Weeks:

Computer Simulation of the Electrical Properties of Memory Arrays. 874-887 - Klim Maling, E. L. Allen:

A Computer Organization and Programming System for Automated Maintenance. 887-895 - Nicholas C. Metropolis, Robert L. Ashenhurst:

Basic Operations in an Unnormalized Arithmetic System. 896-904 - Antonín Svoboda:

Synthesis of Logical Systems of Given Activity. 904-910 - Arthur Bridgman:

Comments on "Analog Computer Simulation of a Frequency Detector. 911 - D. J. Anderson, Donald L. Dietmeyer:

A Magnetic Ternary Device. 911-914 - Philip Kaszerman:

A Nonlinear-Summation Threshold Device. 914-915 - Thomas A. Kriz, T. Koryu Ishii:

Directional Couplers as Microwave Logic. 915-916 - A. James Lincoln:

A Sequential Magnetic-Core Storage System. 917-918 - Chung Laung Liu:

Determination of the Final State of an Automaton Whose Initial State Is Unknown. 918-921 - Jack Sklansky, Kenneth R. Kaplan:

Transients in Markov Chains. 921-922

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