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ORCIDIEEE Transactions on Circuits and Systems - Part II: Express Briefs, Volume 62-II
Volume 62-II, Number 1, January 2015
- Hyo-Sung Lee, Byung-Wook Min
:
W-Band CMOS 4-Bit Phase Shifter for High Power and Phase Compression Points. 1-5 - Hyo-Sung Lee, Kyungwon Kim, Byung-Wook Min:
On-Chip T/R Switchable Balun for 5- to 6-GHz WLAN Applications. 6-10 - Pablo Martínez-Nuevo, Sharvil Patil, Yannis P. Tsividis:
Derivative Level-Crossing Sampling. 11-15 - Chi-Hao Hong, Chuan-Yi Wu, Yu-Te Liao:
Robustness Enhancement of a Class-C Quadrature Oscillator Using Capacitive Source Degeneration Coupling. 16-20 - Guishu Liang, Long Ma:
Adjoint of a Linear Multiport Element Based on Generalized Duality. 21-25 - Lin He, Jiaqi Yang, Duona Luo, Lele Jin, Shuangshuang Zhang, Fujiang Lin, Libin Yao, Xicheng Jiang:
A Speed-Enhancing Dual-Trial Instantaneous Switching Architecture for SAR ADCs. 26-30 - Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene:
Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture. 31-35 - Vyacheslav A. Buts, Dmytro M. Vavriv, Oleg G. Nechayev, Dmytro V. Tarasov:
A Simple Method for Generating Electromagnetic Oscillations. 36-40 - Zhanjun Bai, Xing Zhou, Ralph D. Mason, Gord Allan:
Low-Phase Noise Clock Distribution Network Using Rotary Traveling-Wave Oscillators and Built-In Self-Test Phase Tuning Technique. 41-45 - Jingcheng Zhuang, Khurram Waheed, Robert Bogdan Staszewski:
Design of Spur-Free ΣΔ Frequency Tuning Interface for Digitally Controlled Oscillators. 46-50 - Donguk Kim, Subin Choi, Jaehyouk Choi, Jae Joon Kim:
A Reconfigurable Multiphase $LC$-Ring Structure for Programmable Frequency Multiplication. 51-55 - Ming Zhao, Xiaolin Zhang, Ling Zhao, Chen Lee:
Design of a High-Throughput QC-LDPC Decoder With TDMP Scheduling. 56-60 - Youngjoo Lee, Bongjin Kim, Jaehwan Jung, In-Cheol Park:
Low-Complexity Tree Architecture for Finding the First Two Minima. 61-64 - Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang:
An Area Efficient Radix-4 Reciprocal Dual Trellis Architecture for a High-Code-Rate Turbo Decoder. 65-69 - Chao Wang, Jun Zhou, Lei Liao, Jingjing Lan, Jianwen Luo, Xin Liu, Minkyu Je:
Near-Threshold Energy- and Area-Efficient Reconfigurable DWPT/DWT Processor for Healthcare-Monitoring Applications. 70-74 - Peng Ouyang, Shouyi Yin, Yuchi Zhang, Leibo Liu, Shaojun Wei:
A Fast Integral Image Computing Hardware Architecture With High Power and Area Efficiency. 75-79 - Meng-Fan Chang, Shu-Meng Yang, Chia-Chen Kuo, Ting-Chin Yang, Che-Ju Yeh, Tun-Fei Chien, Li-Yue Huang, Shyh-Shyuan Sheu, Pei-Ling Tseng, Yu-Sheng Chen, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao:
Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications. 80-84 - Yu Zhao, Guanghui Wen, Zhisheng Duan, Guanrong Chen:
Adaptive Consensus for Multiple Nonidentical Matching Nonlinear Systems: An Edge-Based Framework. 85-89 - Junyi Duan, Guo-Ping Jiang, Hua Yang:
Reference-Adaptive CDSK: An Enhanced Version of Correlation Delay Shift Keying. 90-94 - Jiajing Wu, Chi K. Tse, Francis Chung-Ming Lau:
Optimizing Performance of Communication Networks: An Application of Network Science. 95-99
Volume 62-II, Number 2, February 2015
- Robert Rieger, Jaswinder Lota, Xiao Liu:
Introduction to the Special Issue on Biomedical and Bioelectronic Circuits for Enhanced Diagnosis and Therapy. 101-103 - Aosen Wang, Wenyao Xu, Zhanpeng Jin, Fang Gong:
Quantization Effects in an Analog-to-Information Front End in EEG Telemonitoring. 104-108 - Adam Page, Chris Sagedy, Emily Smith, Nasrin Attaran, Tim Oates, Tinoosh Mohsenin:
A Flexible Multichannel EEG Feature Extractor and Classifier for Seizure Detection. 109-113 - Mahsa Shoaran, Claudio Pollo, Kaspar Schindler, Alexandre Schmid:
A Fully Integrated IC With 0.85-μW/Channel Consumption for Epileptic iEEG Detection. 114-118 - Yao Zou, Jun Han, Sizhong Xuan, Shan Huang, Xinqian Weng, Dabin Fang, Xiaoyang Zeng:
An Energy-Efficient Design for ECG Recording and R-Peak Detection Based on Wavelet Transform. 119-123 - Viviane S. Ghaderi, Dong Song, John Choma Jr., Theodore W. Berger:
Nonlinear Cognitive Signal Processing in Ultralow-Power Programmable Analog Hardware. 124-128 - Francis Rodes, Ming Zhang, Romain Denieport, Xusheng Wang:
Optimization of the Power Transfer Through Human Body With an Auto-Tuning System Using a Synchronous Switched Capacitor. 129-133 - Rashad Ramzan, Faiza Zafar:
High-Efficiency Fully CMOS VCO Rectifier for Microwatt Resonant Wireless Power Transfer. 134-138 - You Zou, Stephen O'Driscoll:
Implant Position Estimation Via Wireless Power Link. 139-143 - Maarten Strackx, Emiliano D'Agostino, Paul Leroux, Patrick Reynaert:
Direct RF Subsampling Receivers Enabling Impulse-Based UWB Signals for Breast Cancer Detection. 144-148 - Kexu Sun, Zheng Gao, Ping Gui, Rui Wang, Ismail Oguzman, Xiaochen Xu, Karthik Vasanth, Qifa Zhou, K. Kirk Shung:
A 180-Vpp Integrated Linear Amplifier for Ultrasonic Imaging Applications in a High-Voltage CMOS SOI Technology. 149-153 - Loucas Constantinou, Richard H. Bayford, Andreas Demosthenous:
A Wideband Low-Distortion CMOS Current Driver for Tissue Impedance Analysis. 154-158 - Numa Couniot, David Bol, Olivier Poncelet, Laurent A. Francis, Denis Flandre:
A Capacitance-to-Frequency Converter With On-Chip Passivated Microelectrodes for Bacteria Detection in Saline Buffers Up to 575 MHz. 159-163 - Gloria Huertas, Andrés Maldonado, Alberto Yufera, Adoración Rueda, José Luis Huertas:
The Bio-Oscillator: A Circuit for Cell-Culture Assays. 164-168 - Chang-Hee Hyoung, Jung-Hwan Hwang, Sung-Wen Kang, Seong-Ook Park, Youn-Tae Kim:
A Feasibility Study on the Adoption of Human Body Communication for Medical Service. 169-173 - Sina Viseh, Maysam Ghovanloo, Tinoosh Mohsenin:
Toward an Ultralow-Power Onboard Processor for Tongue Drive System. 174-178 - Jiafei Wu, Andersen Man Shun Ang, Kai Man Tsui, H. C. Wu, Yeung Sam Hung, Yong Hu, Joseph N. F. Mak, Shing-Chow Chan, Z. G. Zhang:
Efficient Implementation and Design of a New Single-Channel Electrooculography-Based Human-Machine Interface System. 179-183 - Lorenzo Bisoni, Caterina Carboni, Luigi Raffo, Nicola Carta, Massimo Barbaro:
An HV-CMOS Integrated Circuit for Neural Stimulation in Prosthetic Applications. 184-188 - Hariprasad Chandrakumar, Dejan Markovic:
A Simple Area-Efficient Ripple-Rejection Technique for Chopped Biosignal Amplifiers. 189-193 - Myungjin Han, Boram Kim, Yi-An Chen, Hyojung Lee, Seung-Han Park, Eunji Cheong, Jongill Hong, Gunhee Han, Youngcheol Chae:
Bulk Switching Instrumentation Amplifier for a High-Impedance Source in Neural Signal Recording. 194-198 - Tzu-Yun Wang, Li-Han Liu, Sheng-Yu Peng:
A Power-Efficient Highly Linear Reconfigurable Biopotential Sensing Amplifier Using Gate-Balanced Pseudoresistors. 199-203 - Liang Zuo, Syed Kamrul Islam, Ifana Mahbub, Farhan Quaiyum:
A Low-Power 1-V Potentiostat for Glucose Sensors. 204-208 - Thanh Trung Nguyen, Philipp Häfliger:
A Submicrowatt Implantable Capacitive Sensor System for Biomedical Applications. 209-213
Volume 62-II, Number 3, March 2015
- Chua-Chin Wang, Wen-Je Lu, Tsung-Yi Tsai:
Analysis of Calibrated On-Chip Temperature Sensor With Process Compensation for HV Chips. 217-221 - S. C. Dutta Roy:
Characteristics of Single- and Multiple-Frequency Impedance Matching Networks. 222-225 - Yinan Wang, Håkan Johansson, Hui Xu:
Adaptive Background Estimation for Static Nonlinearity Mismatches in Two-Channel TIADCs. 226-230 - B. Hoda Seyedhosseinzadeh, Abdolreza Nabavi:
A MOS Parametric Integrator With Improved Linearity for SC ΣΔ Modulators. 231-235 - Hua Zhang, Ling Lu:
A Low-Voltage Sense Amplifier for Embedded Flash Memories. 236-240 - Lin He, Guanglong Zhu, Fang Long, Yuncheng Zhang, Li Wang, Fujiang Lin, Libin Yao, Xicheng Jiang:
A Multibit Delta-Sigma Modulator With Double Noise-Shaped Segmentation. 241-245 - Zushu Yan, Wei Wang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.0045-mm2 32.4-µW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation. 246-250 - Fengjiang Wu, Lujie Zhang, Jiandong Duan:
A New Two-Phase Stationary-Frame-Based Enhanced PLL for Three-Phase Grid Synchronization. 251-255 - Jun Luo, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
Behavioral Analysis and Optimization of CMOS CML Dividers for Millimeter-Wave Applications. 256-260 - Marko Neitola, Timo Rahkonen:
Generalized Quadrature Data Weighted Averaging. 261-265 - Ren-Der Chen, Pei-Yin Chen, Chun-Hsien Yeh:
A Low-Power Architecture for the Design of a One-Dimensional Median Filter. 266-270 - JinWoo Yoo, JaeWook Shin, PooGyeon Park:
An Improved NLMS Algorithm in Sparse Systems Against Noisy Input Signals. 271-275 - Elizabeth Rita Samuel, Luc Knockaert, Tom Dhaene:
Matrix-Interpolation-Based Parametric Model Order Reduction for Multiconductor Transmission Lines With Delays. 276-280 - Nankun Mu, Xiaofeng Liao, Tingwen Huang:
Event-Based Consensus Control for a Linear Directed Multiagent System With Time Delay. 281-285 - Jose Augusto Lima, John W. M. Rogers, Rony E. Amaya:
Optimization of EVM Through Diode Bias Control Using a Blind Algorithm Applied to Multiport Receivers. 286-290 - Long Zhao, Ke Li, Kan Zheng, M. Omair Ahmad:
An Analysis of the Tradeoff Between the Energy and Spectrum Efficiencies in an Uplink Massive MIMO-OFDM System. 291-295 - Yixiao Wang, Le Ye, Huailin Liao, Ru Huang, Yangyuan Wang:
Highly Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 65-nm CMOS. 296-300 - Xin-Ru Lee, Chih-Wen Yang, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee:
An Area-Efficient Relaxed Half-Stochastic Decoding Architecture for Nonbinary LDPC Codes. 301-305 - Hoyoung Yoo, In-Cheol Park:
Partially Parallel Encoder Architecture for Long Polar Codes. 306-310 - Santanu Kapat:
Selectively Sampled Subharmonic-Free Digital Current Mode Control Using Direct Duty Control. 311-315
Volume 62-II, Number 4, April 2015
- Saber Amini, David A. Johns:
A Flexible Charge-Balanced Ratiometric Open-Loop Readout System for Capacitive Inertial Sensors. 317-321 - Walter D. Leon-Salas:
Low-Complexity Compression for Sensory Systems. 322-326 - Dong-Soo Lee, Jae-Hyung Jang, Hyung-Gu Park, YoungGun Pu, Keum-Cheol Hwang, Youngoo Yang, Munkyo Seo, Kang-Yoon Lee:
A Wide-Locking-Range Dual Injection-Locked Frequency Divider With an Automatic Frequency Calibration Loop in 65-nm CMOS. 327-331 - Anith Selvakumar, Antonio Liscidini:
Current-Recycling Complex Filter for Bluetooth-Low-Energy Applications. 332-336 - Xiaoyang Wang, Hai Huang, Qiang Li:
Design Considerations of Ultralow-Voltage Self-Calibrated SAR ADC. 337-341 - Peng Chen, Songbai He:
Analysis of Inverse Class-E Power Amplifier at Subnominal Condition With 50% Duty Ratio. 342-346 - Ming-Lin Chuang, Ming-Tien Wu:
Switchable Dual-Band Filter With Common Quarter-Wavelength Resonators. 347-351 - Lixue Kuang, Baoyong Chi, Haikun Jia, Wen Jia, Zhihua Wang:
A 60-GHz CMOS Dual-Mode Power Amplifier With Efficiency Enhancement at Low Output Power. 352-356 - Hokyu Lee, Sejin Park, Chaegang Lim, Chulwoo Kim:
A 100-nW 9.1-ENOB 20-kS/s SAR ADC for Portable Pulse Oximeter. 357-361 - Deepak Mishra, Swades De, Kaushik R. Chowdhury:
Charging Time Characterization for Wireless RF Energy Transfer. 362-366 - Jingwei Hu, Wei Guo, Jizeng Wei, Ray C. C. Cheung:
Fast and Generic Inversion Architectures Over GF(2m) Using Modified Itoh-Tsujii Algorithms. 367-371 - Abdelkrim Kamel Oudjida, Nicolas Chaillet, Mohamed Lamine Berrandjia:
Radix-2r Arithmetic for Multiplication by a Constant: Further Results and Improvements. 372-376 - Siavash Bayat Sarmadi, Mohammad Farmani:
High-Throughput Low-Complexity Systolic Montgomery Multiplication Over GF(2m) Based on Trinomials. 377-381 - Sunjie Zhang, Zidong Wang, Derui Ding, Huisheng Shu, Tasawar Hayat, Abdullah M. Dobaie:
On Design of Robust Fault Detection Filter in Finite-Frequency Domain With Regional Pole Assignment. 382-386 - Adam Neale, Maarten Jonkman, Manoj Sachdev:
Adjacent-MBU-Tolerant SEC-DED-TAEC-yAED Codes for Embedded SRAMs. 387-391 - Anu Kalidas Muralidharan Pillai, Håkan Johansson:
Prefilter-Based Reconfigurable Reconstructor for Time-Interleaved ADCs With Missing Samples. 392-396 - Amir Eghbali, Håkan Johansson:
Design of Modulated Filter Banks and Transmultiplexers With Unified Initial Solutions and Very Few Unknown Parameters. 397-401 - Zhenyu Yin, Heng Tian, Guanhua Chen, Leon O. Chua:
What are Memristor, Memcapacitor, and Meminductor? 402-406 - Alexander Jimenez Triana, Guanrong Chen, Alain Gauthier:
A Parameter-Perturbation Method for Chaos Control to Stabilizing UPOs. 407-411 - Kehan Zhu, Vishal Saxena, Xinyu Wu, Wan Kuang:
Design Considerations for Traveling-Wave Modulator-Based CMOS Photonic Transmitters. 412-416
Volume 62-II, Number 5, May 2015
- Fahad Quiz, Quoc-Tai Duong, Jerzy J. Dabrowski:
Two-Stage Highly Selective Receiver Front End Based on Impedance Transformation Filtering. 421-425 - Manzur Rahman, Arindam Sanyal, Nan Sun:
A Novel Hybrid Radix-3/Radix-2 SAR ADC With Fast Convergence and Low Hardware Complexity. 426-430 - Linxiao Zhang, Yang Xu, Karthik Tripurari, Peter R. Kinget, Harish Krishnaswamy:
Analysis and Design of a 0.6- to 10.5-GHz LNTA for Wideband Receivers. 431-435 - Jerrin Pathrose, Chengye Liu, Kevin T. C. Chai, Yong Ping Xu:
A Time-Domain Band-Gap Temperature Sensor in SOI CMOS for High-Temperature Applications. 436-440 - Geunyeong Park, Minkyu Song:
A CMOS Current-Steering D/A Converter With Full-Swing Output Voltage and a Quaternary Driver. 441-445 - Hugo B. Goncalves, Miguel A. Martins, Jorge R. Fernandes:
Fully Integrated Energy Harvesting Circuit With -25-dBm Sensitivity Using Transformer Matching. 446-450 - Jong-Boo Kim, Seong-Kwan Hong, Oh-Kyong Kwon:
A Low-Power CMOS Image Sensor With Area-Efficient 14-bit Two-Step SA ADCs Using Pseudomultiple Sampling Method. 451-455 - Kareem Ragab, Long Chen, Arindam Sanyal, Nan Sun:
Digital Background Calibration for Pipelined ADCs Based on Comparator Decision Time Quantization. 456-460 - Pi-Feng Chiu, Borivoje Nikolic:
A Differential 2R Crosspoint RRAM Array With Zero Standby Current. 461-465 - Shen-Fu Hsiao, Po-Han Wu, Chia-Sheng Wen, Pramod Kumar Meher:
Table Size Reduction Methods for Faithfully Rounded Lookup-Table-Based Multiplierless Function Evaluation. 466-470 - Chia-Hsiang Chen, Shiming Song, Zhengya Zhang:
An FPGA-Based Transient Error Simulator for Resilient Circuit and System Design and Evaluation. 471-475 - Mandeep Chaudhary, Peter Lee:
An Improved Two-Step Binary Logarithmic Converter for FPGAs. 476-480 - Jiafeng Xie, Pramod Kumar Meher, Zhi-Hong Mao:
High-Throughput Digit-Level Systolic Multiplier Over GF(2m) Based on Irreducible Trinomials. 481-485 - Håkan Johansson, Heinz G. Göckler:
Two-Stage-Based Polyphase Structures for Arbitrary-Integer Sampling Rate Conversion. 486-490 - Rajib Lochan Das, Mrityunjoy Chakraborty:
On Convergence of Proportionate-Type Normalized Least Mean Square Algorithms. 491-495 - Yun Huang, Peng Zhang, Weifeng Zhao:
Novel Grid Multiwing Butterfly Chaotic Attractors and Their Circuit Design. 496-500 - Matteo Biggio, Alberto Oliveri, Flavio Stellino, Mauro Parodi, Marco Storace:
A Circuit Model of Hysteresis and Creep. 501-505 - Ines Zaidi, Mohamed Chaabane, Fernando Tadeo, Abdellah Benzaouia:
Static State-Feedback Controller and Observer Design for Interval Positive Systems With Time Delay. 506-510 - Yao Chen:
Characterizing the Convergence of a Distributed Consensus Algorithm via Relative Hull. 511-515
Volume 62-II, Number 6, June 2015
- Surya Sharma, Trond Ytterdal:
In-Probe Ultrasound Beamformer Utilizing Switched-Current Analog RAM. 517-521 - Kuduck Kwon:
A 50- to 300-MHz CMOS Gm-C Tracking Filter Based on Parallel Operation of Saturation and Triode Transconductors for Digital TV Tuner ICs. 522-526 - Yonghong Tao, Andreas Hierlemann, Yong Lian:
A Frequency-Domain Analysis of Latch Comparator Offset due to Load Capacitor Mismatch. 527-532 - Jin-hee Kwon, Mincheol Seo, Hwiseob Lee, Je-hyun Gu, Junghyun Ham, Keum-Cheol Hwang, Kang-Yoon Lee, Cheon-Seok Park, Youngoo Yang:
Broadband Doherty Power Amplifier Based on Asymmetric Load Matching Networks. 533-537 - Sen Tao, Emmanuel Abbe, Naveen Verma:
Statistical ADC Enhanced by Pipelining and Subranging. 538-542 - Bertrand Lonla Moffo, Jean Mbihi:
A Novel Digital Duty-Cycle Modulation Scheme for FPGA-Based Digital-to-Analog Conversion. 543-547 - Chih-Lu Wei, Ting-Kuei Kuan, Shen-Iuan Liu:
A Subharmonically Injection-Locked PLL With Calibrated Injection Pulsewidth. 548-552 - Lianhong Zhou, Muthukumaraswamy Annamalai Arasu, Minkyu Je, Libin Yao, Chun-Huat Heng:
A Fully Integrated Temperature-Independent Reconfigurable Acoustic Transmitter With Digital On-Chip Resistor Temperature Coefficient Calibration for Oil Drilling Application. 553-557 - Geunyong Lee, Jonghun Jung, Jong-In Song:
A Multiband Power Amplifier With a Reconfigurable Output-Matching Network for 10-MHz BW LTE Mobile Phone Applications. 558-562 - Matheus Trevisan Moreira, Michel Evandro Arendt, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Static Differential NCL Gates: Toward Low Power. 563-567 - Arash Ardakani, Mahdi Shabany:
A Novel Area-Efficient VLSI Architecture for Recursion Computation in LTE Turbo Decoders. 568-572 - Aynaz Vatankhahghadim, W. Song, Ali Sheikholeslami:
A Variation-Tolerant MRAM-Backed-SRAM Cell for a Nonvolatile Dynamically Reconfigurable FPGA. 573-577 - Yupeng Hu, Shun Song, Sheng Xiao, Quan Xu, Nong Xiao, Zheng Qin:
A Dominating Error Region Strategy for Improving the Bit-Flipping LDPC Decoder of SSDs. 578-582 - Ghassem Jaberipur, Seyed Hamed Fatemi Langroudi:
(4+2 log n)ΔG Parallel Prefix Modulo-(2n-3) Adder via Double Representation of Residues in [0, 2]. 583-587 - Shih-Lun Chen, Huan-Rui Chang:
Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications. 588-592 - Wen Yueh, Subho Chatterjee, Muneeb Zia, Swarup Bhunia, Saibal Mukhopadhyay:
A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric. 593-597 - Tokunbo Ogunfunmi, Thomas K. Paul:
The Quarternion Maximum Correntropy Algorithm. 598-602 - Xian Hui Mai, Du-Qu Wei, Bo Zhang, Xiao-Shu Luo:
Controlling Chaos in Complex Motor Networks by Environment. 603-607 - Simran Singh, Mikko Valkama, Michael Epp, Wolfgang Schlecker:
Frequency Response Mismatch Analysis in Time-Interleaved Analog I/Q Processing and ADCs. 608-612 - Gyung-Su Byun, Mir Mohammad Navidi:
A Low-Power 4-PAM Transceiver Using a Dual-Sampling Technique for Heterogeneous Latency-Sensitive Network-on-Chip. 613-617
Volume 62-II, Number 7, July 2015
- Yutao Wang, Zhangming Zhu, Jiaojiao Yao, Yintang Yang:
A 0.45-V, 14.6-nW CMOS Subthreshold Voltage Reference With No Resistors and No BJTs. 621-625 - Ashis Maity, Amit Patra:
Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator. 626-630 - Jungho Kim, Young-Hwa Kim, KwangSeok Kim, Wonsik Yu, SeongHwan Cho:
A Hybrid-Domain Two-Step Time-to-Digital Converter Using a Switch-Based Time-to-Voltage Converter and SAR ADC. 631-635 - Xianhe Huang, Dong Liu, Yan Wang, Pingping Chen, Wei Fu:
100-MHz Low-Phase-Noise Microprocessor Temperature-Compensated Crystal Oscillator. 636-640 - Hyongmin Lee, Jisung Kim, Dongwoo Ha, Taehoon Kim, Suhwan Kim:
Differentiating ASK Demodulator for Contactless Smart Cards Supporting VHBR. 641-645 - Ameya Bhide, Amin Ojani, Atila Alvandpour:
Effect of Clock Duty-Cycle Error on Two-Channel Interleaved ΔΣ DACs. 646-650 - Renzhi Liu, Larry T. Pileggi:
Low-Overhead Self-Healing Methodology for Current Matching in Current-Steering DAC. 651-655 - Wenjuan Guo, Tsedeniya Abraham, Steven Chiang, Chintan Trehan, Masahiro Yoshioka, Nan Sun:
An Area- and Power-Efficient Iref Compensation Technique for Voltage-Mode R-2R DACs. 656-660 - José O. Cadenas, Graham M. Megson, Robert Simon Sherratt:
Median Filter Architecture by Accumulative Parallel Counters. 661-665 - Zhen Gao, Pedro Reviriego, Zhan Xu, Xin Su, Jing Wang, Juan Antonio Maestro:
Efficient Coding Schemes for Fault-Tolerant Parallel Filters. 666-670 - Wenfeng Zhao, Anastacia B. Alvarez, Yajun Ha:
A 65-nm 25.1-ns 30.7-fJ Robust Subthreshold Level Shifter With Wide Conversion Range. 671-675 - Isha Gupta, Alexantrou Serb, Radu Berdan, Ali Khiat, Anna Regoutz, Themis Prodromakis:
A Cell Classifier for RRAM Process Development. 676-680 - Pablo Amil, Cecilia Cabeza, Arturo C. Marti:
Exact Discrete-Time Implementation of the Mackey-Glass Delayed Model. 681-685 - Oleg Vityaz:
Feedback Modeling Using Bilateral Two Ports. 686-690 - Fayssal Arichi, Mohamed Djemai, Brahim Cherki, Noureddine Manamanni:
Continuous and Discrete State Estimation for a Class of Nonlinear Switched Systems. 691-695 - Dena Karimipour, Farzad Rajaei Salmasi:
Stability Analysis of AC Microgrids With Constant Power Loads Based on Popov's Absolute Stability Criterion. 696-700 - Robert W. Jackson:
Time-Selective Sampling Receiver for Interference Rejection. 701-705 - Huiyun Liu, Yongxiang Xia:
Optimal Resource Allocation in Complex Communication Networks. 706-710 - Mark Stoopman, Yao Liu, Hubregt J. Visser, Kathleen Philips, Wouter A. Serdijn:
Codesign of Electrically Short Antenna-Electronics Interfaces in the Receiving Mode. 711-715 - Jing Xue, Hoi Lee:
A 2-MHz 60-W Zero-Voltage-Switching Synchronous Noninverting Buck-Boost Converter With Reduced Component Values. 716-720
Volume 62-II, Number 8, August 2015
- Chixiao Chen, Zemin Feng, Jun Xu, Fan Ye, Junyan Ren:
An ARMA-Model-Based NTF Estimation on Continuous-Time ΔΣ Modulators. 721-725 - Kamal El-Sankary, Tetsuya Asai, Masato Motomura, Tadahiro Kuroda:
Crosstalk Rejection in 3-D-Stacked Interchip Communication With Blind Source Separation. 726-730 - Ahmed Fahmy, Jun Liu, Taewook Kim, Nima Maghari:
An All-Digital Scalable and Reconfigurable Wide-Input Range Stochastic ADC Using Only Standard Cells. 731-735 - Yudong Zhang, Woogeun Rhee, Taeik Kim, Hojin Park, Zhihua Wang:
A 0.35-0.5-V 18-152 MHz Digitally Controlled Relaxation Oscillator With Adaptive Threshold Calibration in 65-nm CMOS. 736-740 - Claudia Palattella, Eric A. M. Klumperink, Jiayun Ru, Bram Nauta:
A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation. 741-745 - Antoine Bonnetat, Jean-Michel Hode, Guillaume Ferré, Dominique Dallet:
Correlation-Based Frequency-Response Mismatch Compensation of Quad-TIADC Using Real Samples. 746-750 - Cheng Huang, Philip K. T. Mok:
A Delay-Line-Based Voltage-to-Duty-Cycle Controller for High-Frequency PWM Switching Converters. 751-755 - Xiaoyang Wang, Xiong Zhou, Qiang Li:
A High-Speed Energy-Efficient Segmented Prequantize and Bypass DAC for SAR ADCs. 756-760 - Qing Xie, Xue Lin, Yanzhi Wang, Shuang Chen, Mohammad Javad Dousti, Massoud Pedram:
Performance Comparisons Between 7-nm FinFET and Conventional Bulk CMOS Standard Cell Libraries. 761-765 - Ioannis Tsatsaragkos, Vassilis Paliouras:
Approximate Algorithms for Identifying Minima on Min-Sum LDPC Decoders and Their Hardware Implementation. 766-770 - Pavel Zahradnik, Michal Susta, Miroslav Vlcek, Boris Simák:
Degree of Equiripple Narrow Bandpass FIR Filter. 771-775 - Naoki Shimada, Hiroyuki Torikai:
A Novel Asynchronous Cellular Automaton Multicompartment Neuron Model. 776-780 - Yang Zhang, Yi Shen, Xiaoping Wang, Yanwen Guo:
A Novel Design for a Memristor-Based or Gate. 781-785 - Shahar Kvatinsky, Misbah Ramadan, Eby G. Friedman, Avinoam Kolodny:
VTEAM: A General Model for Voltage-Controlled Memristors. 786-790 - Bin Liu, David J. Hill, Zhijie Sun:
Mixed K-Dissipativity and Stabilization to ISS for Impulsive Hybrid Systems. 791-795 - Ming-Can Fan, Hai-Tao Zhang, Zongli Lin:
Distributed Semiglobal Consensus With Relative Output Feedback and Input Saturation Under Directed Switching Networks. 796-800 - Jie Lian, Jiao Liu, Yan Zhuang:
Mean Stability of Positive Markov Jump Linear Systems With Homogeneous and Switching Transition Probabilities. 801-805 - Ming Shen, Yingzeng Yin, Hao Jiang, Tong Tian, Ole K. Jensen, Jan H. Mikkelsen:
A 0.76-pJ/Pulse 0.1-1 Gpps Microwatt IR-UWB CMOS Pulse Generator With Adaptive PSD Control Using a Limited Monocycle Precharge Technique. 806-810 - John W. Simpson-Porco, Florian Dörfler, Francesco Bullo:
On Resistive Networks of Constant-Power Devices. 811-815 - Muhammad Aamir, Saad Mekhilef, Hee-Jun Kim:
High-Gain Zero-Voltage Switching Bidirectional Converter With a Reduced Number of Switches. 816-820
Volume 62-II, Number 9, September 2015
- Antoine Bonnetat, Jean-Michel Hode, Guillaume Ferré, Dominique Dallet:
An Adaptive All-Digital Blind Compensation of Dual-TIADC Frequency-Response Mismatch Based on Complex Signal Correlations. 821-825 - Tohid Moosazadeh, Mohammad Yavari:
A Calibration Technique for Pipelined ADCs Using Self-Measurement and Histogram-Based Test Methods. 826-830 - Dong Wang, John P. Keane, Paul J. Hurst, Stephen H. Lewis:
An Integrator-Based Pipelined ADC With Digital Calibration. 831-835 - Sungchun Jang, Sungwoo Kim, Sang-Hyeok Chu, Gyu-Seob Jeong, Yoonsoo Kim, Deog-Kyoon Jeong:
An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang-Bang Phase-Frequency Detection. 836-840 - Muhammad Ali Montazerolghaem, Tohid Moosazadeh, Mohammad Yavari:
A Predetermined LMS Digital Background Calibration Technique for Pipelined ADCs. 841-845 - Yesung Kang, Jaehyouk Choi, Youngmin Kim:
A Wide-Range On-Chip Leakage Sensor Using a Current-Frequency Converting Technique in 65-nm Technology Node. 846-850 - Yuan-Ho Chen:
Area-Efficient Fixed-Width Squarer With Dynamic Error-Compensation Circuit. 851-855 - Tiben Che, Jingwei Xu, Gwan Choi:
Accelerated Dual-Path Asynchronous Circuit. 856-860 - Sergio D. Muñoz, Javier Hormigo:
High-Throughput FPGA Implementation of QR Decomposition. 861-865 - Mina Kim, Christopher M. Twigg:
A Ramp Converter Approach to Rank Modulation. 866-870 - Choon Ki Ahn, Haranath Kar:
Passivity and Finite-Gain Performance for Two-Dimensional Digital Filters: The FM LSS Model Case. 871-875 - Zhen-guo Ma, Xiaobo Yin, Feng Yu:
A Novel Memory-Based FFT Architecture for Real-Valued Signals Based on a Radix-2 Decimation-In-Frequency Algorithm. 876-880 - Keunsang Lee, Yonghyun Baek, Youngcheol Park:
Nonlinear Acoustic Echo Cancellation Using a Nonlinear Postprocessor With a Linearly Constrained Affine Projection Algorithm. 881-885 - Alberto Oliveri, Martin Reimers, Marco Storace:
Automatic Domain Partitioning of Piecewise-Affine Simplicial Functions Implementing Model Predictive Controllers. 886-890 - Lars Keuninckx, Guy van der Sande, Jan Danckaert:
Simple Two-Transistor Single-Supply Resistor-Capacitor Chaotic Oscillator. 891-895 - Luiz Antonio Jacyntho, Marcelo Carvalho Minhoto Teixeira, Edvaldo Assunção, Rodrigo Cardim, Roberto Kawakami Harrop Galvão, Sillas Hadjiloucas:
Identification of Fractional-Order Transfer Functions Using a Step Excitation. 896-900 - Georges Kaddoum, Ebrahim A. Soujeri, Carlos Arcila, Khaled M. Eshteiwi:
I-DCSK: An Improved Noncoherent Communication System Architecture. 901-905 - Hyeji Kim, Injun Choi, Wooseok Byun, Jong-Yeol Lee, Ji-Hoon Kim:
Distributed CRC Architecture for High-Radix Parallel Turbo Decoding in LTE-Advanced Systems. 906-910 - Taewook Kang, Sungeun Kim, Changhee Hyoung, Sungweon Kang, Kyunghwan Park:
An Energy Combiner for a Multi-Input Energy-Harvesting System. 911-915
Volume 62-II, Number 10, October 2015
- Jianhui Wu, Zixuan Wang, Chao Chen, Cheng Huang, Meng Zhang:
A 2.4-GHz All-Digital PLL With a 1-ps Resolution 0.9-mW Edge-Interchanging-Based Stochastic TDC. 917-921 - Qi Zhang, You-Jiang Liu, Jie Zhou, Shubo Jin, Wenhua Chen, Silong Zhang:
A Band-Divided Memory Polynomial for Wideband Digital Predistortion With Limited Bandwidth Feedback. 922-926 - Tan Yang, Jeremy Holleman:
An Ultralow-Power Low-Noise CMOS Biopotential Amplifier for Neural Recording. 927-931 - Min-Kyu Kim, Seong-Kwan Hong, Oh-Kyong Kwon:
A Small-Area and Energy-Efficient 12-bit SA-ADC With Residue Sampling and Digital Calibration for CMOS Image Sensors. 932-936 - Chengyue Yu, Liter Siek:
An Area-Efficient Current-Mode Bandgap Reference With Intrinsic Robust Start-Up Behavior. 937-941 - Linfei Guo, Tong Ge, Joseph S. Chang:
An Ultralow-Power Overcurrent Protection Circuit for Micropower Class D Amplifiers. 942-946 - Jin-Jyh Su, Kemal S. Demirci, Oliver Brand:
A Low-Leakage Body-Guarded Analog Switch in 0.35-μm BiCMOS and Its Applications in Low-Speed Switched-Capacitor Circuits. 947-951 - Peng Zhu, Xinpeng Xing, Georges G. E. Gielen:
A 40-MHz Bandwidth 0-2 MASH VCO-Based Delta-Sigma ADC With 35-fJ/Step FoM. 952-956 - Pietro Monsurrò, Alessandro Trifiletti:
Subsampling Models of Bandwidth Mismatch for Time-Interleaved Converter Calibration. 957-961 - Ivan R. Padilla-Cantoya, Paul M. Furth:
Enhanced Grounded Capacitor Multiplier and Its Floating Implementation for Analog Filters. 962-966 - Jinook Song:
Hardware Reduction of MASH Delta-Sigma Modulator Based on Partially Folded Architecture. 967-971 - Xinming Huang, Wei Wang:
A Novel and Efficient Design for an RSA Cryptosystem With a Very Large Key Size. 972-976 - Miquel L. Alomar, Miguel C. Soriano, Miguel Angel Escalona-Morán, Vincent Canals, Ingo Fischer, Claudio R. Mirasso, José Luis Rosselló:
Digital Implementation of a Single Dynamical Node Reservoir Computer. 977-981 - Ying Wei, Shaoguang Huang, Xiaojie Ma:
A Novel Approach to Design Low-Cost Two-Stage Frequency-Response Masking Filters. 982-986 - Junlong Zhou, Jianming Yan, Tongquan Wei, Kaijie Wu, Xiaodao Chen, Shiyan Hu:
Sharp Corner/Edge Recognition in Domestic Environments Using RGB-D Camera Systems. 987-991 - Sung-Hyuk Yim, Han-Sol Lee, Woo-Jin Song:
A Proportionate Diffusion LMS Algorithm for Sparse Distributed Estimation. 992-996 - Danhua He, Liguang Xu:
Ultimate Boundedness of Nonautonomous Dynamical Complex Networks Under Impulsive Control. 997-1001 - Xiaobing Nie, Wei Xing Zheng:
Complete Stability of Neural Networks With Nonmonotonic Piecewise Linear Activation Functions. 1002-1006 - Nankun Mu, Xiaofeng Liao, Tingwen Huang:
Leader-Following Consensus in Second-Order Multiagent Systems via Event-Triggered Control With Nonperiodic Sampled Data. 1007-1011
Volume 62-II, Number 11, November 2015
- Aidin Tofangdarzade, Ali Jalali:
An Efficient Method to Analyze Lock Range in Ring Oscillators With Multiple Injections. 1013-1017 - Nghia Tang, Wookpyo Hong, Jong-Hoon Kim, Youngoo Yang, Deukhyoun Heo:
A Sub-1-V Bulk-Driven Opamp With an Effective Transconductance-Stabilizing Technique. 1018-1022 - Dong-Hoon Jung, Young-Jae An, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM. 1023-1027 - Young-Joon Kim, Hansraj S. Bhamra, Jithin Joseph, Pedro P. Irazoqui:
An Ultra-Low-Power RF Energy-Harvesting Transceiver for Multiple-Node Sensor Application. 1028-1032 - Kai-Hui Zeng, Ting-Kuei Kuan, Shen-Iuan Liu:
A Subharmonically Injection-Locked All-Digital PLL Without Main Divider. 1033-1037 - Daniel J. White, Michael W. Hoffman, Sina Balkir:
Digital Offset Cancellation for Long Time-Constant Subthreshold OTA-C Integrators. 1038-1042 - Changhyuk Lee, Wei Chao, Sunwoo Lee, James C. Hone, Alyosha C. Molnar, Sang Hoon Hong:
A Low-Power Edge Detection Image Sensor Based on Parallel Digital Pulse Computation. 1043-1047 - Il Won Seo, Eun Sik Jung, Man Young Sung:
An Analog Front-End IC Design for 320 × 240 Microbolometer Array Applications. 1048-1052 - Rakesh Kumar Palani, Ramesh Harjani:
A 220-MS/s 9-Bit 2X Time-Interleaved SAR ADC With a 133-fF Input Capacitance and a FOM of 37 fJ/conv in 65-nm CMOS. 1053-1057 - Duksoo Kim, Byungjoon Kim, Sangwook Nam:
A Transconductor and Tunable Gm-C High-Pass Filter Linearization Technique Using Feedforward Gm3 Canceling. 1058-1062 - Yue Hu, Hariprasath Venkatram, Nima Maghari, Un-Ku Moon:
A Continuous-Time ΔΣ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation. 1063-1067 - Jaehwan Jung, Hoyoung Yoo, Youngjoo Lee, In-Cheol Park:
Efficient Parallel Architecture for Linear Feedback Shift Registers. 1068-1072 - Chang-Hung Tsai, Yu-Ting Chih, Wing Hung Wong, Chen-Yi Lee:
A Hardware-Efficient Sigmoid Function With Adjustable Precision for a Neural Network System. 1073-1077 - Zia Uddin Ahamed Khan, Mohammed Benaissa:
Throughput/Area-efficient ECC Processor Using Montgomery Point Multiplication on FPGA. 1078-1082 - Jinqi Liu, Qianjian Xing, Xiaobo Yin, Xiubin Mao, Feng Yu:
Pipelined Architecture for a Radix-2 Fast Walsh-Hadamard-Fourier Transform Algorithm. 1083-1087 - Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal:
A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning. 1088-1092 - Chu Yu, Yu-Shan Su:
Two-Mode Reed-Solomon Decoder Using A Simplified Step-by-Step Algorithm. 1093-1097 - Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat:
NISC-Based Soft-Input-Soft-Output Demapper. 1098-1102 - Hadi Alasti, Saeed Gazor:
Vectored Implementation of Hierarchical 22n QAM. 1103-1107
Volume 62-II, Number 12, December 2015
- Taehui Na, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
A Double-Sensing-Margin Offset-Canceling Dual-Stage Sensing Circuit for Resistive Nonvolatile Memory. 1109-1113 - Yan Han, Yuji Qian, Jun Sun, Shifeng Zhang:
A Self-Calibration Technique for On-Chip Precise Clock Generator. 1114-1118 - Christian Venerus, Ian Galton:
Quantization Noise Cancellation for FDC-Based Fractional-N PLLs. 1119-1123 - Lin He, Lele Jin, Jiaqi Yang, Fujiang Lin, Libin Yao, Xicheng Jiang:
Self-Dithering Technique for High-Resolution SAR ADC Design. 1124-1128 - Jerry Lam, Tom A. D. Riley, Norman M. Filiol, John W. M. Rogers, Calvin Plett:
A 0.009-1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching. 1129-1133 - Kyungmin Kim, Changsik Yoo:
Variation-Tolerant Sensing Circuit for Spin-Transfer Torque MRAM. 1134-1138 - Yibo Fan, Leilei Huang, Yufeng Bai, Xiaoyang Zeng:
A Parallel-Access Mapping Method for the Data Exchange Buffers Around DCT/IDCT in HEVC Encoders Based on Single-Port SRAMs. 1139-1143 - M. Mohamed Asan Basiri, Sk. Noor Mahammad:
Configurable Folded IIR Filter Design. 1144-1148 - Xin Liu, Jun Zhou, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang, Xin Zhang, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je:
An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing. 1149-1153 - Mohammad Kazemi, Engin Ipek, Eby G. Friedman:
Energy-Efficient Nonvolatile Flip-Flop With Subnanosecond Data Backup Time for Fine-Grain Power Gating. 1154-1158 - Hamidreza Sadreazami, M. Omair Ahmad, M. N. Shanmukha Swamy:
A Robust Multiplicative Watermark Detector for Color Images in Sparse Domain. 1159-1163 - Mariane R. Petraglia, Diego B. Haddad, Elias L. Marques:
Normalized Subband Adaptive Filtering Algorithm With Reduced Computational Complexity. 1164-1168 - D. Moro-Frías, Carlos Aristoteles De la Cruz-Blas, María Teresa Sanz-Pascual:
PWL Current-Mode CMOS Exponential Circuit Based on Maximum Operator. 1169-1173 - Yingjing Shi, Rui Li, Kok Lay Teo:
Design of a Band-Stop Filter for a Space Shuttle Vehicle. 1174-1178 - Mrinal J. Sarmah, Syed Azeemuddin:
A Circuit to Eliminate Serial Skew in High-Speed Serial Communication Channels. 1179-1183 - Kyungmin Na, Heedon Jang, Hyunggun Ma, Yunho Choi, Franklin Bien:
A 200-Mb/s Data Rate 3.1-4.8-GHz IR-UWB All-Digital Pulse Generator With DB-BPSK Modulation. 1184-1188 - Hen-Geul Yeh:
Architectures for MIMO-OFDM Systems in Frequency-Selective Mobile Fading Channels. 1189-1193 - Kuo-Chun Wu, Hung-Hsien Wu, Chia-Ling Wei:
Analysis and Design of Mixed-Mode Operation for Noninverting Buck-Boost DC-DC Converters. 1194-1198 - Lisong Li, Yuan Gao, Philip K. T. Mok, I-Shan Michael Sun, Namkyu Park:
A 16-28-W 92.8%-Efficiency Monolithic Quasi-Resonant LED Driver With Constant-Duty-Ratio Frequency Regulator. 1199-1203
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