default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDACM Transactions on Embedded Computing Systems, Volume 14
Volume 14, Number 1, January 2015
- Sandeep K. Shukla:
Editorial: Regular, Special, and Related Issues. 1:1-1:2 - Rimpy Bishnoi, Vijay Laxmi
, Manoj Singh Gaur, José Flich, Francisco Triviño:
A Brief Comment on "A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs" [ACM Transactions on Embedded Computing Systems 12 (2013) Article 106]. 2:1-2:9 - Arslan Munir, Joseph Antoon, Ann Gordon-Ross:
Modeling and Analysis of Fault Detection and Fault Tolerance in Wireless Sensor Networks. 3:1-3:43 - Abhik Sarkar, Frank Mueller, Harini Ramaprasad:
Static Task Partitioning for Locked Caches in Multicore Real-Time Systems. 4:1-4:30 - Martin Tillenius, Elisabeth Larsson, Rosa M. Badia, Xavier Martorell:
Resource-Aware Task Scheduling. 5:1-5:25 - Yazhi Huang, Mengying Zhao, Chun Jason Xue:
Joint WCET and Update Activity Minimization for Cyber-Physical Systems. 6:1-6:21 - Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli:
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers. 7:1-7:24 - Ye-Jyun Lin, Chia-Lin Yang, Jiao-Wei Huang, Tay-Jyi Lin, Chih-Wen Hsueh, Naehyuck Chang:
System-Level Performance and Power Optimization for MPSoC: A Memory Access-Aware Approach. 8:1-8:26 - Johannes Borgström, Ramunas Gutkovas, Ioana Rodhe, Björn Victor:
The Psi-Calculi Workbench: A Generic Tool for Applied Process Calculi. 9:1-9:25 - Allan C. van Hulst, Michel A. Reniers, Wan J. Fokkink:
Maximal Synthesis for Hennessy-Milner Logic. 10:1-10:21 - Hanifa Boucheneb, Kamel Barkaoui:
Stubborn Sets for Time Petri Nets. 11:1-11:25 - Abhisek Pan, Rance Rodrigues, Sandip Kundu:
A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors. 12:1-12:26 - Mihai T. Lazarescu, Luciano Lavagno:
Interactive Trace-Based Analysis Toolset for Manual Parallelization of C Programs. 13:1-13:20 - Wei Quan, Andy D. Pimentel:
A Hybrid Task Mapping Algorithm for Heterogeneous MPSoCs. 14:1-14:25 - Vinicius Petrucci, Orlando Loques, Daniel Mossé, Rami G. Melhem, Neven Abou Gazala, Sameh Gobriel:
Energy-Efficient Thread Assignment Optimization for Heterogeneous Multicore Systems. 15:1-15:26 - Zhengfeng Yang, Wang Lin, Min Wu:
Exact Safety Verification of Hybrid Systems Based on Bilinear SOS Representation. 16:1-16:19 - Rance Rodrigues, Israel Koren, Sandip Kundu:
Does the Sharing of Execution Units Improve Performance/Power of Multicores? 17:1-17:24 - Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris:
GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management). 18:1-18:26 - Jared Pager, Reiley Jeyapaul, Aviral Shrivastava:
A Software Scheme for Multithreading on CGRAs. 19:1-19:26
Volume 14, Number 2, March 2015
- Sandeep K. Shukla:
Editorial: Oh Security - Where Art Thou? 20:1-20:2 - Sergiu Rafiliu, Petru Eles, Zebo Peng, Michael Lemmon:
Stability of Online Resource Managers for Distributed Systems under Execution Time Variations. 21:1-21:29 - Seng W. Loke, Keegan Napier, Abdulaziz Alali, Niroshinie Fernando, J. Wenny Rahayu:
Mobile Computations with Surrounding Devices: Proximity Sensing and MultiLayered Work Stealing. 22:1-22:25 - Avinash Malik, David Gregg:
Heuristics on Reachability Trees for Bicriteria Scheduling of Stream Graphs on Heterogeneous Multiprocessor Architectures. 23:1-23:26 - Paul Martin, Lucas Francisco Wanner, Mani B. Srivastava:
Runtime Optimization of System Utility with Variable Hardware. 24:1-24:25 - Manil Dev Gomony, Benny Akesson, Kees Goossens:
A Real-Time Multichannel Memory Controller and Optimal Mapping of Memory Clients to Memory Channels. 25:1-25:27 - Loïg Jezequel, Eric Fabre, Victor Khomenko:
Factored Planning: From Automata to Petri Nets. 26:1-26:25 - Daisuke Taniuchi, Takuya Maekawa:
Automatic Update of Indoor Location Fingerprints with Pedestrian Dead Reckoning. 27:1-27:23 - Xavier Jimenez, David Novo, Paolo Ienne:
Libra: Software-Controlled Cell Bit-Density to Balance Wear in NAND Flash. 28:1-28:22 - Li-Pin Chang, Yo-Chuan Su, I-Chen Wu:
Plugging Versus Logging: Adaptive Buffer Management for Hybrid-Mapping SSDs. 29:1-29:21 - Zhiping Jia, Yang Li, Yi Wang, Meng Wang, Zili Shao:
Temperature-Aware Data Allocation for Embedded Systems with Cache and Scratchpad Memory. 30:1-30:24 - Weihua Zhang, Jiaxin Li, Yi Li, Haibo Chen:
Multilevel Phase Analysis. 31:1-31:29 - Abbas BanaiyanMofrad, Houman Homayoun, Nikil D. Dutt:
Using a Flexible Fault-Tolerant Cache to Improve Reliability for Ultra Low Voltage Operation. 32:1-32:24 - Muhsen Owaida, Gabriel Falcão, João Andrade, Christos D. Antonopoulos, Nikolaos Bellas, Madhura Purnaprajna, David Novo, Georgios Karakonstantis, Andreas Burg, Paolo Ienne:
Enhancing Design Space Exploration by Extending CPU/GPU Specifications onto FPGAs. 33:1-33:23 - Tianzheng Wang, Duo Liu, Yi Wang, Zili Shao:
Towards Write-Activity-Aware Page Table Management for Non-volatile Main Memories. 34:1-34:23 - Chun-Jen Tsai, Han-Wen Kuo, Zi-Gang Lin, Zi-Jing Guo, Jun-Fu Wang:
A Java Processor IP Design for Embedded SoC. 35:1-35:25 - Christos Ttofis, Christos Kyrkou, Theocharis Theocharides:
A Hardware-Efficient Architecture for Accurate Real-Time Disparity Map Estimation. 36:1-36:26 - Miguel Peón-Quirós, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris:
Placement of Linked Dynamic Data Structures over Heterogeneous Memories in Embedded Systems. 37:1-37:30 - Juan Segarra, Clemente Rodríguez, Ruben Gran, Luis C. Aparicio, Víctor Viñals:
ACDC: Small, Predictable and High-Performance Data Cache. 38:1-38:26 - Patrick Bellasi, Giuseppe Massari, William Fornaciari:
Effective Runtime Resource Management Using Linux Control Groups with the BarbequeRTRM Framework. 39:1-39:17
Volume 14, Number 3, May 2015
- Sandeep K. Shukla:
Editorial: Schizoid Design for Critical Embedded Systems. 40e:1-40e:3 - Patrick Schaumont, Máire O'Neill, Tim Güneysu:
Introduction for Embedded Platforms for Cryptography in the Coming Decade. 40:1-40:3 - James Howe, Thomas Pöppelmann, Máire O'Neill, Elizabeth O'Sullivan, Tim Güneysu:
Practical Lattice-Based Digital Signature Schemes. 41:1-41:24 - Ahmad Boorghany, Siavash Bayat Sarmadi, Rasool Jalili:
On Constrained Implementation of Lattice-Based Cryptographic Primitives and Schemes on Smart Cards. 42:1-42:25 - Aydin Aysu, Bilgiday Yuce, Patrick Schaumont:
The Future of Real-Time Security: Latency-Optimized Lattice-Based Digital Signatures. 43:1-43:18 - Ingo von Maurich, Tobias Oder, Tim Güneysu:
Implementing QC-MDPC McEliece Encryption. 44:1-44:27 - Pedro Maat C. Massolino, Paulo S. L. M. Barreto, Wilson Vicente Ruggiero:
Optimized and Scalable Co-Processor for McEliece with Binary Goppa Codes. 45:1-45:32
- Jean-Vivien Millo, Emilien Kofman, Robert de Simone:
Modeling and Analyzing Dataflow Applications on NoC-Based Many-Core Architectures. 46:1-46:25 - Robert I. Davis, Alan Burns, José Marinho, Vincent Nélis, Stefan M. Petters, Marko Bertogna:
Global and Partitioned Multiprocessor Fixed Priority Scheduling with Deferred Preemption. 47:1-47:28 - Andrea Tilli, Andrea Bartolini, Matteo Cacciari, Luca Benini:
Guaranteed Computational Resprinting via Model-Predictive Control. 48:1-48:26 - Parinaz Sayyah, Mihai T. Lazarescu, Sara Bocchio, Emad Samuel Malki Ebeid, Gianluca Palermo, Davide Quaglia, Alberto Rosti, Luciano Lavagno:
Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications. 49:1-49:25 - Domitian Tamas-Selicean, Paul Pop:
Design Optimization of Mixed-Criticality Real-Time Embedded Systems. 50:1-50:29 - Dimitra Papagiannopoulou, Giuseppe Capodanno, Tali Moreshet, Maurice Herlihy, R. Iris Bahar:
Energy-Efficient and High-Performance Lock Speculation Hardware for Embedded Multicore Systems. 51:1-51:27 - Luca Santinelli, Liliana Cucu-Grosjean:
A Probabilistic Calculus for Probabilistic Real-Time Systems. 52:1-52:30 - Kapil Anand, Rajeev Barua:
Instruction-Cache Locking for Improving Embedded Systems Performance. 53:1-53:25 - Patrick Cooke, Lu Hao, Greg Stitt:
Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application Portability. 54:1-54:25 - Lanier A. Watkins, William H. Robinson, Raheem A. Beyah:
Using Network Traffic to Infer Hardware State: A Kernel-Level Investigation. 55:1-55:22 - Steve Kerrison, Kerstin Eder:
Energy Modeling of Software for a Hardware Multithreaded Embedded Microprocessor. 56:1-56:25 - Alessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo:
Exploiting Concurrency for the Automated Synthesis of MPSoC Interconnects. 57:1-57:24 - Gilles Geeraerts, Alexander Heußner, Jean-François Raskin:
On the Verification of Concurrent, Asynchronous Programs with Waiting Queues. 58:1-58:26 - Kai Huang, Min Yu, Rongjie Yan, Xiaomeng Zhang, Xiaolang Yan, Lisane B. de Brisolara, Ahmed Amine Jerraya, Jiong Feng:
Communication Optimizations for Multithreaded Code Generation from Simulink Models. 59:1-59:26 - Jimson Mathew, Rajat Subhra Chakraborty, Durga Prasad Sahoo, Yuanfan Yang, Dhiraj K. Pradhan:
A Novel Memristor-Based Hardware Security Primitive. 60:1-60:20
Volume 14, Number 4, December 2015
- Sandeep K. Shukla:
Editorial: Big Data, Internet of Things, Cybersecurity - A New Trinity of Embedded Systems Research. 61:1-61:2 - Kamel Barkaoui, Luca Bernardinello, Andrey Mokhov:
Guest Editorial for Special Issue Application of Concurrency to System Design. 62:1-62:2 - Florian Furbach, Roland Meyer, Klaus Schneider, Maximilian Senftleben:
Memory-Model-Aware Testing: A Unified Complexity Analysis. 63:1-63:25 - Michal Knapik, Artur Meski, Wojciech Penczek:
Action Synthesis for Branching Time Logic: Theory and Applications. 64:1-64:23 - Antti Siirtola, Keijo Heljanko:
Parametrised Modal Interface Automata. 65:1-65:25 - Sylvain Cotard, Audrey Queudet, Jean-Luc Béchennec, Sébastien Faucou, Yvon Trinquet:
STM-HRT: A Robust and Wait-Free STM for Hard Real-Time Multicore Embedded Systems. 66:1-66:25 - Ferenc Bujtor, Walter Vogler:
Failure Semantics for Modal Transition Systems. 67:1-67:30 - Robert de Groote, Philip K. F. Hölzenspies, Jan Kuper, Gerard J. M. Smit:
Incremental Analysis of Cyclo-Static Synchronous Dataflow Graphs. 68:1-68:26 - Vasileios Germanos, Stefan Haar, Victor Khomenko, Stefan Schwoon:
Diagnosability under Weak Fairness. 69:1-69:19
- Gung-Yu Pan, Jed Yang, Jing-Yang Jou, Bo-Cheng Charles Lai:
Scalable Global Power Management Policy Based on Combinatorial Optimization for Multiprocessors. 70:1-70:24 - Jing Lu, Ke Bai, Aviral Shrivastava:
Efficient Code Assignment Techniques for Local Memory on Software Managed Multicores. 71:1-71:24 - Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram:
OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs. 72:1-72:23 - Daniele Palossi, Martino Ruggiero, Luca Benini:
3D CV Descriptor on Parallel Heterogeneous Platforms. 73:1-73:25 - Guohui Li, Yi Zhang, Jianjun Li:
Crenel-Interval-Based Dynamic Power Management for Periodic Real-Time Systems. 74:1-74:32 - Bojan Mihajlovic, Zeljko Zilic, Warren J. Gross:
Architecture-Aware Real-Time Compression of Execution Traces. 75:1-75:24 - Stanley Bak, Zhenqi Huang, Fardin Abdi Taghi Abad, Marco Caccamo:
Safety and Progress for Distributed Cyber-Physical Systems with Unreliable Communication. 76:1-76:22 - Vincenzo Catania, Andrea Araldo, Davide Patti:
Parameter Space Representation of Pareto Front to Explore Hardware-Software Dependencies. 77:1-77:25 - Adam Matthews, Stanislav Bobovych, Nilanjan Banerjee, James Patrick Parkerson, Ryan W. Robucci, Chintan Patel:
Perpetuu: A Tiered Solar-powered GIS Microserver. 78:1-78:21 - Ramy Medhat, Borzoo Bonakdarpour, Deepak Kumar, Sebastian Fischmeister:
Runtime Monitoring of Cyber-Physical Systems Under Timing and Memory Constraints. 79:1-79:29 - Catherine H. Gebotys, Brian A. White:
A Sliding Window Phase-Only Correlation Method for Side-Channel Alignment in a Smartphone. 80:1-80:22 - Qingling Zhao, Zonghua Gu, Haibo Zeng:
Resource Synchronization and Preemption Thresholds Within Mixed-Criticality Scheduling. 81:1-81:25 - Ming-Ju Wu, Chun-Jen Tsai:
A Storage Device Emulator for System Performance Evaluation. 82:1-82:27 - Davit Mirzoyan, Benny Akesson, Sander Stuijk, Kees Goossens:
Maximizing the Number of Good Dies for Streaming Applications in NoC-Based MPSoCs Under Process Variation. 83:1-83:26 - Shiwen Zhang, Qingquan Zhang, Sheng Xiao, Ting Zhu, Yu Gu, Yaping Lin:
Cooperative Data Reduction in Wireless Sensor Network. 84:1-84:26 - Marijn Scheir, Josep Balasch, Alfredo Rial, Bart Preneel, Ingrid Verbauwhede:
Anonymous Split E-Cash - Toward Mobile Anonymous Payments. 85:1-85:25 - Jianmin Jiang, Huibiao Zhu, Qin Li, Yongxin Zhao, Lin Zhao, Shi Zhang, Ping Gong, Zhong Hong:
Analyzing Event-Based Scheduling in Concurrent Reactive Systems. 86:1-86:27
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2026-02-08 22:58 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
