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ORCIDBibTeX records: Oskar Andersson
@article{DBLP:journals/tvlsi/JelcicovaKAS24,
author = {Zuzana Jelcicov{\'{a}} and
Evangelia Kasapaki and
Oskar Andersson and
Jens Spars{\o}},
title = {PeakEngine: {A} Deterministic On-the-Fly Pruning Neural Network Accelerator
for Hearing Instruments},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {32},
number = {1},
pages = {150--163},
year = {2024},
url = {https://doi.org/10.1109/TVLSI.2023.3300910},
doi = {10.1109/TVLSI.2023.3300910},
timestamp = {Sat, 13 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/JelcicovaKAS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JelcicovaKAS23,
author = {Zuzana Jelcicov{\'{a}} and
Evangelia Kasapaki and
Oskar Andersson and
Jens Spars{\o}},
title = {A Min-Heap-Based Accelerator for Deterministic On-the-Fly Pruning
in Neural Networks},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2023,
Monterey, CA, USA, May 21-25, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISCAS46773.2023.10181440},
doi = {10.1109/ISCAS46773.2023.10181440},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/JelcicovaKAS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/JelcicovaMAKS20,
author = {Zuzana Jelcicov{\'{a}} and
Adrian Mardari and
Oskar Andersson and
Evangelia Kasapaki and
Jens Spars{\o}},
editor = {Michael B. Matthews},
title = {A Neural Network Engine for Resource Constrained Embedded Systems},
booktitle = {54th Asilomar Conference on Signals, Systems, and Computers, {ACSCC}
2020, Pacific Grove, CA, USA, November 1-4, 2020},
pages = {125--131},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/IEEECONF51394.2020.9443426},
doi = {10.1109/IEEECONF51394.2020.9443426},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acssc/JelcicovaMAKS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/AsifARK18,
author = {Shahzad Asif and
Oskar Andersson and
Joachim Neves Rodrigues and
Yinan Kong},
title = {65-nm {CMOS} low-energy {RNS} modular multiplier for elliptic-curve
cryptography},
journal = {{IET} Comput. Digit. Tech.},
volume = {12},
number = {2},
pages = {62--67},
year = {2018},
url = {https://doi.org/10.1049/iet-cdt.2017.0017},
doi = {10.1049/IET-CDT.2017.0017},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-cdt/AsifARK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MohammadiANCCR18,
author = {Babak Mohammadi and
Oskar Andersson and
Joseph Nguyen and
Lorenzo Ciampolini and
Andreia Cathelin and
Joachim Neves Rodrigues},
title = {A 128 kb 7T {SRAM} Using a Single-Cycle Boosting Mechanism in 28-nm
{FD-SOI}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {4},
pages = {1257--1268},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2017.2750762},
doi = {10.1109/TCSI.2017.2750762},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MohammadiANCCR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/SheikhSARYBDC17,
author = {Farhana Sheikh and
Ankit Sharma and
Oskar Andersson and
Mehnaz Rahman and
Dongmin Yoon and
Alexios Balatsoukas{-}Stimming and
Deepak Dasalukunte and
Anthony Chun},
editor = {Michael B. Matthews},
title = {Adaptive and multi-mode baseband systems for next generation wireless
communication},
booktitle = {51st Asilomar Conference on Signals, Systems, and Computers, {ACSSC}
2017, Pacific Grove, CA, USA, October 29 - November 1, 2017},
pages = {1499--1503},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ACSSC.2017.8335606},
doi = {10.1109/ACSSC.2017.8335606},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acssc/SheikhSARYBDC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/AnderssonMMBR16,
author = {Oskar Andersson and
Babak Mohammadi and
Pascal Meinerzhagen and
Andreas Burg and
Joachim Neves Rodrigues},
title = {Ultra Low Voltage Synthesizable Memories: {A} Trade-Off Discussion
in 65 nm {CMOS}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {63-I},
number = {6},
pages = {806--817},
year = {2016},
url = {https://doi.org/10.1109/TCSI.2016.2537931},
doi = {10.1109/TCSI.2016.2537931},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/AnderssonMMBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/MohammadiALNR16,
author = {Babak Mohammadi and
Oskar Andersson and
Xiao Luo and
Masoud Nouripayam and
Joachim Neves Rodrigues},
title = {An area efficient single-cycle xVDD sub-Vth on-chip boost scheme in
28 nm {FD-SOI}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {229--232},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844177},
doi = {10.1109/ASSCC.2016.7844177},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/MohammadiALNR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/MohammadiANCCR16,
author = {Babak Mohammadi and
Oskar Andersson and
Joseph Nguyen and
Lorenzo Ciampolini and
Andreia Cathelin and
Joachim Neves Rodrigues},
title = {A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless
{SRAM} in 28 nm {FD-SOI}},
booktitle = {{ESSCIRC} Conference 2016: 42\({}^{\mbox{nd}}\) European Solid-State
Circuits Conference, Lausanne, Switzerland, September 12-15, 2016},
pages = {429--432},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ESSCIRC.2016.7598333},
doi = {10.1109/ESSCIRC.2016.7598333},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/MohammadiANCCR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/BardizbanyanARL16,
author = {Alen Bardizbanyan and
Oskar Andersson and
Joachim Neves Rodrigues and
Per Larsson{-}Edefors},
title = {Logic filter cache for wide-VDD-range processors},
booktitle = {2016 {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2016, Monte Carlo, Monaco, December 11-14, 2016},
pages = {376--379},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ICECS.2016.7841211},
doi = {10.1109/ICECS.2016.7841211},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/BardizbanyanARL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/MazloumRANE16,
author = {Nafiseh Seyed Mazloum and
Joachim Neves Rodrigues and
Oskar Andersson and
Anders Nejdel and
Ove Edfors},
title = {Improving practical sensitivity of energy optimized wake-up receivers:
proof of concept in 65nm {CMOS}},
journal = {CoRR},
volume = {abs/1605.00113},
year = {2016},
url = {http://arxiv.org/abs/1605.00113},
eprinttype = {arXiv},
eprint = {1605.00113},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/MazloumRANE16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/AnderssonCSR15,
author = {Oskar Andersson and
Ki H. Chon and
Leif S{\"{o}}rnmo and
Joachim Neves Rodrigues},
title = {A 290 mV Sub-V\({}_{\mbox{{\(\mathbb{T}\)}}}\) {ASIC} for Real-Time
Atrial Fibrillation Detection},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {9},
number = {3},
pages = {377--386},
year = {2015},
url = {https://doi.org/10.1109/TBCAS.2014.2354054},
doi = {10.1109/TBCAS.2014.2354054},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tbcas/AnderssonCSR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AnderssonR15,
author = {Oskar Andersson and
Joachim Neves Rodrigues},
title = {A 400 mV atrial fibrillation detector with 0.56 pJ/operation in 65nm
{CMOS}},
booktitle = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2015, Lisbon, Portugal, May 24-27, 2015},
pages = {2628--2631},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISCAS.2015.7169225},
doi = {10.1109/ISCAS.2015.7169225},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/AnderssonR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/SheikhALXCVST15,
author = {Farhana Sheikh and
Oskar Andersson and
Ching{-}En Lee and
Feng Xue and
Chia{-}Hsiang Chen and
Anuja Vaidya and
Ankit Sharma and
Tom Tetzlaff},
title = {Reconf{\i}gurable and selectively-adaptive signal processing for multi-mode
wireless communication},
booktitle = {2015 {IEEE} Workshop on Signal Processing Systems, SiPS 2015, Hangzhou,
China, October 14-16, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/SiPS.2015.7344987},
doi = {10.1109/SIPS.2015.7344987},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/SheikhALXCVST15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/AnderssonMMR14,
author = {Oskar Andersson and
Babak Mohammadi and
Pascal Andreas Meinerzhagen and
Joachim Neves Rodrigues},
title = {A 35 fJ/bit-access sub-VT memory using a dual-bit area-optimized standard-cell
in 65 nm {CMOS}},
booktitle = {{ESSCIRC} 2014 - 40th European Solid State Circuits Conference, Venice
Lido, Italy, September 22-26, 2014},
pages = {243--246},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ESSCIRC.2014.6942067},
doi = {10.1109/ESSCIRC.2014.6942067},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/AnderssonMMR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/AnderssonMMBR13,
author = {Oskar Andersson and
Babak Mohammadi and
Pascal Meinerzhagen and
Andreas Burg and
Joachim Neves Rodrigues},
title = {Dual-VT 4kb sub-VT memories with {\textless}1 pW/bit leakage in 65
nm {CMOS}},
booktitle = {{ESSCIRC} 2013 - Proceedings of the 39th European Solid-State Circuits
Conference, Bucharest, Romania, September 16-20, 2013},
pages = {197--200},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ESSCIRC.2013.6649106},
doi = {10.1109/ESSCIRC.2013.6649106},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/AnderssonMMBR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MullerMAMSR13,
author = {Christoph Thomas Muller and
Steffen Malkowsky and
Oskar Andersson and
Babak Mohammadi and
Jens Spars{\o} and
Joachim Neves Rodrigues},
editor = {Martin Margala and
Ricardo Augusto da Luz Reis and
Alex Orailoglu and
Luigi Carro and
Lu{\'{\i}}s Miguel Silveira and
H. Fatih Ugurdag},
title = {A 65-nm {CMOS} area optimized de-synchronization flow for sub-VT designs},
booktitle = {21st {IEEE/IFIP} International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2013, Istanbul, Turkey, October 7-9, 2013},
pages = {380--385},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/VLSI-SoC.2013.6673313},
doi = {10.1109/VLSI-SOC.2013.6673313},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/MullerMAMSR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/MeinerzhagenAMSBR12,
author = {Pascal Andreas Meinerzhagen and
Oskar Andersson and
Babak Mohammadi and
S. M. Yasser Sherazi and
Andreas Peter Burg and
Joachim Neves Rodrigues},
title = {A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory
in 65nm {CMOS}},
booktitle = {Proceedings of the 38th European Solid-State Circuit conference, {ESSCIRC}
2012, Bordeaux, France, September 17-21, 2012},
pages = {321--324},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ESSCIRC.2012.6341319},
doi = {10.1109/ESSCIRC.2012.6341319},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/MeinerzhagenAMSBR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ConstantinDAMRAB12a,
author = {Jeremy Constantin and
Ahmed Yasir Dogan and
Oskar Andersson and
Pascal Andreas Meinerzhagen and
Joachim Neves Rodrigues and
David Atienza and
Andreas Burg},
editor = {Andreas Burg and
Ayse K. Coskun and
Matthew R. Guthaus and
Srinivas Katkoori and
Ricardo Reis},
title = {An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories
for Compressed Sensing},
booktitle = {VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design -
20th {IFIP} {WG} 10.5/IEEE International Conference on Very Large
Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10,
2012, Revised Selected Papers},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {418},
pages = {88--106},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-45073-0\_5},
doi = {10.1007/978-3-642-45073-0\_5},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/ConstantinDAMRAB12a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ConstantinDAMRAB12,
author = {Jeremy Constantin and
Ahmed Yasir Dogan and
Oskar Andersson and
Pascal Andreas Meinerzhagen and
Joachim Neves Rodrigues and
David Atienza and
Andreas Burg},
editor = {Srinivas Katkoori and
Matthew R. Guthaus and
Ayse K. Coskun and
Andreas Burg and
Ricardo Reis},
title = {TamaRISC-CS: An ultra-low-power application-specific processor for
compressed sensing},
booktitle = {20th {IEEE/IFIP} International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012},
pages = {159--164},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSI-SoC.2012.6379023},
doi = {10.1109/VLSI-SOC.2012.6379023},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/ConstantinDAMRAB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/MeinerzhagenASBR11,
author = {Pascal Andreas Meinerzhagen and
Oskar Andersson and
S. M. Yasser Sherazi and
Andreas Peter Burg and
Joachim Neves Rodrigues},
title = {Synthesis strategies for sub-VT systems},
booktitle = {20th European Conference on Circuit Theory and Design, {ECCTD} 2011,
Linkoping, Sweden, Aug. 29-31, 2011},
pages = {552--555},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ECCTD.2011.6043593},
doi = {10.1109/ECCTD.2011.6043593},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ecctd/MeinerzhagenASBR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/AnderssonSR11,
author = {Oskar Andersson and
S. M. Yasser Sherazi and
Joachim Neves Rodrigues},
title = {Impact of switching activity on the energy minimum voltage for 65
nm sub-VT {CMOS}},
booktitle = {2011 NORCHIP, Lund, Sweden, November 14-15, 2011},
pages = {1--4},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/NORCHP.2011.6126748},
doi = {10.1109/NORCHP.2011.6126748},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/norchip/AnderssonSR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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