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BibTeX records: James A. Barby
@inproceedings{DBLP:conf/iscas/YangB04, author = {Michael M. Yang and James A. Barby}, title = {A novel fast low voltage dynamic threshold true single phase clocking adiabatic circuit}, booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems, {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004}, pages = {289--292}, publisher = {{IEEE}}, year = {2004}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/YangB04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/GadelRabBC95, author = {S. M. GadelRab and James A. Barby and Savvas G. Chamberlain}, title = {An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages}, booktitle = {1995 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 1995, Seattle, Washington, USA, April 30 - May 3, 1995}, pages = {897--900}, publisher = {{IEEE}}, year = {1995}, url = {https://doi.org/10.1109/ISCAS.1995.519909}, doi = {10.1109/ISCAS.1995.519909}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/GadelRabBC95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/Barby93, author = {James A. Barby}, title = {Switched-Current Filter Models for Frequency Analysis in the Continuous-time Domain}, booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 1993, Chicago, Illinois, USA, May 3-6, 1993}, pages = {1427--1430}, publisher = {{IEEE}}, year = {1993}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/Barby93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/RuanVBO91, author = {Genhong Ruan and Jir{\'{\i}} Vlach and James A. Barby and Ajoy Opal}, title = {Analog functional simulator for multilevel systems}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {10}, number = {5}, pages = {565--576}, year = {1991}, url = {https://doi.org/10.1109/43.79494}, doi = {10.1109/43.79494}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/RuanVBO91.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/VlachBVTS91, author = {Jir{\'{\i}} Vlach and James A. Barby and Anthony Vannelli and T. Talkhan and C.{-}J. Richard Shi}, title = {Group delay as an estimate of delay in logic}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {10}, number = {7}, pages = {949--953}, year = {1991}, url = {https://doi.org/10.1109/43.87605}, doi = {10.1109/43.87605}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/VlachBVTS91.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/RuanVB90, author = {Genhong Ruan and Jir{\'{\i}} Vlach and James A. Barby}, title = {Logic simulation with current-limited switches}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {9}, number = {2}, pages = {133--141}, year = {1990}, url = {https://doi.org/10.1109/43.46779}, doi = {10.1109/43.46779}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/RuanVB90.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/BarbyVS88, author = {James A. Barby and Jir{\'{\i}} Vlach and Kishore Singhal}, title = {Polynomial splines for {MOSFET} model approximation}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {7}, number = {5}, pages = {557--566}, year = {1988}, url = {https://doi.org/10.1109/43.3193}, doi = {10.1109/43.3193}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/BarbyVS88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/RuanVB88, author = {Genhong Ruan and Jir{\'{\i}} Vlach and James A. Barby}, title = {Current-limited switch-level timing simulator for {MOS} logic networks}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {7}, number = {6}, pages = {659--667}, year = {1988}, url = {https://doi.org/10.1109/43.3205}, doi = {10.1109/43.3205}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/RuanVB88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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