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ORCIDBibTeX records: Chirn Chye Boon
@article{DBLP:journals/jssc/0027B0L23,
author = {Qian Chen and
Chirn Chye Boon and
Qing Liu and
Yuan Liang},
title = {A Single-Channel Voltage-Scalable 8-GS/s 8-b {\textgreater}37.5-dB
{SNDR} Time-Domain {ADC} With Asynchronous Pipeline Successive Approximation
in 28-nm {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {6},
pages = {1610--1622},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2022.3230697},
doi = {10.1109/JSSC.2022.3230697},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/0027B0L23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/LiuBDY23,
author = {Zhe Liu and
Chirn Chye Boon and
Yangtao Dong and
Kaituo Yang},
title = {A 2.4dB {NF} +4.1dBm {IIP3} Differential Dual-Feedforward-Based Noise-Cancelling
{LNTA} With Complementary {NMOS} and {PMOS} Configuration},
booktitle = {49th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2023,
Lisbon, Portugal, September 11-14, 2023},
pages = {377--380},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ESSCIRC59616.2023.10268756},
doi = {10.1109/ESSCIRC59616.2023.10268756},
timestamp = {Mon, 23 Oct 2023 09:15:52 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/LiuBDY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChenLBL23,
author = {Oian Chen and
Yuan Liang and
Chirn Chye Boon and
Oing Liu},
title = {A Single-Channel 10GS/s 8b{\textgreater}36.4d8 {SNDR} Time-Domain
{ADC} Featuring Loop-Unrolled Asynchronous Successive Approximation
in 28nm {CMOS}},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
San Francisco, CA, USA, February 19-23, 2023},
pages = {278--279},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISSCC42615.2023.10067397},
doi = {10.1109/ISSCC42615.2023.10067397},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/ChenLBL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ChenBL22,
author = {Qian Chen and
Chirn Chye Boon and
Yuan Liang},
title = {A 0.6 {V} 4 GS/s -56.4 dB {THD} Voltage-to-Time Converter in 28 nm
{CMOS}},
journal = {{IEEE} Access},
volume = {10},
pages = {88558--88566},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3200678},
doi = {10.1109/ACCESS.2022.3200678},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/ChenBL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/JayaBCS22,
author = {Gibran Limi Jaya and
Chirn Chye Boon and
Shoushun Chen and
Liter Siek},
title = {An Equivalent-Time Sampling Millimeter-Wave Ultra-Wideband Radar Pulse
Digitizer in {CMOS}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {69},
number = {10},
pages = {3901--3914},
year = {2022},
url = {https://doi.org/10.1109/TCSI.2022.3190141},
doi = {10.1109/TCSI.2022.3190141},
timestamp = {Tue, 18 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/JayaBCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/LiuB22,
author = {Zhe Liu and
Chirn Chye Boon},
title = {A 0.092-mm\({}^{\mbox{2}}\) 2-12-GHz Noise-Cancelling Low-Noise Amplifier
With Gain Improvement and Noise Reduction},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {69},
number = {10},
pages = {4013--4017},
year = {2022},
url = {https://doi.org/10.1109/TCSII.2022.3185455},
doi = {10.1109/TCSII.2022.3185455},
timestamp = {Tue, 18 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/LiuB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/DongBYL22,
author = {Yangtao Dong and
Chirn Chye Boon and
Kaituo Yang and
Zhe Liu},
title = {A 2-GHz Dual-Path Sub-Sampling {PLL} with Ring {VCO} Phase Noise Suppression},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2022, Newport
Beach, CA, USA, April 24-27, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CICC53496.2022.9772813},
doi = {10.1109/CICC53496.2022.9772813},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/DongBYL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LiuBLYDG22,
author = {Zhe Liu and
Chirn Chye Boon and
Chenyang Li and
Kaituo Yang and
Yangtao Dong and
Ting Guo},
title = {A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling
{LNA} in 28nm {CMOS} Exploiting G\({}_{\mbox{m}}\) Boosting},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
San Francisco, CA, USA, February 20-26, 2022},
pages = {1--3},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731719},
doi = {10.1109/ISSCC42614.2022.9731719},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/LiuBLYDG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YangBLPGDLZYWL22,
author = {Kaituo Yang and
Chirn Chye Boon and
Zhe Liu and
Jiaming Piao and
Ting Guo and
Yangtao Dong and
Chenyang Li and
Ao Zhou and
Zhijie Yang and
Xiaoying Wang and
Yufeng Liu},
title = {A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with
+10dBm in-Band {IIP3} in Current-Mode and 1.7dB {NF} in Voltage-Mode},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
San Francisco, CA, USA, February 20-26, 2022},
pages = {438--440},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731572},
doi = {10.1109/ISSCC42614.2022.9731572},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/YangBLPGDLZYWL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/KongCYBMM21,
author = {Lingshan Kong and
Yong Chen and
Haohong Yu and
Chirn Chye Boon and
Pui{-}In Mak and
Rui Paulo Martins},
title = {Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering
Gain-Tuning Technique},
journal = {{IEEE} Access},
volume = {9},
pages = {35814--35823},
year = {2021},
url = {https://doi.org/10.1109/ACCESS.2021.3062360},
doi = {10.1109/ACCESS.2021.3062360},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/KongCYBMM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ZhouDBSLD21,
author = {Ao Zhou and
Xin Ding and
Chirn Chye Boon and
Liter Siek and
Yuan Liang and
Yangtao Dong},
title = {A Low-Power Quadrature {LO} Generator With Mutual Power-Supply Rejection
Technique},
journal = {{IEEE} Access},
volume = {9},
pages = {137241--137248},
year = {2021},
url = {https://doi.org/10.1109/ACCESS.2021.3116160},
doi = {10.1109/ACCESS.2021.3116160},
timestamp = {Fri, 29 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/ZhouDBSLD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/WangBYK21,
author = {Xiaoying Wang and
Chirn Chye Boon and
Kaituo Yang and
Lingshan Kong},
title = {A 20-80 MHz Continuously Tunable Gm-C Low-Pass Filter for Ultra-Low
Power {WBAN} Receiver Front-End},
journal = {{IEEE} Access},
volume = {9},
pages = {154136--154142},
year = {2021},
url = {https://doi.org/10.1109/ACCESS.2021.3128154},
doi = {10.1109/ACCESS.2021.3128154},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/WangBYK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YangYBLFLL21,
author = {Kaituo Yang and
Xiang Yi and
Chirn Chye Boon and
Zhipeng Liang and
Guangyin Feng and
Chenyang Li and
Bei Liu},
title = {A Parallel Sliding-IF Receiver Front-End With Sub-2-dB Noise Figure
for 5-6-GHz {WLAN} Carrier Aggregation},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {2},
pages = {392--403},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3014333},
doi = {10.1109/JSSC.2020.3014333},
timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/YangYBLFLL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/LiuBMCG21,
author = {Bei Liu and
Chirn Chye Boon and
Mengda Mao and
Pilsoon Choi and
Ting Guo},
title = {A 2.4-6 GHz Broadband GaN Power Amplifier for 802.11ax Application},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {68},
number = {6},
pages = {2404--2417},
year = {2021},
url = {https://doi.org/10.1109/TCSI.2021.3073345},
doi = {10.1109/TCSI.2021.3073345},
timestamp = {Tue, 15 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/LiuBMCG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/DongBDLL21,
author = {Yangtao Dong and
Chirn Chye Boon and
Xin Ding and
Chenyang Li and
Zhe Liu},
title = {A Bidirectional Nonlinearly Coupled {QVCO} With Passive Phase Interpolation
for Multiphase Signals Generation},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {29},
number = {7},
pages = {1480--1484},
year = {2021},
url = {https://doi.org/10.1109/TVLSI.2021.3077613},
doi = {10.1109/TVLSI.2021.3077613},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/DongBDLL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DongBYZD21,
author = {Yangtao Dong and
Chirn Chye Boon and
Kaituo Yang and
Ao Zhou and
Xin Ding},
title = {A Cross-Coupled Pair Regeneration Based dB-Linear Programable Gain
Amplifier with {THD} Enhancement},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401711},
doi = {10.1109/ISCAS51556.2021.9401711},
timestamp = {Mon, 19 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/DongBYZD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiangB0D21,
author = {Yuan Liang and
Chirn Chye Boon and
Qian Chen and
Yangtao Dong},
title = {Millimetre-Wave and Terahertz Antennas and Directional Coupler Enabled
by Wafer-Level Packaging Platform with Interposer},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401281},
doi = {10.1109/ISCAS51556.2021.9401281},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiangB0D21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YangBFLLGYDZW21,
author = {Kaituo Yang and
Chirn Chye Boon and
Guangyin Feng and
Chenyang Li and
Zhe Liu and
Ting Guo and
Xiang Yi and
Yangtao Dong and
Ao Zhou and
Xiaoying Wang},
title = {A 1.75dB-NF 25mW 5GHz Transformer-Based Noise- Cancelling {CMOS} Receiver
Front-End},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {102--104},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365954},
doi = {10.1109/ISSCC42613.2021.9365954},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/YangBFLLGYDZW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/LiBYLY20,
author = {Chenyang Li and
Chirn Chye Boon and
Xiang Yi and
Zhipeng Liang and
Kaituo Yang},
title = {Compact Switched-Capacitor Power Detector With Frequency Compensation
in 65-nm {CMOS}},
journal = {{IEEE} Access},
volume = {8},
pages = {34197--34203},
year = {2020},
url = {https://doi.org/10.1109/ACCESS.2020.2974514},
doi = {10.1109/ACCESS.2020.2974514},
timestamp = {Thu, 19 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/LiBYLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/YiLBFMY20,
author = {Xiang Yi and
Zhipeng Liang and
Chirn Chye Boon and
Guangyin Feng and
Fanyi Meng and
Kaituo Yang},
title = {An Inverted Ring Oscillator Noise-Shaping Time-to-Digital Converter
With In-Band Noise Reduction and Coherent Noise Cancellation},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {67-I},
number = {2},
pages = {686--698},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2019.2949732},
doi = {10.1109/TCSI.2019.2949732},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/YiLBFMY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Kong00BLLY20,
author = {Lingshan Kong and
Hang Liu and
Xi Zhu and
Chirn Chye Boon and
Chenyang Li and
Zhe Liu and
Kiat Seng Yeo},
title = {Design of a Wideband Variable-Gain Amplifier With Self-Compensated
Transistor for Accurate dB-Linear Characteristic in 65 nm {CMOS} Technology},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-I},
number = {12},
pages = {4187--4198},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2020.2995725},
doi = {10.1109/TCSI.2020.2995725},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Kong00BLLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bcicts/ChoiKLBWTAF20,
author = {Pilsoon Choi and
Bugra Kanargi and
Kenneth E. Lee and
Chirn Chye Boon and
Evelyn Wang and
Chuan Seng Tan and
Dimitri A. Antoniadis and
Eugene A. Fitzgerald},
title = {Monolithically Integrated GaN+CMOS Logic Circuits Design and Electro-Thermal
Analysis for High-Voltage Applications},
booktitle = {{IEEE} BiCMOS and Compound Semiconductor Integrated Circuits and Technology
Symposium, {BCICTS} 2020, Monterey, CA, USA, November 16-19, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/BCICTS48439.2020.9392934},
doi = {10.1109/BCICTS48439.2020.9392934},
timestamp = {Fri, 16 Apr 2021 11:19:47 +0200},
biburl = {https://dblp.org/rec/conf/bcicts/ChoiKLBWTAF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/0027LKB20,
author = {Qian Chen and
Yuan Liang and
Bongjin Kim and
Chirn Chye Boon},
title = {A 3GS/s Highly Linear Energy Efficient Constant-Slope Based Voltage-to-Time
Converter},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180535},
doi = {10.1109/ISCAS45731.2020.9180535},
timestamp = {Mon, 18 Jan 2021 08:38:59 +0100},
biburl = {https://dblp.org/rec/conf/iscas/0027LKB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenBZLLLG20,
author = {Qian Chen and
Chirn Chye Boon and
Xueyong Zhang and
Chenyang Li and
Yuan Liang and
Zhe Liu and
Ting Guo},
title = {Multi-Channel {FSK} Inter/Intra-Chip Communication by Exploiting Field-Confined
Slow-Wave Transmission Line},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180890},
doi = {10.1109/ISCAS45731.2020.9180890},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ChenBZLLLG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenLB20,
author = {Qian Chen and
Yuan Liang and
Chirn Chye Boon},
title = {A 6bit 1.2GS/s Symmetric Successive Approximation Energy-Efficient
Time-to-Digital Converter in 40nm {CMOS}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180949},
doi = {10.1109/ISCAS45731.2020.9180949},
timestamp = {Tue, 19 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ChenLB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/ChenMBM20,
author = {Yong Chen and
Pui{-}In Mak and
Chirn Chye Boon and
Rui Paulo Martins},
title = {A 0.024-mm\({}^{\mbox{2}}\) 45.4-GHz-Bandwidth Unity-Gain Output Driver
with SDD22{\textless}-10dB up to 35 GHz},
booktitle = {63rd {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2020, Springfield, MA, USA, August 9-12, 2020},
pages = {687--690},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MWSCAS48704.2020.9184497},
doi = {10.1109/MWSCAS48704.2020.9184497},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/ChenMBM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/YiFLWLLYBX19,
author = {Xiang Yi and
Guangyin Feng and
Zhipeng Liang and
Cheng Wang and
Bei Liu and
Chenyang Li and
Kaituo Yang and
Chirn Chye Boon and
Quan Xue},
title = {A 24/77 GHz Dual-Band Receiver for Automotive Radar Applications},
journal = {{IEEE} Access},
volume = {7},
pages = {48053--48059},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2019.2904493},
doi = {10.1109/ACCESS.2019.2904493},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/YiFLWLLYBX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/YuCBLMM19,
author = {Haohong Yu and
Yong Chen and
Chirn Chye Boon and
Chenyang Li and
Pui{-}In Mak and
Rui Paulo Martins},
title = {A 0.044-mm\({}^{\mbox{2}}\) 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback
Noise-Cancelling {LNA} Achieving a Flat {NF} of 3.3{\(\pm\)}0.45 dB},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {66-II},
number = {1},
pages = {71--75},
year = {2019},
url = {https://doi.org/10.1109/TCSII.2018.2833553},
doi = {10.1109/TCSII.2018.2833553},
timestamp = {Thu, 06 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/YuCBLMM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KhannaBCSLL19,
author = {Devrishi Khanna and
Chirn Chye Boon and
Pilsoon Choi and
Liter Siek and
Bei Liu and
Chenyang Li},
title = {A Low-Noise, Positive-Input, Negative-Output Voltage Generator for
Low-to-Moderate Driving Capacity Applications},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {9},
pages = {3423--3436},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2019.2927117},
doi = {10.1109/TCSI.2019.2927117},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KhannaBCSLL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ChenMYBM19,
author = {Yong Chen and
Pui{-}In Mak and
Zunsong Yang and
Chirn Chye Boon and
Rui Paulo Martins},
title = {A 0.0071-mm\({}^{\mbox{2}}\) 10.8ps\({}_{\mbox{pp}}\)-Jitter 4 to
10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for
Sub-1-UI Fractional De-Emphasis},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {10},
pages = {3991--4004},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2019.2919623},
doi = {10.1109/TCSI.2019.2919623},
timestamp = {Thu, 06 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ChenMYBM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/AliotoAABBCCCCC19,
author = {Massimo Alioto and
Magdy S. Abadir and
Tughrul Arslan and
Chirn Chye Boon and
Andreas Burg and
Chip{-}Hong Chang and
Meng{-}Fan Chang and
Yao{-}Wen Chang and
Poki Chen and
Pasquale Corsonello and
Paolo Crovetti and
Shiro Dosho and
Rolf Drechsler and
Ibrahim Abe M. Elfadel and
Ruonan Han and
Masanori Hashimoto and
Chun{-}Huat Heng and
Deukhyoun Heo and
Tsung{-}Yi Ho and
Houman Homayoun and
Yuh{-}Shyan Hwang and
Ajay Joshi and
Rajiv V. Joshi and
Tanay Karnik and
Chulwoo Kim and
Tony Tae{-}Hyoung Kim and
Jaydeep Kulkarni and
Volkan Kursun and
Yoonmyung Lee and
Hai Helen Li and
Huawei Li and
Prabhat Mishra and
Baker Mohammad and
Mehran Mozaffari Kermani and
Makoto Nagata and
Koji Nii and
Partha Pratim Pande and
Bipul C. Paul and
Vasilis F. Pavlidis and
Jos{\'{e}} Pineda de Gyvez and
Ioannis Savidis and
Patrick Schaumont and
Fabio Sebastiano and
Anirban Sengupta and
Mingoo Seok and
Mircea R. Stan and
Mark M. Tehranipoor and
Aida Todri{-}Sanial and
Marian Verhelst and
Valerio Vignoli and
Xiaoqing Wen and
Jiang Xu and
Wei Zhang and
Zhengya Zhang and
Jun Zhou and
Mark Zwolinski and
Stacey Weber},
title = {Editorial {TVLSI} Positioning - Continuing and Accelerating an Upward
Trajectory},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {2},
pages = {253--280},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2018.2886389},
doi = {10.1109/TVLSI.2018.2886389},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/AliotoAABBCCCCC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiangBLTNKWZY19,
author = {Yuan Liang and
Chirn Chye Boon and
Chenyang Li and
Xiao{-}Lan Tang and
Herman Jalli Ng and
Dietmar Kissinger and
Yong Wang and
Qingfeng Zhang and
Hao Yu},
title = {Design and Analysis of {\textdollar}D{\textdollar} -Band On-Chip Modulator
and Signal Source Based on Split-Ring Resonator},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {7},
pages = {1513--1526},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2906680},
doi = {10.1109/TVLSI.2019.2906680},
timestamp = {Sun, 13 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LiangBLTNKWZY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/Kong0YPBMM19,
author = {Lingshan Kong and
Yong Chen and
Haohong Yu and
Quan Pan and
Chirn Chye Boon and
Pui{-}In Mak and
Rui Paulo Martins},
title = {Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering
Gain-Tuning Technique},
booktitle = {2019 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
2019, Bangkok, Thailand, November 11-14, 2019},
pages = {153--156},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/APCCAS47518.2019.8953084},
doi = {10.1109/APCCAS47518.2019.8953084},
timestamp = {Thu, 03 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/Kong0YPBMM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/Balachandran0B19,
author = {Arya Balachandran and
Yong Chen and
Chirn Chye Boon},
title = {A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver {AFE} Employing a Hybrid
CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm {CMOS}},
booktitle = {2019 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
2019, Bangkok, Thailand, November 11-14, 2019},
pages = {221--224},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/APCCAS47518.2019.8953146},
doi = {10.1109/APCCAS47518.2019.8953146},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/Balachandran0B19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/FengYMB18,
author = {Guangyin Feng and
Xiang Yi and
Fanyi Meng and
Chirn Chye Boon},
title = {A W-Band Switch-Less Dicke Receiver for Millimeter-Wave Imaging in
65 nm {CMOS}},
journal = {{IEEE} Access},
volume = {6},
pages = {39233--39240},
year = {2018},
url = {https://doi.org/10.1109/ACCESS.2018.2853552},
doi = {10.1109/ACCESS.2018.2853552},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/FengYMB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ChenMBM18,
author = {Yong Chen and
Pui{-}In Mak and
Chirn Chye Boon and
Rui Paulo Martins},
title = {A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient
Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {9},
pages = {3014--3026},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2018.2829725},
doi = {10.1109/TCSI.2018.2829725},
timestamp = {Thu, 06 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ChenMBM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KongCBMM18,
author = {Lingshan Kong and
Yong Chen and
Chirn Chye Boon and
Pui{-}In Mak and
Rui Paulo Martins},
title = {A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier
Using a Single-Branch Negative Exponential Generator for Wireline
Applications},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {10},
pages = {3196--3206},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2018.2827065},
doi = {10.1109/TCSI.2018.2827065},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KongCBMM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BalachandranCB18,
author = {Arya Balachandran and
Yong Chen and
Chirn Chye Boon},
title = {A 0.013-mm\({}^{\mbox{2}}\) 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer
Under 21-dB Channel Loss in 65-nm {CMOS}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {26},
number = {3},
pages = {599--603},
year = {2018},
url = {https://doi.org/10.1109/TVLSI.2017.2771429},
doi = {10.1109/TVLSI.2017.2771429},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BalachandranCB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/LiangYBLKW18,
author = {Yuan Liang and
Hao Yu and
Chirn Chye Boon and
Chenyang Li and
Dietmar Kissinger and
Yong Wang},
title = {D-Band Surface-Wave Modulator and Signal Source with 40 dB Extinction
Ratio and 3.7mW Output Power in 65 nm {CMOS}},
booktitle = {44th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2018,
Dresden, Germany, September 3-6, 2018},
pages = {142--145},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ESSCIRC.2018.8494264},
doi = {10.1109/ESSCIRC.2018.8494264},
timestamp = {Sun, 13 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/LiangYBLKW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/FengBMYYLL17,
author = {Guangyin Feng and
Chirn Chye Boon and
Fanyi Meng and
Xiang Yi and
Kaituo Yang and
Chenyang Li and
Howard C. Luong},
title = {Pole-Converging Intrastage Bandwidth Extension Technique for Wideband
Amplifiers},
journal = {{IEEE} J. Solid State Circuits},
volume = {52},
number = {3},
pages = {769--780},
year = {2017},
url = {https://doi.org/10.1109/JSSC.2016.2641459},
doi = {10.1109/JSSC.2016.2641459},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/FengBMYYLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChakrabartyABBC17,
author = {Krishnendu Chakrabarty and
Massimo Alioto and
Bevan M. Baas and
Chirn Chye Boon and
Meng{-}Fan Chang and
Naehyuck Chang and
Yao{-}Wen Chang and
Chip{-}Hong Chang and
Shih{-}Chieh Chang and
Poki Chen and
Masud H. Chowdhury and
Pasquale Corsonello and
Ibrahim Abe M. Elfadel and
Said Hamdioui and
Masanori Hashimoto and
Tsung{-}Yi Ho and
Houman Homayoun and
Yuh{-}Shyan Hwang and
Rajiv V. Joshi and
Tanay Karnik and
Mehran Mozaffari Kermani and
Chulwoo Kim and
Tae{-}Hyoung Kim and
Jaydeep P. Kulkarni and
Eren Kursun and
Erik Larsson and
Hai (Helen) Li and
Huawei Li and
Patrick P. Mercier and
Prabhat Mishra and
Makoto Nagata and
Arun S. Natarajan and
Koji Nii and
Partha Pratim Pande and
Ioannis Savidis and
Mingoo Seok and
Sheldon X.{-}D. Tan and
Mark M. Tehranipoor and
Aida Todri{-}Sanial and
Miroslav N. Velev and
Xiaoqing Wen and
Jiang Xu and
Wei Zhang and
Zhengya Zhang and
Stacey Weber Jackson},
title = {Editorial},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {1},
pages = {1--20},
year = {2017},
url = {https://doi.org/10.1109/TVLSI.2016.2638578},
doi = {10.1109/TVLSI.2016.2638578},
timestamp = {Fri, 02 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ChakrabartyABBC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isicir/SharmaCZB16,
author = {Sunny Sharma and
Siau Ben Chiah and
Xing Zhou and
Chirn Chye Boon},
title = {An on-chip integrated {III-V} / {CMOS} 125MSps 6-bit {SAR} {ADC}},
booktitle = {International Symposium on Integrated Circuits, {ISIC} 2016, Singapore,
December 12-14, 2016},
pages = {1--4},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISICIR.2016.7829734},
doi = {10.1109/ISICIR.2016.7829734},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/isicir/SharmaCZB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LiuZBH15,
author = {Hang Liu and
Xi Zhu and
Chirn Chye Boon and
Xiaofeng He},
title = {Cell-Based Variable-Gain Amplifiers With Accurate dB-Linear Characteristic
in 0.18 {\(\mathrm{\mu}\)}m {CMOS} Technology},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {2},
pages = {586--596},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2014.2368132},
doi = {10.1109/JSSC.2014.2368132},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LiuZBH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/ZhangBY14,
author = {Y. X. Zhang and
Chirn Chye Boon and
Kiat Seng Yeo},
title = {Design and Analysis of a 2.4 GHz Hybrid Type Automatic amplitude Control
{VCO} with Forward noise Reduction},
journal = {J. Circuits Syst. Comput.},
volume = {23},
number = {4},
year = {2014},
url = {https://doi.org/10.1142/S0218126614500480},
doi = {10.1142/S0218126614500480},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/ZhangBY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YiBLLL14,
author = {Xiang Yi and
Chirn Chye Boon and
Hang Liu and
Jia{-}fu Lin and
Wei Meng Lim},
title = {A 57.9-to-68.3 GHz 24.6 mW Frequency Synthesizer With In-Phase Injection-Coupled
{QVCO} in 65 nm {CMOS} Technology},
journal = {{IEEE} J. Solid State Circuits},
volume = {49},
number = {2},
pages = {347--359},
year = {2014},
url = {https://doi.org/10.1109/JSSC.2013.2293021},
doi = {10.1109/JSSC.2013.2293021},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/YiBLLL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ChoiGRMXBFP14,
author = {Pilsoon Choi and
Jason H. Gao and
Nadesh Ramanathan and
Mengda Mao and
Shipeng Xu and
Chirn Chye Boon and
Suhaib A. Fahmy and
Li{-}Shiuan Peh},
editor = {Yuan Xie and
Tanay Karnik and
Muhammad M. Khellah and
Renu Mehra},
title = {A case for leveraging 802.11p for direct phone-to-phone communications},
booktitle = {International Symposium on Low Power Electronics and Design, ISLPED'14,
La Jolla, CA, {USA} - August 11 - 13, 2014},
pages = {207--212},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2627369.2627644},
doi = {10.1145/2627369.2627644},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/ChoiGRMXBFP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChenYSDBL13,
author = {Dandan Chen and
Kiat Seng Yeo and
Xiaomeng Shi and
Manh Anh Do and
Chirn Chye Boon and
Wei Meng Lim},
title = {Cross-Coupled Current Conveyor Based {CMOS} Transimpedance Amplifier
for Broadband Data Transmission},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {8},
pages = {1516--1525},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2211086},
doi = {10.1109/TVLSI.2012.2211086},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ChenYSDBL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhuBISH13,
author = {Xi Zhu and
Chirn Chye Boon and
Ayobami Iji and
Yichuang Sun and
Michael Heimlich},
title = {A low-noise amplifier with continuously-tuned input matching frequency
and output resonance frequency},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {1849--1852},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572225},
doi = {10.1109/ISCAS.2013.6572225},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhuBISH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YiBLLOL13,
author = {Xiang Yi and
Chirn Chye Boon and
Hang Liu and
Jia{-}fu Lin and
Jian Cheng Ong and
Wei Meng Lim},
title = {A 57.9-to-68.3GHz 24.6mW frequency synthesizer with in-phase injection-coupled
{QVCO} in 65nm {CMOS}},
booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
17-21, 2013},
pages = {354--355},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSCC.2013.6487767},
doi = {10.1109/ISSCC.2013.6487767},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/YiBLLOL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/HuangYBZSF13,
author = {Nan Huang and
Xiang Yi and
Chirn Chye Boon and
Xiaojin Zhao and
Junyi Sun and
Guangyin Feng},
title = {Design of a fully integrated {CMOS} dual {K-} and W-band lumped wilkinson
power divider},
booktitle = {{IEEE} 56th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2013, Columbus, OH, USA, August 4-7, 2013},
pages = {788--791},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/MWSCAS.2013.6674767},
doi = {10.1109/MWSCAS.2013.6674767},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/HuangYBZSF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jece/ShiehHLBY12,
author = {Ming{-}Der Shieh and
Yin{-}Tsung Hwang and
Hanho Lee and
Chirn Chye Boon and
Zhiyuan Yan},
title = {Implementations of Signal-Processing Algorithms for {OFDM} Systems},
journal = {J. Electr. Comput. Eng.},
volume = {2012},
pages = {687172:1--687172:2},
year = {2012},
url = {https://doi.org/10.1155/2012/687172},
doi = {10.1155/2012/687172},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jece/ShiehHLBY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/XieKDBY12,
author = {Juan Xie and
Manthena Vamshi Krishna and
Manh Anh Do and
Chirn Chye Boon and
Kiat Seng Yeo},
title = {A low power low phase noise dual-band multiphase {VCO}},
journal = {Microelectron. J.},
volume = {43},
number = {12},
pages = {1016--1022},
year = {2012},
url = {https://doi.org/10.1016/j.mejo.2012.07.019},
doi = {10.1016/J.MEJO.2012.07.019},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/XieKDBY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/TanYBD12,
author = {Yung Sern Tan and
Kiat Seng Yeo and
Chirn Chye Boon and
Manh Anh Do},
title = {A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate
{CMOS} Linear Phase Detector},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {59-I},
number = {6},
pages = {1156--1167},
year = {2012},
url = {https://doi.org/10.1109/TCSI.2011.2173387},
doi = {10.1109/TCSI.2011.2173387},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/TanYBD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ManthenaDBY12,
author = {Manthena Vamshi Krishna and
Manh Anh Do and
Chirn Chye Boon and
Kiat Seng Yeo},
title = {A Low-Power Single-Phase Clock Multiband Flexible Divider},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {2},
pages = {376--380},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2010.2100052},
doi = {10.1109/TVLSI.2010.2100052},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ManthenaDBY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MengMXYBLD12,
author = {Fanyi Meng and
Kaixue Ma and
Shanshan Xu and
Kiat Seng Yeo and
Chirn Chye Boon and
Wei Meng Lim and
Manh Anh Do},
title = {Design of quarter-wavelength resonator filters with coupling controllable
paths},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2012,
Kaohsiung, Taiwan, December 2-5, 2012},
pages = {248--251},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/APCCAS.2012.6419018},
doi = {10.1109/APCCAS.2012.6419018},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/MengMXYBLD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/YiBLL12,
author = {Xiang Yi and
Chirn Chye Boon and
Jia{-}fu Lin and
Wei Meng Lim},
title = {A 100 GHz transformer-based varactor-less {VCO} with 11.2{\%} tuning
range in 65nm {CMOS} technology},
booktitle = {Proceedings of the 38th European Solid-State Circuit conference, {ESSCIRC}
2012, Bordeaux, France, September 17-21, 2012},
pages = {293--296},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ESSCIRC.2012.6341312},
doi = {10.1109/ESSCIRC.2012.6341312},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/YiBLL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MeaamarBSLYD11,
author = {Ali Meaamar and
Chirn Chye Boon and
Xiaomeng Shi and
Wei Meng Lim and
Kiat Seng Yeo and
Manh Anh Do},
title = {A 3.1-8 GHz {CMOS} {UWB} front-end receiver},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {1556--1559},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937873},
doi = {10.1109/ISCAS.2011.5937873},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MeaamarBSLYD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KrishnaDYBL10,
author = {Manthena Vamshi Krishna and
Manh Anh Do and
Kiat Seng Yeo and
Chirn Chye Boon and
Wei Meng Lim},
title = {Design and Analysis of Ultra Low Power True Single Phase Clock {CMOS}
2/3 Prescaler},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {1},
pages = {72--82},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2009.2016183},
doi = {10.1109/TCSI.2009.2016183},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KrishnaDYBL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MeaamarBYD10,
author = {Ali Meaamar and
Chirn Chye Boon and
Kiat Seng Yeo and
Manh Anh Do},
title = {A Wideband Low Power Low-Noise Amplifier in {CMOS} Technology},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {4},
pages = {773--782},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2009.2028592},
doi = {10.1109/TCSI.2009.2028592},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MeaamarBYD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/DoBDYC10,
author = {Aaron V. T. Do and
Chirn Chye Boon and
Manh Anh Do and
Kiat Seng Yeo and
Alper Cabuk},
title = {An Energy-Aware {CMOS} Receiver Front End for Low-Power 2.4-GHz Applications},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {10},
pages = {2675--2684},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2010.2047750},
doi = {10.1109/TCSI.2010.2047750},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/DoBDYC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LuYLDB10,
author = {Zhenghao Lu and
Kiat Seng Yeo and
Wei Meng Lim and
Manh Anh Do and
Chirn Chye Boon},
title = {Design of a {CMOS} Broadband Transimpedance Amplifier With Active
Feedback},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {3},
pages = {461--472},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2008.2012262},
doi = {10.1109/TVLSI.2008.2012262},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LuYLDB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/DoBKDY10,
author = {Aaron V. T. Do and
Chirn Chye Boon and
Manthena Vamshi Krishna and
Manh Anh Do and
Kiat Seng Yeo},
editor = {Jos{\'{e}} L. Ayala and
David Atienza Alonso and
Ricardo Reis},
title = {A 1-V {CMOS} Ultralow-Power Receiver Front End for the {IEEE} 802.15.4
Standard Using Tuned Passive Mixer Output Pole},
booktitle = {VLSI-SoC: Forward-Looking Trends in {IC} and Systems Design - 18th
{IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale
Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010,
Revised Selected Papers},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {373},
pages = {1--21},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-28566-0\_1},
doi = {10.1007/978-3-642-28566-0\_1},
timestamp = {Tue, 22 Oct 2019 15:21:19 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/DoBKDY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/KrishnaJDBYD10,
author = {Manthena Vamshi Krishna and
Xuan Jie and
Manh Anh Do and
Chirn Chye Boon and
Kiat Seng Yeo and
Aaron V. T. Do},
editor = {Jos{\'{e}} L. Ayala and
David Atienza Alonso and
Ricardo Reis},
title = {A 1.8-V 3.6-mW 2.4-GHz Fully Integrated {CMOS} Frequency Synthesizer
for the {IEEE} 802.15.4},
booktitle = {VLSI-SoC: Forward-Looking Trends in {IC} and Systems Design - 18th
{IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale
Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010,
Revised Selected Papers},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {373},
pages = {69--99},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-28566-0\_4},
doi = {10.1007/978-3-642-28566-0\_4},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/KrishnaJDBYD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/DoBDYC10,
author = {Aaron V. T. Do and
Chirn Chye Boon and
Manh Anh Do and
Kiat Seng Yeo and
Alper Cabuk},
title = {A 1-V {CMOS} ultralow-power receiver front end for the {IEEE} 802.15.4
standard using tuned passive mixer output pole},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {381--386},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642691},
doi = {10.1109/VLSISOC.2010.5642691},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/DoBDYC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/KrishnaXDBYD10,
author = {Manthena Vamshi Krishna and
Juan Xie and
Manh Anh Do and
Chirn Chye Boon and
Kiat Seng Yeo and
Aaron V. T. Do},
title = {A 1.8-V 3.6-mW 2.4-GHz fully integrated {CMOS} frequency synthesizer
for {IEEE} 802.15.4},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {387--391},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642692},
doi = {10.1109/VLSISOC.2010.5642692},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/KrishnaXDBYD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BoonDYM05,
author = {Chirn Chye Boon and
Manh Anh Do and
Kiat Seng Yeo and
Jianguo Ma},
title = {Fully integrated {CMOS} fractional-N frequency divider for wide-band
mobile applications with spurs reduction},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {52-I},
number = {6},
pages = {1042--1048},
year = {2005},
url = {https://doi.org/10.1109/TCSI.2005.849124},
doi = {10.1109/TCSI.2005.849124},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/BoonDYM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BoonDYM004,
author = {Chirn Chye Boon and
Manh Anh Do and
Kiat Seng Yeo and
Jianguo Ma and
Xiaoling Zhang},
title = {{RF} {CMOS} low-phase-noise {LC} oscillator through memory reduction
tail transistor},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {51-II},
number = {2},
pages = {85--90},
year = {2004},
url = {https://doi.org/10.1109/TCSII.2003.821519},
doi = {10.1109/TCSII.2003.821519},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/BoonDYM004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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