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ORCIDBibTeX records: Keith A. Bowman
@inproceedings{DBLP:conf/isscc/YinglingPVPJCHVCKSB24,
author = {Daniel Yingling and
Yimai Peng and
Robert Vachon and
Dipti Pal and
Sagar Jariwala and
Felipe G. Cabral and
Jason Hu and
Rajan Verma and
Vamshidhar Chiranji and
Anil Kumar and
Santanu Sarma and
Keith A. Bowman},
title = {14.3 {A} 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced
Clock Duty-Cycle Distortion},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
San Francisco, CA, USA, February 18-22, 2024},
pages = {258--260},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISSCC49657.2024.10454421},
doi = {10.1109/ISSCC49657.2024.10454421},
timestamp = {Tue, 19 Mar 2024 09:04:31 +0100},
biburl = {https://dblp.org/rec/conf/isscc/YinglingPVPJCHVCKSB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/WangKBS22,
author = {Zhaoqing Wang and
Sung Justin Kim and
Keith A. Bowman and
Mingoo Seok},
title = {Review, Survey, and Benchmark of Recent Digital {LDO} Voltage Regulators},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2022, Newport
Beach, CA, USA, April 24-27, 2022},
pages = {1--8},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CICC53496.2022.9772734},
doi = {10.1109/CICC53496.2022.9772734},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/WangKBS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KalyanamMBA21,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Current and Temperature Limiting System in a 7-nm Hexagon{\texttrademark}
Compute Digital Signal Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {3},
pages = {814--823},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3047612},
doi = {10.1109/JSSC.2020.3047612},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/KalyanamMBA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KalyanamMBA21a,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Proactive System for Voltage-Droop Mitigation in a 7-nm Hexagon{\texttrademark}
Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {4},
pages = {1166--1175},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3043786},
doi = {10.1109/JSSC.2020.3043786},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/KalyanamMBA21a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HsiehSB21,
author = {Ping{-}Hsuan Hsieh and
Mingoo Seok and
Keith A. Bowman},
title = {Session 29 Overview: Digital Circuits for Computing, Clocking and
Power Management {DIGITAL} {CIRCUITS} {SUBCOMMITTEE}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {402--403},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365765},
doi = {10.1109/ISSCC42613.2021.9365765},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/HsiehSB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/RaychowdhuryNB21,
author = {Arijit Raychowdhury and
Mijung Noh and
Keith A. Bowman},
title = {Session 35 Overview: Adaptive Digital Techniques for Variation Tolerant
Systems Digital Circuits Subcommittee},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {488--489},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365780},
doi = {10.1109/ISSCC42613.2021.9365780},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/RaychowdhuryNB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KalyanamMBV21,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Suresh Venkumahanti},
title = {35.3 Thread-Level Power Management for a Current- and Temperature-Limiting
System in a 7nm Hexagon{\texttrademark} Processor},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {494--496},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9366001},
doi = {10.1109/ISSCC42613.2021.9366001},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/KalyanamMBV21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HelleputteRHDPR21,
author = {Nick Van Helleputte and
Arijit Raychowdhury and
Ping{-}Hsuan Hsieh and
Jun Deguchi and
Matteo Perenzoni and
Esther Rodr{\'{\i}}guez{-}Villegas and
Long Yan and
Andreia Cathelin and
Keith A. Bowman and
Chris Van Hoof},
title = {{F3:} Silicon Technologies in the Fight Against Pandemics - From Point
of Care to Computational Epidemiology},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {520--524},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9366040},
doi = {10.1109/ISSCC42613.2021.9366040},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/HelleputteRHDPR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KlinefelterLBTB21,
author = {Alicia Klinefelter and
Huichu Liu and
Luca Benini and
Yvain Thonnart and
Keith A. Bowman and
Kathy Wilcox and
David Bol and
Alvin Loke and
Ofer Shacham},
title = {{SE2:} Going Remote: Challenges and Opportunities to Remote Learning,
Work, and Collaboration},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {539--540},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365845},
doi = {10.1109/ISSCC42613.2021.9365845},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/KlinefelterLBTB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/KalyanamMBA20,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {Randomized Pulse-Modulating Instruction-Issue Control Circuit for
a Current and Temperature Limiting System in a 7nm Hexagon{\texttrademark}
Compute {DSP}},
booktitle = {2020 {IEEE} Custom Integrated Circuits Conference, {CICC} 2020, Boston,
MA, USA, March 22-25, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CICC48029.2020.9075933},
doi = {10.1109/CICC48029.2020.9075933},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/KalyanamMBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KalyanamMBA20,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Proactive Voltage-Droop-Mitigation System in a 7nm Hexagon{\texttrademark}
Processor},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162808},
doi = {10.1109/VLSICIRCUITS18222.2020.9162808},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KalyanamMBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/RahmanKJKLRBS19,
author = {Fahim ur Rahman and
Sung Kim and
Naveen John and
Roshan Kumar and
Xi Li and
Rajesh Pamula and
Keith A. Bowman and
Visvesh S. Sathe},
title = {A Unified Clock and Switched-Capacitor-Based Power Delivery Architecture
for Variation Tolerance in Low-Voltage SoC Domains},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {4},
pages = {1173--1184},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2018.2888866},
doi = {10.1109/JSSC.2018.2888866},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/RahmanKJKLRBS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/AtallahBNJYSAPH19,
author = {Francois Atallah and
Keith A. Bowman and
Hoan Nguyen and
Jihoon Jeong and
Daniel Yingling and
Yu Sun and
Brad Appel and
Anthony Polomik and
Mahesh Harinath and
Joshua Morelli and
Thomas Moore and
Nathaniel Reeves and
Amer Cassier and
Arijit Raychowdhury},
title = {A 7nm All-Digital Unified Voltage and Frequency Regulator Based on
a High-Bandwidth 2-Phase Buck Converter with Package Inductors},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
San Francisco, CA, USA, February 17-21, 2019},
pages = {316--318},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISSCC.2019.8662381},
doi = {10.1109/ISSCC.2019.8662381},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/AtallahBNJYSAPH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BowmanGANJYPHRC19,
author = {Keith A. Bowman and
Samantak Gangopadhyay and
Francois Atallah and
Hoan Nguyen and
Jihoon Jeong and
Daniel Yingling and
Anthony Polomik and
Mahesh Harinath and
Nathaniel Reeves and
Amer Cassier and
Brad Appel and
Arijit Raychowdhury},
title = {A 7nm Leakage-Current-Supply Circuit for {LDO} Dropout Voltage Reduction},
booktitle = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
pages = {126},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/VLSIC.2019.8778148},
doi = {10.23919/VLSIC.2019.8778148},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BowmanGANJYPHRC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanKKSM18,
author = {Keith A. Bowman and
Muhammad M. Khellah and
Takashi Kono and
Joseph Shor and
Pui{-}In Mak},
title = {Introduction to the January Special Issue on the 2017 {IEEE} International
Solid-State Circuits Conference},
journal = {{IEEE} J. Solid State Circuits},
volume = {53},
number = {1},
pages = {3--7},
year = {2018},
url = {https://doi.org/10.1109/JSSC.2017.2780639},
doi = {10.1109/JSSC.2017.2780639},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanKKSM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/NguyenJAJPYAANB18,
author = {Hoan Nguyen and
Jihoon Jeong and
Francois Atallah and
Marc Jansen and
Anthony Polomik and
Daniel Yingling and
Harsha Akkaraju and
Brad Appel and
Rahul Nadkarni and
Keith A. Bowman},
title = {A 7NM Double-Pumped 6R6W Register File for Machine Learning Memory},
booktitle = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
18-22, 2018},
pages = {1--2},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSIC.2018.8502393},
doi = {10.1109/VLSIC.2018.8502393},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/NguyenJAJPYAANB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RahmanKJKLPBS18,
author = {Fahim ur Rahman and
Sung Kim and
Naveen John and
Roshan Kumar and
Xi Li and
Rajesh Pamula and
Keith A. Bowman and
Visvesh S. Sathe},
title = {An All-Digital Unified Clock Frequency and Switched-Capacitor Voltage
Regulator for Variation Tolerance in a Sub-Threshold {ARM} Cortex
{M0} Processor},
booktitle = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
18-22, 2018},
pages = {65--66},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSIC.2018.8502303},
doi = {10.1109/VLSIC.2018.8502303},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RahmanKJKLPBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/GangopadhyayNNJ17,
author = {Samantak Gangopadhyay and
Saad Bin Nasir and
Hoan Nguyen and
Jihoon Jeong and
Francois Atallah and
Keith A. Bowman and
Arijit Raychowdhury},
title = {Digitally-assisted leakage current supply circuit for reducing the
analog {LDO} minimum dropout voltage},
booktitle = {2017 {IEEE} Custom Integrated Circuits Conference, {CICC} 2017, Austin,
TX, USA, April 30 - May 3, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/CICC.2017.7993668},
doi = {10.1109/CICC.2017.7993668},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/GangopadhyayNNJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TakamiyaRBPNS17,
author = {Makoto Takamiya and
Yogesh K. Ramadass and
Keith A. Bowman and
Gerard Villar Pique and
Shuichi Nagai and
Dennis Sylvester},
title = {{F1:} Integrated voltage regulators for SoC and emerging IoT systems},
booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2017, San Francisco, CA, USA, February 5-9, 2017},
pages = {500--502},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISSCC.2017.7870479},
doi = {10.1109/ISSCC.2017.7870479},
timestamp = {Thu, 04 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/TakamiyaRBPNS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanRBYNAKJAH16,
author = {Keith A. Bowman and
Sarthak Raina and
Todd Bridges and
Daniel Yingling and
Hoan Nguyen and
Brad Appel and
Yesh Kolla and
Jihoon Jeong and
Francois Atallah and
David Hansquine},
title = {A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for
Supply Voltage Droop Tolerance Across a Wide Operating Range},
journal = {{IEEE} J. Solid State Circuits},
volume = {51},
number = {1},
pages = {8--17},
year = {2016},
url = {https://doi.org/10.1109/JSSC.2015.2473655},
doi = {10.1109/JSSC.2015.2473655},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanRBYNAKJAH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/SheikhCYABCAZ16,
author = {Farhana Sheikh and
Chia{-}Hsiang Chen and
Dongmin Yoon and
Borislav Alexandrov and
Keith A. Bowman and
Anthony Chun and
Hossein Alavi and
Zhengya Zhang},
title = {3.2 Gbps Channel-Adaptive Configurable {MIMO} Detector for Multi-Mode
Wireless Communication},
journal = {J. Signal Process. Syst.},
volume = {84},
number = {3},
pages = {295--307},
year = {2016},
url = {https://doi.org/10.1007/s11265-015-1093-2},
doi = {10.1007/S11265-015-1093-2},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/SheikhCYABCAZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/JeongANPBH15,
author = {Jihoon Jeong and
Francois Atallah and
Hoan Nguyen and
Josh Puckett and
Keith A. Bowman and
David Hansquine},
title = {A 16nm configurable pass-gate bit-cell register file for quantifying
the {VMIN} advantage of {PFET} versus {NFET} pass-gate bit cells},
booktitle = {2015 {IEEE} Custom Integrated Circuits Conference, {CICC} 2015, San
Jose, CA, USA, September 28-30, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CICC.2015.7338444},
doi = {10.1109/CICC.2015.7338444},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/JeongANPBH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/BowmanRBYNAKJAH15,
author = {Keith A. Bowman and
Sarthak Raina and
Todd Bridges and
Daniel Yingling and
Hoan Nguyen and
Brad Appel and
Yesh Kolla and
Jihoon Jeong and
Francois Atallah and
David Hansquine},
title = {8.5 {A} 16nm auto-calibrating dynamically adaptive clock distribution
for maximizing supply-voltage-droop tolerance across a wide operating
range},
booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2015, Digest of Technical Papers, San Francisco, CA, USA, February
22-26, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISSCC.2015.7062971},
doi = {10.1109/ISSCC.2015.7062971},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/BowmanRBYNAKJAH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/ParkNBAAYYH14,
author = {Alex Park and
Venkat Narayanan and
Keith A. Bowman and
Francois Atallah and
Alain Artieri and
Sei Seung Yoon and
Kendrick Yuen and
David Hansquine},
title = {Exploiting error-correcting codes for cache minimum supply voltage
reduction while maintaining coverage for radiation-induced soft errors},
booktitle = {Proceedings of the {IEEE} 2014 Custom Integrated Circuits Conference,
{CICC} 2014, San Jose, CA, USA, September 15-17, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/CICC.2014.6946033},
doi = {10.1109/CICC.2014.6946033},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/ParkNBAAYYH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TokunagaRAKSKJB14,
author = {Carlos Tokunaga and
Joseph F. Ryan and
Charles Augustine and
Jaydeep P. Kulkarni and
Yi{-}Chun Shih and
Stephen T. Kim and
Rinkle Jain and
Keith A. Bowman and
Arijit Raychowdhury and
Muhammad M. Khellah and
James W. Tschanz and
Vivek De},
title = {5.7 {A} graphics execution core in 22nm {CMOS} featuring adaptive
clocking, selective boosting and state-retentive sleep},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {108--109},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757359},
doi = {10.1109/ISSCC.2014.6757359},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/TokunagaRAKSKJB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BowmanPNAAYYH14,
author = {Keith A. Bowman and
Alex Park and
Venkat Narayanan and
Francois Atallah and
Alain Artieri and
Sei Seung Yoon and
Kendrick Yuen and
David Hansquine},
title = {Trading-off on-die observability for cache minimum supply voltage
reduction in system-on-chip (SoC) processors},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035322},
doi = {10.1109/TEST.2014.7035322},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BowmanPNAAYYH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/SheikhCYABCAZ14,
author = {Farhana Sheikh and
Chia{-}Hsiang Chen and
Dongmin Yoon and
Borislav Alexandrov and
Keith A. Bowman and
Anthony Chun and
Hossein Alavi and
Zhengya Zhang},
title = {3.2Gbps channel-adaptive configurable {MIMO} detector for multi-mode
wireless communication},
booktitle = {2014 {IEEE} Workshop on Signal Processing Systems, SiPS 2014, Belfast,
United Kingdom, October 20-22, 2014},
pages = {192--197},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SiPS.2014.6986085},
doi = {10.1109/SIPS.2014.6986085},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/SheikhCYABCAZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BowmanTTKD13,
author = {Keith A. Bowman and
Carlos Tokunaga and
James W. Tschanz and
Tanay Karnik and
Vivek K. De},
title = {Adaptive and Resilient Circuits for Dynamic Variation Tolerance},
journal = {{IEEE} Des. Test},
volume = {30},
number = {6},
pages = {8--17},
year = {2013},
url = {https://doi.org/10.1109/MDAT.2013.2267958},
doi = {10.1109/MDAT.2013.2267958},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/BowmanTTKD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanTKDT13,
author = {Keith A. Bowman and
Carlos Tokunaga and
Tanay Karnik and
Vivek K. De and
James W. Tschanz},
title = {A 22 nm All-Digital Dynamically Adaptive Clock Distribution for Supply
Voltage Droop Tolerance},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {4},
pages = {907--916},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2013.2237972},
doi = {10.1109/JSSC.2013.2237972},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanTKDT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ChenBAZT13,
author = {Chia{-}Hsiang Chen and
Keith A. Bowman and
Charles Augustine and
Zhengya Zhang and
Jim Tschanz},
editor = {Pai H. Chou and
Ru Huang and
Yuan Xie and
Tanay Karnik},
title = {Minimum supply voltage for sequential logic circuits in a 22nm technology},
booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
Beijing, China, September 4-6, 2013},
pages = {181--186},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISLPED.2013.6629291},
doi = {10.1109/ISLPED.2013.6629291},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/ChenBAZT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BudnikTCBGWAJ13,
author = {Mark M. Budnik and
Rasit Onur Topaloglu and
Pallab Chatterjee and
Keith A. Bowman and
Kamesh V. Gadepally and
Paul Wesling and
Syed M. Alam and
Rajiv V. Joshi},
title = {Welcome to {ISQED} 2013},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523576},
doi = {10.1109/ISQED.2013.6523576},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/BudnikTCBGWAJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ReddiPNB12,
author = {Vijay Janapa Reddi and
David Z. Pan and
Sani R. Nassif and
Keith A. Bowman},
title = {Robust and resilient designs from the bottom-up: Technology, CAD,
circuit, and system issues},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {7--16},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6165064},
doi = {10.1109/ASPDAC.2012.6165064},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ReddiPNB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NicolaidisAZZKBTLTRKKDA12,
author = {Michael Nicolaidis and
Lorena Anghel and
Nacer{-}Eddine Zergainoh and
Yervant Zorian and
Tanay Karnik and
Keith A. Bowman and
James W. Tschanz and
Shih{-}Lien Lu and
Carlos Tokunaga and
Arijit Raychowdhury and
Muhammad M. Khellah and
Jaydeep Kulkarni and
Vivek De and
Dimiter Avresky},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Design for test and reliability in ultimate {CMOS}},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {677--682},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176556},
doi = {10.1109/DATE.2012.6176556},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/NicolaidisAZZKBTLTRKKDA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BowmanTKDT12,
author = {Keith A. Bowman and
Carlos Tokunaga and
Tanay Karnik and
Vivek K. De and
Jim Tschanz},
title = {A 22nm dynamically adaptive clock distribution for voltage droop tolerance},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2012, Honolulu, HI, USA, June
13-15, 2012},
pages = {94--95},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSIC.2012.6243806},
doi = {10.1109/VLSIC.2012.6243806},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BowmanTKDT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isqed/2012,
editor = {Keith A. Bowman and
Kamesh V. Gadepally and
Pallab Chatterjee and
Mark M. Budnik and
Lalitha Immaneni},
title = {Thirteenth International Symposium on Quality Electronic Design, {ISQED}
2012, Santa Clara, CA, USA, March 19-21, 2012},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/xpl/conhome/6182938/proceeding},
isbn = {978-1-4673-1034-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/2012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/RaychowdhuryTBLAKGTWKD11,
author = {Arijit Raychowdhury and
Jim Tschanz and
Keith A. Bowman and
Shih{-}Lien Lu and
Paolo A. Aseron and
Muhammad M. Khellah and
Bibiche M. Geuskens and
Carlos Tokunaga and
Chris Wilkerson and
Tanay Karnik and
Vivek De},
title = {Error Detection and Correction in Microprocessor Core and Memory Due
to Fast Dynamic Voltage Droops},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {1},
number = {3},
pages = {208--217},
year = {2011},
url = {https://doi.org/10.1109/JETCAS.2011.2167070},
doi = {10.1109/JETCAS.2011.2167070},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/RaychowdhuryTBLAKGTWKD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/DigheVAKJBHTEBDB11,
author = {Saurabh Dighe and
Sriram R. Vangal and
Paolo A. Aseron and
Shasi Kumar and
Tiju Jacob and
Keith A. Bowman and
Jason Howard and
James W. Tschanz and
Vasantha Erraguntla and
Nitin Borkar and
Vivek K. De and
Shekhar Borkar},
title = {Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With
Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS
Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {1},
pages = {184--193},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2010.2080550},
doi = {10.1109/JSSC.2010.2080550},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/DigheVAKJBHTEBDB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanTLAKRGTWKD11,
author = {Keith A. Bowman and
James W. Tschanz and
Shih{-}Lien Lu and
Paolo A. Aseron and
Muhammad M. Khellah and
Arijit Raychowdhury and
Bibiche M. Geuskens and
Carlos Tokunaga and
Chris Wilkerson and
Tanay Karnik and
Vivek K. De},
title = {A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {1},
pages = {194--208},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2010.2089657},
doi = {10.1109/JSSC.2010.2089657},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanTLAKRGTWKD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/RaychowdhuryGBTLKKD11,
author = {Arijit Raychowdhury and
Bibiche M. Geuskens and
Keith A. Bowman and
James W. Tschanz and
Shih{-}Lien Lu and
Tanay Karnik and
Muhammad M. Khellah and
Vivek K. De},
title = {Tunable Replica Bits for Dynamic Variation Tolerance in 8T {SRAM}
Arrays},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {4},
pages = {797--805},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2011.2108141},
doi = {10.1109/JSSC.2011.2108141},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/RaychowdhuryGBTLKKD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BowmanTTRKGLAKD11,
author = {Keith A. Bowman and
Carlos Tokunaga and
James W. Tschanz and
Arijit Raychowdhury and
Muhammad M. Khellah and
Bibiche M. Geuskens and
Shih{-}Lien Lu and
Paolo A. Aseron and
Tanay Karnik and
Vivek K. De},
title = {All-Digital Circuit-Level Dynamic Variation Monitor for Silicon Debug
and Adaptive Clock Control},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {58-I},
number = {9},
pages = {2017--2025},
year = {2011},
url = {https://doi.org/10.1109/TCSI.2011.2163893},
doi = {10.1109/TCSI.2011.2163893},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/BowmanTTRKGLAKD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TschanzBKWGSRKTLKD10,
author = {James W. Tschanz and
Keith A. Bowman and
Muhammad M. Khellah and
Chris Wilkerson and
Bibiche M. Geuskens and
Dinesh Somasekhar and
Arijit Raychowdhury and
Jaydeep Kulkarni and
Carlos Tokunaga and
Shih{-}Lien Lu and
Tanay Karnik and
Vivek De},
title = {Resilient design in scaled {CMOS} for energy efficiency},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {625},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419812},
doi = {10.1109/ASPDAC.2010.5419812},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TschanzBKWGSRKTLKD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BowmanTTRKGLAKD10,
author = {Keith A. Bowman and
Carlos Tokunaga and
James W. Tschanz and
Arijit Raychowdhury and
Muhammad M. Khellah and
Bibiche M. Geuskens and
Shih{-}Lien Lu and
Paolo A. Aseron and
Tanay Karnik and
Vivek De},
editor = {Jacqueline Snyder and
Rakesh Patel and
Tom Andre},
title = {Dynamic variation monitor for measuring the impact of voltage droops
on microprocessor clock frequency},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2010, San Jose,
California, USA, 19-22 September, 2010, Proceedings},
pages = {1--4},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/CICC.2010.5617415},
doi = {10.1109/CICC.2010.5617415},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/BowmanTTRKGLAKD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BowmanT10,
author = {Keith A. Bowman and
James W. Tschanz},
editor = {Louis Scheffer and
Joel R. Phillips and
Alan J. Hu},
title = {Resilient microprocessor design for improving performance and energy
efficiency},
booktitle = {2010 International Conference on Computer-Aided Design, {ICCAD} 2010,
San Jose, CA, USA, November 7-11, 2010},
pages = {85--88},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICCAD.2010.5654317},
doi = {10.1109/ICCAD.2010.5654317},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BowmanT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BowmanTLAKRGTWKD10,
author = {Keith A. Bowman and
James W. Tschanz and
Shih{-}Lien Lu and
Paolo A. Aseron and
Muhammad M. Khellah and
Arijit Raychowdhury and
Bibiche M. Geuskens and
Carlos Tokunaga and
Chris Wilkerson and
Tanay Karnik and
Vivek De},
editor = {Vojin G. Oklobdzija and
Barry Pangle and
Naehyuck Chang and
Naresh R. Shanbhag and
Chris H. Kim},
title = {Resilient microprocessor design for high performance {\&} energy
efficiency},
booktitle = {Proceedings of the 2010 International Symposium on Low Power Electronics
and Design, 2010, Austin, Texas, USA, August 18-20, 2010},
pages = {355--356},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1840845.1840919},
doi = {10.1145/1840845.1840919},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/BowmanTLAKRGTWKD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/DigheVAKJBHTEBDB10,
author = {Saurabh Dighe and
Sriram R. Vangal and
Paolo A. Aseron and
Shasi Kumar and
Tiju Jacob and
Keith A. Bowman and
Jason Howard and
James W. Tschanz and
Vasantha Erraguntla and
Nitin Borkar and
Vivek De and
Shekhar Borkar},
title = {Within-die variation-aware dynamic-voltage-frequency scaling core
mapping and thread hopping for an 80-core processor},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {174--175},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5433997},
doi = {10.1109/ISSCC.2010.5433997},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/DigheVAKJBHTEBDB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TschanzBLAKRGTWKD10,
author = {James W. Tschanz and
Keith A. Bowman and
Shih{-}Lien Lu and
Paolo A. Aseron and
Muhammad M. Khellah and
Arijit Raychowdhury and
Bibiche M. Geuskens and
Carlos Tokunaga and
Chris Wilkerson and
Tanay Karnik and
Vivek De},
title = {A 45nm resilient and adaptive microprocessor core for dynamic variation
tolerance},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {282--283},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5433922},
doi = {10.1109/ISSCC.2010.5433922},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/TschanzBLAKRGTWKD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/RaychowdhuryGKTBKLDK10,
author = {Arijit Raychowdhury and
Bibiche M. Geuskens and
Jaydeep Kulkarni and
James W. Tschanz and
Keith A. Bowman and
Tanay Karnik and
Shih{-}Lien Lu and
Vivek De and
Muhammad M. Khellah},
title = {PVT-and-aging adaptive wordline boosting for 8T {SRAM} power reduction},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {352--353},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5433815},
doi = {10.1109/ISSCC.2010.5433815},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/RaychowdhuryGKTBKLDK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanTKLWLKD09,
author = {Keith A. Bowman and
James W. Tschanz and
Nam{-}Sung Kim and
Janice C. Lee and
Chris Wilkerson and
Shih{-}Lien Lu and
Tanay Karnik and
Vivek K. De},
title = {Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic
Variation Tolerance},
journal = {{IEEE} J. Solid State Circuits},
volume = {44},
number = {1},
pages = {49--63},
year = {2009},
url = {https://doi.org/10.1109/JSSC.2008.2007148},
doi = {10.1109/JSSC.2008.2007148},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanTKLWLKD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BowmanASW09,
author = {Keith A. Bowman and
Alaa R. Alameldeen and
Srikanth T. Srinivasan and
Chris Wilkerson},
title = {Impact of Die-to-Die and Within-Die Parameter Variations on the Clock
Frequency and Throughput of Multi-Core Processors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {12},
pages = {1679--1690},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2006057},
doi = {10.1109/TVLSI.2008.2006057},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/BowmanASW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BowmanTWLKDB09,
author = {Keith A. Bowman and
James W. Tschanz and
Chris Wilkerson and
Shih{-}Lien Lu and
Tanay Karnik and
Vivek De and
Shekhar Y. Borkar},
title = {Circuit techniques for dynamic variation tolerance},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {4--7},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1629915},
doi = {10.1145/1629911.1629915},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/BowmanTWLKDB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/TschanzBWLK09,
author = {James W. Tschanz and
Keith A. Bowman and
Chris Wilkerson and
Shih{-}Lien Lu and
Tanay Karnik},
editor = {Jaijeet S. Roychowdhury},
title = {Resilient circuits - Enabling energy-efficient performance and reliability},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {71--73},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687414},
doi = {10.1145/1687399.1687414},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/TschanzBWLK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/BowmanTKLWLKD08,
author = {Keith A. Bowman and
James W. Tschanz and
Nam{-}Sung Kim and
Janice C. Lee and
Chris Wilkerson and
Shih{-}Lien Lu and
Tanay Karnik and
Vivek K. De},
title = {Energy-Efficient and Metastability-Immune Timing-Error Detection and
Instruction-Replay-Based Recovery Circuits for Dynamic-Variation Tolerance},
booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2008, Digest of Technical Papers, San Francisco, CA, USA, February
3-7, 2008},
pages = {402--403},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISSCC.2008.4523227},
doi = {10.1109/ISSCC.2008.4523227},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/BowmanTKLWLKD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BurnsKMBTD07,
author = {Steven M. Burns and
Mahesh Ketkar and
Noel Menezes and
Keith A. Bowman and
James W. Tschanz and
Vivek De},
title = {Comparative Analysis of Conventional and Statistical Design Techniques},
booktitle = {Proceedings of the 44th Design Automation Conference, {DAC} 2007,
San Diego, CA, USA, June 4-8, 2007},
pages = {238--243},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1145/1278480.1278539},
doi = {10.1145/1278480.1278539},
timestamp = {Wed, 15 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/BurnsKMBTD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BowmanASW07,
author = {Keith A. Bowman and
Alaa R. Alameldeen and
Srikanth T. Srinivasan and
Chris Wilkerson},
editor = {Diana Marculescu and
Anand Raghunathan and
Ali Keshavarzi and
Vijaykrishnan Narayanan},
title = {Impact of die-to-die and within-die parameter variations on the throughput
distribution of multi-core processors},
booktitle = {Proceedings of the 2007 International Symposium on Low Power Electronics
and Design, 2007, Portland, OR, USA, August 27-29, 2007},
pages = {50--55},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1283780.1283792},
doi = {10.1145/1283780.1283792},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/BowmanASW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/UnsalTBDVGE06,
author = {Osman S. Unsal and
James W. Tschanz and
Keith A. Bowman and
Vivek De and
Xavier Vera and
Antonio Gonz{\'{a}}lez and
Oguz Ergin},
title = {Impact of Parameter Variations on Circuits and Microarchitecture},
journal = {{IEEE} Micro},
volume = {26},
number = {6},
pages = {30--39},
year = {2006},
url = {https://doi.org/10.1109/MM.2006.122},
doi = {10.1109/MM.2006.122},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/UnsalTBDVGE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BowmanTKGID06,
author = {Keith A. Bowman and
James W. Tschanz and
Muhammad M. Khellah and
Maged Ghoneima and
Yehea I. Ismail and
Vivek De},
editor = {Wolfgang Nebel and
Mircea R. Stan and
Anand Raghunathan and
J{\"{o}}rg Henkel and
Diana Marculescu},
title = {Time-borrowing multi-cycle on-chip interconnects for delay variation
tolerance},
booktitle = {Proceedings of the 2006 International Symposium on Low Power Electronics
and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006},
pages = {79--84},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1165573.1165592},
doi = {10.1145/1165573.1165592},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/BowmanTKGID06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BowmanOS06,
author = {Keith A. Bowman and
Michael Orshansky and
Sachin S. Sapatnekar},
title = {Tutorial {II:} Variability and Its Impact on Design},
booktitle = {7th International Symposium on Quality of Electronic Design {(ISQED}
2006), 27-29 March 2006, San Jose, CA, {USA}},
pages = {5},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISQED.2006.141},
doi = {10.1109/ISQED.2006.141},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/BowmanOS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TschanzBD05,
author = {James W. Tschanz and
Keith A. Bowman and
Vivek De},
editor = {William H. Joyner Jr. and
Grant Martin and
Andrew B. Kahng},
title = {Variation-tolerant circuits: circuit solutions and techniques},
booktitle = {Proceedings of the 42nd Design Automation Conference, {DAC} 2005,
San Diego, CA, USA, June 13-17, 2005},
pages = {762--763},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1065579.1065780},
doi = {10.1145/1065579.1065780},
timestamp = {Wed, 15 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/TschanzBD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SuarisKBDM05,
author = {Peter Suaris and
Taeho Kgil and
Keith A. Bowman and
Vivek De and
Trevor N. Mudge},
title = {Total power-optimal pipelining and parallel processing under process
variations in nanometer technology},
booktitle = {2005 International Conference on Computer-Aided Design, {ICCAD} 2005,
San Jose, CA, USA, November 6-10, 2005},
pages = {535--540},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICCAD.2005.1560125},
doi = {10.1109/ICCAD.2005.1560125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SuarisKBDM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KeshavarziSTMBTZLHDBD05,
author = {Ali Keshavarzi and
Gerhard Schrom and
Stephen Tang and
Sean Ma and
Keith A. Bowman and
Sunit Tyagi and
Kevin Zhang and
Tom Linton and
Nagib Hakim and
Steven G. Duvall and
John Brews and
Vivek De},
editor = {Kaushik Roy and
Vivek Tiwari},
title = {Measurements and modeling of intrinsic fluctuations in {MOSFET} threshold
voltage},
booktitle = {Proceedings of the 2005 International Symposium on Low Power Electronics
and Design, 2005, San Diego, California, USA, August 8-10, 2005},
pages = {26--29},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1077603.1077611},
doi = {10.1145/1077603.1077611},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/KeshavarziSTMBTZLHDBD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanDM02,
author = {Keith A. Bowman and
Steven G. Duvall and
James D. Meindl},
title = {Impact of die-to-die and within-die parameter fluctuations on the
maximum clock frequency distribution for gigascale integration},
journal = {{IEEE} J. Solid State Circuits},
volume = {37},
number = {2},
pages = {183--190},
year = {2002},
url = {https://doi.org/10.1109/4.982424},
doi = {10.1109/4.982424},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanDM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/VenkatesanDBM01,
author = {Raguraman Venkatesan and
Jeffrey A. Davis and
Keith A. Bowman and
James D. Meindl},
title = {Optimal n-tier multilevel interconnect architectures for gigascale
integration {(GSI)}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {9},
number = {6},
pages = {899--912},
year = {2001},
url = {https://doi.org/10.1109/92.974903},
doi = {10.1109/92.974903},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/VenkatesanDBM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BowmanM01,
author = {Keith A. Bowman and
James D. Meindl},
title = {Impact of within-die parameter fluctuations on future maximum clock
frequency distributions},
booktitle = {Proceedings of the {IEEE} 2001 Custom Integrated Circuits Conference,
{CICC} 2001, San Diego, CA, USA, May 6-9, 2001},
pages = {229--232},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/CICC.2001.929761},
doi = {10.1109/CICC.2001.929761},
timestamp = {Mon, 10 Oct 2022 09:13:22 +0200},
biburl = {https://dblp.org/rec/conf/cicc/BowmanM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanTEM00,
author = {Keith A. Bowman and
Xinghai Tang and
John C. Eble and
James D. Menldl},
title = {Impact of extrinsic and intrinsic parameter fluctuations on {CMOS}
circuit performance},
journal = {{IEEE} J. Solid State Circuits},
volume = {35},
number = {8},
pages = {1186--1193},
year = {2000},
url = {https://doi.org/10.1109/4.859508},
doi = {10.1109/4.859508},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanTEM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BhavnagarwalaABM00,
author = {Azeez J. Bhavnagarwala and
Blanca Austin and
Keith A. Bowman and
James D. Meindl},
title = {A minimum total power methodology for projecting limits on {CMOS}
{GSI}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {8},
number = {3},
pages = {235--251},
year = {2000},
url = {https://doi.org/10.1109/92.845891},
doi = {10.1109/92.845891},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/BhavnagarwalaABM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/VenkatesanDBM00,
author = {Raguraman Venkatesan and
Jeffrey A. Davis and
Keith A. Bowman and
James D. Meindl},
editor = {David T. Blaauw and
Christian C. Enz and
Thaddeus Gabara and
Enrico Macii},
title = {Minimum power and area n-tier multilevel interconnect architectures
using optimal repeater insertion},
booktitle = {Proceedings of the 2000 International Symposium on Low Power Electronics
and Design, 2000, Rapallo, Italy, July 25-27, 2000},
pages = {167--172},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/344166.344568},
doi = {10.1145/344166.344568},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/VenkatesanDBM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/slip/DavisVBM00,
author = {Jeffrey A. Davis and
Raguraman Venkatesan and
Keith A. Bowman and
James D. Meindl},
title = {Gigascale integration {(GSI)} interconnect limits and n-tier multilevel
interconnect architectural solutions (discussion session)},
booktitle = {The Second {IEEE/ACM} International Workshop on System-Level Interconnect
Prediction {(SLIP} 2000), April 8-9, 2000, San Diego, California,
USA, Proceedings},
pages = {147--148},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/333032.333045},
doi = {10.1145/333032.333045},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/slip/DavisVBM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BowmanAETM99,
author = {Keith A. Bowman and
Blanca Austin and
John C. Eble and
Xinghai Tang and
James D. Meindl},
title = {A physical alpha-power law {MOSFET} model},
journal = {{IEEE} J. Solid State Circuits},
volume = {34},
number = {10},
pages = {1410--1414},
year = {1999},
url = {https://doi.org/10.1109/4.792617},
doi = {10.1109/4.792617},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BowmanAETM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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