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ORCIDBibTeX records: Florentin Dartu
@inproceedings{DBLP:conf/ispd/DartuW13,
author = {Florentin Dartu and
Qiuyang Wu},
editor = {Cheng{-}Kok Koh and
Cliff C. N. Sze},
title = {To do or not to do hierarchical timing?},
booktitle = {International Symposium on Physical Design, ISPD'13, Stateline, NV,
USA, March 24-27, 2013},
pages = {180},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2451916.2451964},
doi = {10.1145/2451916.2451964},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/DartuW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChoiKDR10,
author = {Seung Hoon Choi and
Kunhyuk Kang and
Florentin Dartu and
Kaushik Roy},
title = {Timed Input Pattern Generation for an Accurate Delay Calculation Under
Multiple Input Switching},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {3},
pages = {497--502},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2009.2035482},
doi = {10.1109/TCAD.2009.2035482},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChoiKDR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/StevensD06,
author = {Kenneth S. Stevens and
Florentin Dartu},
editor = {Soha Hassoun},
title = {Algorithms for {MIS} vector generation and pruning},
booktitle = {2006 International Conference on Computer-Aided Design, {ICCAD} 2006,
San Jose, CA, USA, November 5-9, 2006},
pages = {408--414},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1233501.1233583},
doi = {10.1145/1233501.1233583},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/StevensD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AminDI05,
author = {Chirayu S. Amin and
Florentin Dartu and
Yehea I. Ismail},
title = {Weibull-based analytical waveform model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {24},
number = {8},
pages = {1156--1168},
year = {2005},
url = {https://doi.org/10.1109/TCAD.2005.850826},
doi = {10.1109/TCAD.2005.850826},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AminDI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AminMKDCHI05,
author = {Chirayu S. Amin and
Noel Menezes and
Kip Killpack and
Florentin Dartu and
Umakanta Choudhury and
Nagib Hakim and
Yehea I. Ismail},
editor = {William H. Joyner Jr. and
Grant Martin and
Andrew B. Kahng},
title = {Statistical static timing analysis: how simple can we get?},
booktitle = {Proceedings of the 42nd Design Automation Conference, {DAC} 2005,
San Diego, CA, USA, June 13-17, 2005},
pages = {652--657},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1065579.1065751},
doi = {10.1145/1065579.1065751},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AminMKDCHI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AminID05,
author = {Chirayu S. Amin and
Yehea I. Ismail and
Florentin Dartu},
editor = {William H. Joyner Jr. and
Grant Martin and
Andrew B. Kahng},
title = {Piece-wise approximations of {RLCK} circuit responses using moment
matching},
booktitle = {Proceedings of the 42nd Design Automation Conference, {DAC} 2005,
San Diego, CA, USA, June 13-17, 2005},
pages = {927--932},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1065579.1065822},
doi = {10.1145/1065579.1065822},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AminID05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DartuDM05,
author = {Florentin Dartu and
Anirudh Devgan and
Noel Menezes},
editor = {John C. Lach and
Gang Qu and
Yehea I. Ismail},
title = {Variability modeling and variability-aware design in deep submicron
integrated circuits},
booktitle = {Proceedings of the 15th {ACM} Great Lakes Symposium on {VLSI} 2005,
Chicago, Illinois, USA, April 17-19, 2005},
pages = {1},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1057661.1057662},
doi = {10.1145/1057661.1057662},
timestamp = {Wed, 15 Dec 2021 17:59:57 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DartuDM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ShebaitaADI05,
author = {Ahmed M. Shebaita and
Chirayu S. Amin and
Florentin Dartu and
Yehea I. Ismail},
title = {Expanding the frequency range of {AWE} via time shifting},
booktitle = {2005 International Conference on Computer-Aided Design, {ICCAD} 2005,
San Jose, CA, USA, November 6-10, 2005},
pages = {935--938},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICCAD.2005.1560196},
doi = {10.1109/ICCAD.2005.1560196},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ShebaitaADI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AgarwalDB04,
author = {Aseem Agarwal and
Florentin Dartu and
David T. Blaauw},
editor = {Sharad Malik and
Limor Fix and
Andrew B. Kahng},
title = {Statistical gate delay model considering multiple input switching},
booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004,
San Diego, CA, USA, June 7-11, 2004},
pages = {658--663},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/996566.996746},
doi = {10.1145/996566.996746},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AgarwalDB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/AminDI04,
author = {Chirayu S. Amin and
Florentin Dartu and
Yehea I. Ismail},
title = {Modeling unbuffered latches for timing analysis},
booktitle = {2004 International Conference on Computer-Aided Design, {ICCAD} 2004,
San Jose, CA, USA, November 7-11, 2004},
pages = {254--260},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2004},
url = {https://doi.org/10.1109/ICCAD.2004.1382582},
doi = {10.1109/ICCAD.2004.1382582},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/AminDI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/AminDI03,
author = {Chirayu S. Amin and
Florentin Dartu and
Yehea I. Ismail},
title = {Weibull Based Analytical Waveform Model},
booktitle = {2003 International Conference on Computer-Aided Design, {ICCAD} 2003,
San Jose, CA, USA, November 9-13, 2003},
pages = {161--168},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ICCAD.2003.1257625},
doi = {10.1109/ICCAD.2003.1257625},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/AminDI03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AcarDP02,
author = {Emrah Acar and
Florentin Dartu and
Lawrence T. Pileggi},
title = {{TETA:} transistor-level waveform evaluation for timing analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {5},
pages = {605--616},
year = {2002},
url = {https://doi.org/10.1109/43.998631},
doi = {10.1109/43.998631},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AcarDP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChoiRD02,
author = {Seung Hoon Choi and
Kaushik Roy and
Florentin Dartu},
title = {Timed pattern generation for noise-on-delay calculation},
booktitle = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
New Orleans, LA, USA, June 10-14, 2002},
pages = {870--873},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/513918.514133},
doi = {10.1145/513918.514133},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChoiRD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DartuP98,
author = {Florentin Dartu and
Lawrence T. Pileggi},
editor = {Basant R. Chawla and
Randal E. Bryant and
Jan M. Rabaey},
title = {{TETA:} Transistor-Level Engine for Timing Analysis},
booktitle = {Proceedings of the 35th Conference on Design Automation, Moscone center,
San Francico, California, USA, June 15-19, 1998},
pages = {595--598},
publisher = {{ACM} Press},
year = {1998},
url = {https://doi.org/10.1145/277044.277200},
doi = {10.1145/277044.277200},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DartuP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DartuP97,
author = {Florentin Dartu and
Lawrence T. Pileggi},
editor = {Ellen J. Yoffa and
Giovanni De Micheli and
Jan M. Rabaey},
title = {Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling},
booktitle = {Proceedings of the 34st Conference on Design Automation, Anaheim,
California, USA, Anaheim Convention Center, June 9-13, 1997},
pages = {46--51},
publisher = {{ACM} Press},
year = {1997},
url = {https://doi.org/10.1145/266021.266033},
doi = {10.1145/266021.266033},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DartuP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ArunachalamDP97,
author = {Ravishankar Arunachalam and
Florentin Dartu and
Lawrence T. Pileggi},
title = {{CMOS} Gate Delay Models for General {RLC} Loading},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {224--229},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628872},
doi = {10.1109/ICCD.1997.628872},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ArunachalamDP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DartuMP96,
author = {Florentin Dartu and
Noel Menezes and
Lawrence T. Pileggi},
title = {Performance computation for precharacterized {CMOS} gates with {RC}
loads},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {15},
number = {5},
pages = {544--553},
year = {1996},
url = {https://doi.org/10.1109/43.506141},
doi = {10.1109/43.506141},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DartuMP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DartuTP96,
author = {Florentin Dartu and
Bogdan Tutuianu and
Lawrence T. Pileggi},
editor = {Thomas Pennino and
Ellen J. Yoffa},
title = {RC-Interconnect Macromodels for Timing Simulation},
booktitle = {Proceedings of the 33st Conference on Design Automation, Las Vegas,
Nevada, USA, Las Vegas Convention Center, June 3-7, 1996},
pages = {544--547},
publisher = {{ACM} Press},
year = {1996},
url = {https://doi.org/10.1145/240518.240621},
doi = {10.1145/240518.240621},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DartuTP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TutuianuDP96,
author = {Bogdan Tutuianu and
Florentin Dartu and
Lawrence T. Pileggi},
editor = {Thomas Pennino and
Ellen J. Yoffa},
title = {An Explicit RC-Circuit Delay Approximation Based on the First Three
Moments of the Impulse Response},
booktitle = {Proceedings of the 33st Conference on Design Automation, Las Vegas,
Nevada, USA, Las Vegas Convention Center, June 3-7, 1996},
pages = {611--616},
publisher = {{ACM} Press},
year = {1996},
url = {https://doi.org/10.1145/240518.240634},
doi = {10.1145/240518.240634},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/TutuianuDP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DartuMQP94,
author = {Florentin Dartu and
Noel Menezes and
Jessica Qian and
Lawrence T. Pillage},
editor = {Michael J. Lorenzetti},
title = {A Gate-Delay Model for high-Speed {CMOS} Circuits},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994},
pages = {576--580},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/196244.196562},
doi = {10.1145/196244.196562},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DartuMQP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/MenezesPDP94,
author = {Noel Menezes and
Satyamurthy Pullela and
Florentin Dartu and
Lawrence T. Pillage},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {{RC} interconnect synthesis-a moment fitting approach},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {418--425},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629837},
doi = {10.1109/ICCAD.1994.629837},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/MenezesPDP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TesuD93,
author = {Ion Constatin Tesu and
Florentin Dartu},
title = {Piecewise Linear Macromodels for Elementary Logic and Fuzzy Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1718--1721},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TesuD93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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