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ORCIDBibTeX records: James R. Goodman
@inproceedings{DBLP:conf/ics/GoodmanH14,
author = {James R. Goodman and
Wei{-}Chung Hsu},
editor = {Utpal Banerjee},
title = {Author retrospective for code scheduling and register allocation in
large basic blocks},
booktitle = {{ACM} International Conference on Supercomputing 25th Anniversary
Volume},
pages = {4--5},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2591635.2591640},
doi = {10.1145/2591635.2591640},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/GoodmanH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/TabbaHG11,
author = {Fuad Tabba and
Andrew W. Hay and
James R. Goodman},
editor = {David K. Lowenthal and
Bronis R. de Supinski and
Sally A. McKee},
title = {Transactional conflict decoupling and value prediction},
booktitle = {Proceedings of the 25th International Conference on Supercomputing,
2011, Tucson, AZ, USA, May 31 - June 04, 2011},
pages = {33--42},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1995896.1995904},
doi = {10.1145/1995896.1995904},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/TabbaHG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/TabbaMGHW09,
author = {Fuad Tabba and
Mark Moir and
James R. Goodman and
Andrew W. Hay and
Cong Wang},
editor = {Friedhelm Meyer auf der Heide and
Michael A. Bender},
title = {{NZTM:} nonblocking zero-indirection transactional memory},
booktitle = {{SPAA} 2009: Proceedings of the 21st Annual {ACM} Symposium on Parallelism
in Algorithms and Architectures, Calgary, Alberta, Canada, August
11-13, 2009},
pages = {204--213},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1583991.1584048},
doi = {10.1145/1583991.1584048},
timestamp = {Wed, 21 Nov 2018 11:15:22 +0100},
biburl = {https://dblp.org/rec/conf/spaa/TabbaMGHW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0011527,
author = {Andrew S. Tanenbaum and
James R. Goodman},
title = {Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage},
publisher = {Pearson Studium},
year = {2004},
url = {http://www.pearson-studium.de/main/main.asp?page=bookdetails\&\#38;ProductID=7394},
isbn = {978-3-8273-7148-5},
timestamp = {Thu, 27 Apr 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0011527.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/BurgerG04,
author = {Doug Burger and
James R. Goodman},
title = {Billion-Transistor Architectures: There and Back Again},
journal = {Computer},
volume = {37},
number = {3},
pages = {22--28},
year = {2004},
url = {https://doi.org/10.1109/MC.2004.1273999},
doi = {10.1109/MC.2004.1273999},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/BurgerG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/RajwarKG04,
author = {Ravi Rajwar and
Alain K{\"{a}}gi and
James R. Goodman},
title = {Inferential Queueing and Speculative Push},
journal = {Int. J. Parallel Program.},
volume = {32},
number = {3},
pages = {225--258},
year = {2004},
url = {https://doi.org/10.1023/B:IJPP.0000029274.45582.a8},
doi = {10.1023/B:IJPP.0000029274.45582.A8},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/RajwarKG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ics/2004,
editor = {Paul Feautrier and
James R. Goodman and
Andr{\'{e}} Seznec},
title = {Proceedings of the 18th Annual International Conference on Supercomputing,
{ICS} 2004, Saint Malo, France, June 26 - July 01, 2004},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1006209},
doi = {10.1145/1006209},
isbn = {1-58113-839-3},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/RajwarG03,
author = {Ravi Rajwar and
James R. Goodman},
title = {Transactional Execution: Toward Reliable, High-Performance Multithreading},
journal = {{IEEE} Micro},
volume = {23},
number = {6},
pages = {117--125},
year = {2003},
url = {https://doi.org/10.1109/MM.2003.1261395},
doi = {10.1109/MM.2003.1261395},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/RajwarG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/RajwarKG03,
author = {Ravi Rajwar and
Alain K{\"{a}}gi and
James R. Goodman},
editor = {Utpal Banerjee and
Kyle A. Gallivan and
Antonio Gonz{\'{a}}lez},
title = {Inferential queueing and speculative push for reducing critical communication
latencies},
booktitle = {Proceedings of the 17th Annual International Conference on Supercomputing,
{ICS} 2003, San Francisco, CA, USA, June 23-26, 2003},
pages = {273--284},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/782814.782853},
doi = {10.1145/782814.782853},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/RajwarKG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/RajwarG02,
author = {Ravi Rajwar and
James R. Goodman},
editor = {Kourosh Gharachorloo and
David A. Wood},
title = {Transactional lock-free execution of lock-based programs},
booktitle = {Proceedings of the 10th International Conference on Architectural
Support for Programming Languages and Operating Systems (ASPLOS-X),
San Jose, California, USA, October 5-9, 2002},
pages = {5--17},
publisher = {{ACM} Press},
year = {2002},
url = {https://doi.org/10.1145/605397.605399},
doi = {10.1145/605397.605399},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/RajwarG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0004612,
author = {Andrew S. Tanenbaum and
James R. Goodman},
title = {Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage},
publisher = {Pearson Studium},
year = {2001},
isbn = {978-3-8273-7016-7},
timestamp = {Thu, 27 Apr 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0004612.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RajwarG01,
author = {Ravi Rajwar and
James R. Goodman},
editor = {Yale N. Patt and
Josh Fisher and
Paolo Faraboschi and
Kevin Skadron},
title = {Speculative lock elision: enabling highly concurrent multithreaded
execution},
booktitle = {Proceedings of the 34th Annual International Symposium on Microarchitecture,
Austin, Texas, USA, December 1-5, 2001},
pages = {294--305},
publisher = {{ACM/IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/MICRO.2001.991127},
doi = {10.1109/MICRO.2001.991127},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/RajwarG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RajwarKG00,
author = {Ravi Rajwar and
Alain K{\"{a}}gi and
James R. Goodman},
title = {Improving the Throughput of Synchronization by Insertion of Delays},
booktitle = {Proceedings of the Sixth International Symposium on High-Performance
Computer Architecture, Toulouse, France, January 8-12, 2000},
pages = {168--179},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/HPCA.2000.824348},
doi = {10.1109/HPCA.2000.824348},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RajwarKG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KaxirasBG99,
author = {Stefanos Kaxiras and
Doug Burger and
James R. Goodman},
title = {DataScalar: {A} memory-centric approach to computing},
journal = {J. Syst. Archit.},
volume = {45},
number = {12-13},
pages = {1001--1022},
year = {1999},
url = {https://doi.org/10.1016/S1383-7621(98)00048-4},
doi = {10.1016/S1383-7621(98)00048-4},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/KaxirasBG99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KaxirasG99,
author = {Stefanos Kaxiras and
James R. Goodman},
title = {Improving {CC-NUMA} Performance Using Instruction-Based Prediction},
booktitle = {Proceedings of the Fifth International Symposium on High-Performance
Computer Architecture, Orlando, FL, USA, January 9-12, 1999},
pages = {161--170},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/HPCA.1999.744359},
doi = {10.1109/HPCA.1999.744359},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KaxirasG99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/KaxirasGG98,
author = {Stefanos Kaxiras and
Stein Gjessing and
James R. Goodman},
editor = {Greg K. Egan and
Richard P. Brent and
Dennis Gannon},
title = {A Study of Three Dynamic Approaches to Handle Widely Shared Data in
Shared-memory Multiprocessors},
booktitle = {Proceedings of the 12th international conference on Supercomputing,
{ICS} 1998, Melbourne, Australia, July 13-17, 1998},
pages = {457--464},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/277830.277943},
doi = {10.1145/277830.277943},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/KaxirasGG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Goodman98,
author = {James R. Goodman},
editor = {Gurindar S. Sohi},
title = {Retrospective: Using Cache Memory to Reduce Processor-Memory Traffic},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {32--33},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285944},
doi = {10.1145/285930.285944},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/Goodman98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Goodman98a,
author = {James R. Goodman},
editor = {Gurindar S. Sohi},
title = {Using Cache Memory to Reduce Processor-Memory Traffic},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {255--262},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285984},
doi = {10.1145/285930.285984},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Goodman98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/BurgerG97,
author = {Doug Burger and
James R. Goodman},
title = {Billion-Transistor Architectures - Guest Editors' Introduction},
journal = {Computer},
volume = {30},
number = {9},
pages = {46--49},
year = {1997},
url = {https://doi.org/10.1109/MC.1997.612248},
doi = {10.1109/MC.1997.612248},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/BurgerG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BurgerGK97,
author = {Doug Burger and
James R. Goodman and
Alain K{\"{a}}gi},
title = {Limited bandwidth to affect processor design},
journal = {{IEEE} Micro},
volume = {17},
number = {6},
pages = {55--62},
year = {1997},
url = {https://doi.org/10.1109/40.641597},
doi = {10.1109/40.641597},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BurgerGK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KagiBG97,
author = {Alain K{\"{a}}gi and
Doug Burger and
James R. Goodman},
editor = {Andrew R. Pleszkun and
Trevor N. Mudge},
title = {Efficient Synchronization: Let Them Eat {QOLB}},
booktitle = {Proceedings of the 24th International Symposium on Computer Architecture,
Denver, Colorado, USA, June 2-4, 1997},
pages = {170--180},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/264107.264166},
doi = {10.1145/264107.264166},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/KagiBG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BurgerKG97,
author = {Doug Burger and
Stefanos Kaxiras and
James R. Goodman},
editor = {Andrew R. Pleszkun and
Trevor N. Mudge},
title = {DataScalar Architectures},
booktitle = {Proceedings of the 24th International Symposium on Computer Architecture,
Denver, Colorado, USA, June 2-4, 1997},
pages = {338--349},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/264107.264215},
doi = {10.1145/264107.264215},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/BurgerKG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/crc/tucker97/BurgerGS97,
author = {Doug Burger and
James R. Goodman and
Gurindar S. Sohi},
editor = {Allen B. Tucker},
title = {Memory Systems},
booktitle = {The Computer Science and Engineering Handbook},
pages = {447--461},
publisher = {{CRC} Press},
year = {1997},
timestamp = {Sun, 09 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/crc/tucker97/BurgerGS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/KaxirasG96,
author = {Stefanos Kaxiras and
James R. Goodman},
editor = {Pen{-}Chung Yew},
title = {The {GLOW} Cache Coherence Protocol Extensions for Widely Shared Data},
booktitle = {Proceedings of the 10th international conference on Supercomputing,
{ICS} 1996, Philadelphia, PA, USA, May 25-28, 1996},
pages = {35--43},
publisher = {{ACM}},
year = {1996},
url = {https://doi.org/10.1145/237578.237583},
doi = {10.1145/237578.237583},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/KaxirasG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BurgerGK96,
author = {Doug Burger and
James R. Goodman and
Alain K{\"{a}}gi},
editor = {Jean{-}Loup Baer},
title = {Memory Bandwidth Limitations of Future Microprocessors},
booktitle = {Proceedings of the 23rd Annual International Symposium on Computer
Architecture, Philadelphia, PA, USA, May 22-24, 1996},
pages = {78--89},
publisher = {{ACM}},
year = {1996},
url = {https://doi.org/10.1145/232973.232983},
doi = {10.1145/232973.232983},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/BurgerGK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/KagiABG95,
author = {Alain K{\"{a}}gi and
Nagi Aboulenein and
Doug Burger and
James R. Goodman},
editor = {Mateo Valero},
title = {Techniques for Reducing Overheads of Shared-Memory Multiprocessing},
booktitle = {Proceedings of the 9th international conference on Supercomputing,
{ICS} 1995, Barcelona, Spain, July 3-7, 1995},
pages = {11--20},
publisher = {{ACM}},
year = {1995},
url = {https://doi.org/10.1145/224538.224540},
doi = {10.1145/224538.224540},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/KagiABG95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ScottG94,
author = {Steven L. Scott and
James R. Goodman},
title = {The Impact of Pipelined Channels on k-ary n-Cube Networks},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {5},
number = {1},
pages = {2--16},
year = {1994},
url = {https://doi.org/10.1109/71.262584},
doi = {10.1109/71.262584},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ScottG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/AbouleneinGGW94,
author = {Nagi Aboulenein and
James R. Goodman and
Stein Gjessing and
Philip J. Woest},
editor = {Howard Jay Siegel},
title = {Hardware Support for Synchronization in the Scalable Coherent Interface
{(SCI)}},
booktitle = {Proceedings of the 8th International Symposium on Parallel Processing,
Canc{\'{u}}n, Mexico, April 1994},
pages = {141--150},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IPPS.1994.288308},
doi = {10.1109/IPPS.1994.288308},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/AbouleneinGGW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ScottG93,
author = {Steven L. Scott and
James R. Goodman},
title = {Performance of Pruning-Cache Directories for Large-Scale Multiprocessors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {4},
number = {5},
pages = {520--534},
year = {1993},
url = {https://doi.org/10.1109/71.224215},
doi = {10.1109/71.224215},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ScottG93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/SiegelABBCDDDFGHJJPSSSSTW92,
author = {Howard Jay Siegel and
Seth Abraham and
William L. Bain and
Kenneth E. Batcher and
Thomas L. Casavant and
Doug DeGroot and
Jack B. Dennis and
David C. Douglas and
Tse{-}Yun Feng and
James R. Goodman and
Alan Huang and
Harry F. Jordan and
J. Robert Jamp and
Yale N. Patt and
Alan Jay Smith and
James E. Smith and
Lawrence Snyder and
Harold S. Stone and
Russ Tuck and
Benjamin W. Wah},
title = {Report of the Purdue Workshop on Grand Challenges in Computer Architecture
for the Support of High Performance Computing},
journal = {J. Parallel Distributed Comput.},
volume = {16},
number = {3},
pages = {199--211},
year = {1992},
url = {https://doi.org/10.1016/0743-7315(92)90033-J},
doi = {10.1016/0743-7315(92)90033-J},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/SiegelABBCDDDFGHJJPSSSSTW92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/JohnsonG92,
author = {Ross E. Johnson and
James R. Goodman},
editor = {Trevor N. Mudge},
title = {Synthesizing General Topologies from Rings},
booktitle = {Proceedings of the 1992 International Conference on Parallel Processing,
University of Michigan, An Arbor, Michigan, USA, August 17-21, 1992.
Volume {I:} Architecture},
pages = {86--95},
publisher = {{CRC} Press},
year = {1992},
timestamp = {Mon, 28 Jul 2014 17:06:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/JohnsonG92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ScottGV92,
author = {Steven L. Scott and
James R. Goodman and
Mary K. Vernon},
editor = {Allan Gottlieb},
title = {Performance of the {SCI} Ring},
booktitle = {Proceedings of the 19th Annual International Symposium on Computer
Architecture. Gold Coast, Australia, May 1992},
pages = {403--414},
publisher = {{ACM}},
year = {1992},
url = {https://doi.org/10.1145/139669.140404},
doi = {10.1145/139669.140404},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ScottGV92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/1990,
editor = {Jean{-}Loup Baer and
Larry Snyder and
James R. Goodman},
title = {Proceedings of the 17th Annual International Symposium on Computer
Architecture, Seattle, WA, USA, June 1990},
publisher = {{ACM}},
year = {1990},
url = {https://doi.org/10.1145/325164},
doi = {10.1145/325164},
isbn = {0-89791-366-3},
timestamp = {Thu, 08 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/1990.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tse/HsuFG89,
author = {Wei{-}Chung Hsu and
Charles N. Fischer and
James R. Goodman},
title = {On the Minimization of Loads/Stores in Local Register Allocation},
journal = {{IEEE} Trans. Software Eng.},
volume = {15},
number = {10},
pages = {1252--1260},
year = {1989},
url = {https://doi.org/10.1109/TSE.1989.559775},
doi = {10.1109/TSE.1989.559775},
timestamp = {Fri, 09 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tse/HsuFG89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/GoodmanVW89,
author = {James R. Goodman and
Mary K. Vernon and
Philip J. Woest},
editor = {Joel S. Emer and
John L. Hennessy},
title = {Efficent Synchronization Primitives for Large-Scale Cache-Coherent
Multiprocessors},
booktitle = {{ASPLOS-III} Proceedings - Third International Conference on Architectural
Support for Programming Languages and Operating Systems, Boston, Massachusetts,
USA, April 3-6, 1989},
pages = {64--75},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/70082.68188},
doi = {10.1145/70082.68188},
timestamp = {Wed, 07 Jul 2021 13:23:09 +0200},
biburl = {https://dblp.org/rec/conf/asplos/GoodmanVW89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/SohiSG89,
author = {Gurindar S. Sohi and
James E. Smith and
James R. Goodman},
editor = {George Paul and
Theodore S. Papatheodorou and
Dennis Gannon and
E. N. Pudue},
title = {Restricted Fetch{\&}Phi operations for parallel processing},
booktitle = {Proceedings of the 3rd international conference on Supercomputing,
{ICS} 1989, Heraklion, Crete, Greece, June 5-9, 1989},
pages = {410--416},
publisher = {{ACM}},
year = {1989},
url = {https://doi.org/10.1145/318789.318872},
doi = {10.1145/318789.318872},
timestamp = {Tue, 29 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ics/SohiSG89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/Goodman88,
author = {James R. Goodman},
title = {Reply to David R. Cheriton's, Pat Boyle's, and Gert A. Slavenburg's
"Comments on 'Coherency for multiprocessor virtual addressed
caches' by James R. Goodman"},
journal = {{SIGARCH} Comput. Archit. News},
volume = {16},
number = {3},
pages = {7},
year = {1988},
url = {https://doi.org/10.1145/48675.642157},
doi = {10.1145/48675.642157},
timestamp = {Fri, 09 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/Goodman88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/GoodmanH88,
author = {James R. Goodman and
Wei{-}Chung Hsu},
editor = {Jacques Lenfant},
title = {Code scheduling and register allocation in large basic blocks},
booktitle = {Proceedings of the 2nd international conference on Supercomputing,
{ICS} 1988, Saint Malo, France, July 4-8, 1988},
pages = {442--452},
publisher = {{ACM}},
year = {1988},
url = {https://doi.org/10.1145/55364.55407},
doi = {10.1145/55364.55407},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/GoodmanH88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GoodmanW88,
author = {James R. Goodman and
Philip J. Woest},
editor = {Howard Jay Siegel},
title = {The Wisconsin Multicube: {A} New Large-Scale Cache-Coherent Multiprocessor},
booktitle = {Proceedings of the 15th Annual International Symposium on Computer
Architecture, Honolulu, Hawaii, USA, May-June 1988},
pages = {422--431},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ISCA.1988.5253},
doi = {10.1109/ISCA.1988.5253},
timestamp = {Thu, 08 Jul 2021 16:04:01 +0200},
biburl = {https://dblp.org/rec/conf/isca/GoodmanW88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/Goodman87,
author = {James R. Goodman},
editor = {Randy H. Katz and
Martin Freeman},
title = {Coherency for Multiprocessor Virtual Address Caches},
booktitle = {Proceedings of the Second International Conference on Architectural
Support for Programming Languages and Operating Systems {(ASPLOS}
II), Palo Alto, California, USA, October 5-8, 1987},
pages = {72--81},
publisher = {{ACM} Press},
year = {1987},
url = {https://doi.org/10.1145/36206.36186},
doi = {10.1145/36206.36186},
timestamp = {Wed, 04 May 2022 13:03:26 +0200},
biburl = {https://dblp.org/rec/conf/asplos/Goodman87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PleszkunGHJBWS87,
author = {Andrew R. Pleszkun and
James R. Goodman and
Wei{-}Chung Hsu and
R. T. Joersz and
George E. Bier and
Philip J. Woest and
P. B. Schechter},
editor = {Daniel C. St. Clair},
title = {{WISQ:} {A} Restartable Architecture Using Queues},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {290--299},
year = {1987},
url = {https://doi.org/10.1145/30350.30383},
doi = {10.1145/30350.30383},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/PleszkunGHJBWS87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GoodmanY86,
author = {James R. Goodman and
Honesty C. Young},
title = {Comments on "A Massive Memory Machine"},
journal = {{IEEE} Trans. Computers},
volume = {35},
number = {10},
pages = {907--910},
year = {1986},
url = {https://doi.org/10.1109/TC.1986.1676682},
doi = {10.1109/TC.1986.1676682},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GoodmanY86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/YoungG86,
author = {Honesty C. Young and
James R. Goodman},
title = {The Design of a Queue-Based Vector Supercomputer},
booktitle = {International Conference on Parallel Processing, ICPP'86, University
Park, PA, USA, August 1986},
pages = {483--486},
publisher = {{IEEE} Computer Society Press},
year = {1986},
timestamp = {Mon, 28 Jul 2014 17:06:02 +0200},
biburl = {https://dblp.org/rec/conf/icpp/YoungG86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GoodmanH86,
author = {James R. Goodman and
Wei{-}Chung Hsu},
editor = {Hideo Aiso},
title = {On the Use of Registers vs. Cache to Minimize Memory Traffic},
booktitle = {Proceedings of the 13th Annual Symposium on Computer Architecture,
Tokyo, Japan, June 1986},
pages = {375--383},
publisher = {{IEEE} Computer Society},
year = {1986},
url = {https://doi.org/10.1145/17356.17400},
doi = {10.1145/17356.17400},
timestamp = {Mon, 12 Jul 2021 17:55:24 +0200},
biburl = {https://dblp.org/rec/conf/isca/GoodmanH86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SmithG85,
author = {James E. Smith and
James R. Goodman},
title = {Instruction Cache Replacement Policies and Organizations},
journal = {{IEEE} Trans. Computers},
volume = {34},
number = {3},
pages = {234--241},
year = {1985},
url = {https://doi.org/10.1109/TC.1985.1676566},
doi = {10.1109/TC.1985.1676566},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/SmithG85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GoodmanHLPSY85,
author = {James R. Goodman and
Jian{-}tu Hsieh and
Koujuch Liou and
Andrew R. Pleszkun and
P. B. Schechter and
Honesty C. Young},
editor = {Thomas F. Gannon and
Tilak Agerwala and
Charles V. Freiman},
title = {{PIPE:} {A} {VLSI} Decoupled Architecture},
booktitle = {Proceedings of the 12th Annual Symposium on Computer Architecture,
Boston, MA, USA, June 1985},
pages = {20--27},
publisher = {{IEEE} Computer Society},
year = {1985},
url = {https://doi.org/10.1145/327070.327117},
doi = {10.1145/327070.327117},
timestamp = {Tue, 31 Aug 2021 17:59:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/GoodmanHLPSY85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GoodmanC84,
author = {James R. Goodman and
MenChow Chiang},
editor = {Dharma P. Agrawal},
title = {The Use of Static Column {RAM} as a Memory Hierarchy},
booktitle = {Proceedings of the 11th Annual Symposium on Computer Architecture,
Ann Arbor, USA, June 1984},
pages = {167--174},
publisher = {{ACM}},
year = {1984},
url = {https://doi.org/10.1145/800015.808179},
doi = {10.1145/800015.808179},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/GoodmanC84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Goodman83,
author = {James R. Goodman},
editor = {Harold W. Lawson Jr. and
Tilak Agerwala and
Hans H. Heilborn and
Hideo Aiso and
Lars{-}Erik Thorelli and
Jean{-}Loup Baer and
Mario Tokoro},
title = {Using Cache Memory to Reduce Processor-Memory Traffic},
booktitle = {Proceedings of the 10th Annual Symposium on Computer Architecture,
1983},
pages = {124--131},
publisher = {{ACM}},
year = {1983},
url = {https://doi.org/10.1145/800046.801647},
doi = {10.1145/800046.801647},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/Goodman83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SmithG83,
author = {James E. Smith and
James R. Goodman},
editor = {Harold W. Lawson Jr. and
Tilak Agerwala and
Hans H. Heilborn and
Hideo Aiso and
Lars{-}Erik Thorelli and
Jean{-}Loup Baer and
Mario Tokoro},
title = {A Study of Instruction Cache Organizations and Replacement Policies},
booktitle = {Proceedings of the 10th Annual Symposium on Computer Architecture,
1983},
pages = {132--137},
publisher = {{ACM}},
year = {1983},
url = {https://doi.org/10.1145/800046.801648},
doi = {10.1145/800046.801648},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/SmithG83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/RavishankarG82,
author = {Chinya V. Ravishankar and
James R. Goodman},
title = {{VLSI} Considerations that Influence Data Flow Architecture},
booktitle = {COMPCON'82, Digest of Papers, Twenty-Fourth {IEEE} Computer Society
International Conference, San Francisco, California, USA, February
22-25, 1982},
pages = {228--232},
publisher = {{IEEE} Computer Society},
year = {1982},
timestamp = {Tue, 20 Jun 2006 14:09:50 +0200},
biburl = {https://dblp.org/rec/conf/compcon/RavishankarG82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GoodmanS81,
author = {James R. Goodman and
Carlo H. S{\'{e}}quin},
title = {Hypertree: {A} Multiprocessor Interconnection Topology},
journal = {{IEEE} Trans. Computers},
volume = {30},
number = {12},
pages = {923--933},
year = {1981},
url = {https://doi.org/10.1109/TC.1981.1675731},
doi = {10.1109/TC.1981.1675731},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GoodmanS81.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RamamoorthyGK72,
author = {Chittoor V. Ramamoorthy and
James R. Goodman and
K. H. Kim},
title = {Some Properties of Iterative Square-Rooting Methods Using High-Speed
Multiplication},
journal = {{IEEE} Trans. Computers},
volume = {21},
number = {8},
pages = {837--847},
year = {1972},
url = {https://doi.org/10.1109/TC.1972.5009039},
doi = {10.1109/TC.1972.5009039},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RamamoorthyGK72.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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