BibTeX records: Mehmet Meric Isgenc

download as .bib file

@article{DBLP:journals/tcad/InciIM22,
  author       = {Ahmet Inci and
                  Mehmet Meric Isgenc and
                  Diana Marculescu},
  title        = {DeepNVM++: Cross-Layer Modeling and Optimization Framework of Nonvolatile
                  Memories for Deep Learning},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {41},
  number       = {10},
  pages        = {3426--3437},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCAD.2021.3127148},
  doi          = {10.1109/TCAD.2021.3127148},
  timestamp    = {Tue, 18 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/InciIM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2206-13601,
  author       = {Ahmet Inci and
                  Mehmet Meric Isgenc and
                  Diana Marculescu},
  title        = {Efficient Deep Learning Using Non-Volatile Memory Technology},
  journal      = {CoRR},
  volume       = {abs/2206.13601},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2206.13601},
  doi          = {10.48550/ARXIV.2206.13601},
  eprinttype    = {arXiv},
  eprint       = {2206.13601},
  timestamp    = {Mon, 04 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2206-13601.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/MartinsPIP20,
  author       = {Mayler G. A. Martins and
                  Samuel N. Pagliarini and
                  Mehmet Meric Isgenc and
                  Lawrence T. Pileggi},
  title        = {From Virtual Characterization to Test-Chips: {DFM} Analysis Through
                  Pattern Enumeration},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {39},
  number       = {2},
  pages        = {520--532},
  year         = {2020},
  url          = {https://doi.org/10.1109/TCAD.2018.2889772},
  doi          = {10.1109/TCAD.2018.2889772},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/MartinsPIP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tnn/PagliariniBIBP20,
  author       = {Samuel N. Pagliarini and
                  Sudipta Bhuin and
                  Mehmet Meric Isgenc and
                  Ayan Kumar Biswas and
                  Lawrence T. Pileggi},
  title        = {A Probabilistic Synapse With Strained MTJs for Spiking Neural Networks},
  journal      = {{IEEE} Trans. Neural Networks Learn. Syst.},
  volume       = {31},
  number       = {4},
  pages        = {1113--1123},
  year         = {2020},
  url          = {https://doi.org/10.1109/TNNLS.2019.2917819},
  doi          = {10.1109/TNNLS.2019.2917819},
  timestamp    = {Sat, 30 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tnn/PagliariniBIBP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/IsgencMZPP20,
  author       = {Mehmet Meric Isgenc and
                  Mayler G. A. Martins and
                  V. Mohammed Zackriya and
                  Samuel N. Pagliarini and
                  Lawrence T. Pileggi},
  title        = {Logic {IP} for Low-Cost {IC} Design in Advanced {CMOS} Nodes},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {28},
  number       = {2},
  pages        = {585--595},
  year         = {2020},
  url          = {https://doi.org/10.1109/TVLSI.2019.2942825},
  doi          = {10.1109/TVLSI.2019.2942825},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/IsgencMZPP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/InciIM20,
  author       = {Ahmet Fatih Inci and
                  Mehmet Meric Isgenc and
                  Diana Marculescu},
  title        = {DeepNVM: {A} Framework for Modeling and Analysis of Non-Volatile Memory
                  Technologies for Deep Learning Applications},
  booktitle    = {2020 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
  pages        = {1295--1298},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.23919/DATE48585.2020.9116263},
  doi          = {10.23919/DATE48585.2020.9116263},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/InciIM20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2012-04559,
  author       = {Ahmet Inci and
                  Mehmet Meric Isgenc and
                  Diana Marculescu},
  title        = {DeepNVM++: Cross-Layer Modeling and Optimization Framework of Non-Volatile
                  Memories for Deep Learning},
  journal      = {CoRR},
  volume       = {abs/2012.04559},
  year         = {2020},
  url          = {https://arxiv.org/abs/2012.04559},
  eprinttype    = {arXiv},
  eprint       = {2012.04559},
  timestamp    = {Wed, 09 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2012-04559.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jhss/KarageorgosIPP19,
  author       = {Ioannis Karageorgos and
                  Mehmet Meric Isgenc and
                  Samuel Pagliarini and
                  Lawrence T. Pileggi},
  title        = {Chip-to-Chip Authentication Method Based on {SRAM} {PUF} and Public
                  Key Cryptography},
  journal      = {J. Hardw. Syst. Secur.},
  volume       = {3},
  number       = {4},
  pages        = {382--396},
  year         = {2019},
  url          = {https://doi.org/10.1007/s41635-019-00080-y},
  doi          = {10.1007/S41635-019-00080-Y},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jhss/KarageorgosIPP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/GobieskiNSIBL19,
  author       = {Graham Gobieski and
                  Amolak Nagi and
                  Nathan Serafin and
                  Mehmet Meric Isgenc and
                  Nathan Beckmann and
                  Brandon Lucia},
  title        = {{MANIC:} {A} Vector-Dataflow Architecture for Ultra-Low-Power Embedded
                  Systems},
  booktitle    = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium
                  on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16,
                  2019},
  pages        = {670--684},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3352460.3358277},
  doi          = {10.1145/3352460.3358277},
  timestamp    = {Wed, 16 Oct 2019 09:55:30 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/GobieskiNSIBL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/PagliariniIMP18,
  author       = {Samuel N. Pagliarini and
                  Mehmet Meric Isgenc and
                  Mayler G. A. Martins and
                  Lawrence T. Pileggi},
  title        = {Application and Product-Volume-Specific Customization of {BEOL} Metal
                  Pitch},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {26},
  number       = {9},
  pages        = {1627--1636},
  year         = {2018},
  url          = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2018.2828387},
  doi          = {10.1109/TVLSI.2018.2828387},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/PagliariniIMP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/IsgencPLP17,
  author       = {Mehmet Meric Isgenc and
                  Samuel Pagliarini and
                  Renzhi Liu and
                  Larry T. Pileggi},
  title        = {Evaluating the benefits of relaxed {BEOL} pitch for deeply scaled
                  ICs},
  booktitle    = {18th International Symposium on Quality Electronic Design, {ISQED}
                  2017, Santa Clara, CA, USA, March 14-15, 2017},
  pages        = {180--185},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISQED.2017.7918313},
  doi          = {10.1109/ISQED.2017.7918313},
  timestamp    = {Sat, 19 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/IsgencPLP17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.