BibTeX records: Daniel A. Jiménez

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@article{DBLP:journals/cal/AlBarakatGJ18,
  author    = {Laith M. AlBarakat and
               Paul V. Gratz and
               Daniel A. Jim{\'{e}}nez},
  title     = {MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors},
  journal   = {Computer Architecture Letters},
  volume    = {17},
  number    = {2},
  pages     = {175--178},
  year      = {2018},
  url       = {https://doi.org/10.1109/LCA.2018.2847345},
  doi       = {10.1109/LCA.2018.2847345},
  timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/cal/AlBarakatGJ18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/TeranCWWJ18,
  author    = {Elvira Teran and
               Zeshan Chishti and
               Zhe Wang and
               Chris Wilkerson and
               Daniel A. Jim{\'{e}}nez},
  title     = {Flexible associativity for {DRAM} caches},
  booktitle = {Proceedings of the 15th {ACM} International Conference on Computing
               Frontiers, {CF} 2018, Ischia, Italy, May 08-10, 2018},
  pages     = {88--96},
  year      = {2018},
  crossref  = {DBLP:conf/cf/2018},
  url       = {https://doi.org/10.1145/3203217.3203283},
  doi       = {10.1145/3203217.3203283},
  timestamp = {Wed, 21 Nov 2018 12:44:06 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cf/TeranCWWJ18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/CristalUMCCBJAS18,
  author    = {Adri{\'{a}}n Cristal and
               Osman S. Unsal and
               Xavier Martorell and
               Paul Carpenter and
               Ra{\'{u}}l de la Cruz and
               Leonardo Bautista{-}Gomez and
               Daniel A. Jim{\'{e}}nez and
               Carlos {\'{A}}lvarez and
               Behzad Salami and
               Sergi Madonar and
               Miquel Peric{\`{a}}s and
               Pedro Trancoso and
               Micha vor dem Berge and
               Gunnar Billung{-}Meyer and
               Stefan Krupop and
               Wolfgang Christmann and
               Frank Klawonn and
               Amani Mihklafi and
               Tobias Becker and
               Georgi Gaydadjiev and
               Hans Salomonsson and
               Devdatt P. Dubhashi and
               Oron Port and
               Yoav Etsion and
               Vesna Nowack and
               Christof Fetzer and
               Jens Hagemeyer and
               Thorsten Jungeblut and
               Nils Kucza and
               Martin Kaiser and
               Mario Porrmann and
               Marcelo Pasin and
               Valerio Schiavoni and
               Isabelly Rocha and
               Christian G{\"{o}}ttel and
               Pascal Felber},
  title     = {LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for
               heterogeneous computing},
  booktitle = {Proceedings of the 15th {ACM} International Conference on Computing
               Frontiers, {CF} 2018, Ischia, Italy, May 08-10, 2018},
  pages     = {276--278},
  year      = {2018},
  crossref  = {DBLP:conf/cf/2018},
  url       = {https://doi.org/10.1145/3203217.3205339},
  doi       = {10.1145/3203217.3205339},
  timestamp = {Wed, 21 Nov 2018 12:44:06 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cf/CristalUMCCBJAS18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AjorpazGJJ18,
  author    = {Samira Mirbagher Ajorpaz and
               Elba Garza and
               Sangam Jindal and
               Daniel A. Jim{\'{e}}nez},
  title     = {Exploring Predictive Replacement Policies for Instruction Cache and
               Branch Target Buffer},
  booktitle = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
               {ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
  pages     = {519--532},
  year      = {2018},
  crossref  = {DBLP:conf/isca/2018},
  url       = {https://doi.org/10.1109/ISCA.2018.00050},
  doi       = {10.1109/ISCA.2018.00050},
  timestamp = {Tue, 11 Sep 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/AjorpazGJJ18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CristalUMCCBJ0018,
  author    = {Adri{\'{a}}n Cristal and
               Osman S. Unsal and
               Xavier Martorell and
               Paul Carpenter and
               Ra{\'{u}}l de la Cruz and
               Leonardo Bautista{-}Gomez and
               Daniel A. Jim{\'{e}}nez and
               Carlos {\'{A}}lvarez and
               Behzad Salami and
               Sergi Madonar and
               Miquel Peric{\`{a}}s and
               Pedro Trancoso and
               Micha vor dem Berge and
               Gunnar Billung{-}Meyer and
               Stefan Krupop and
               Wolfgang Christmann and
               Frank Klawonn and
               Amani Mihklafi and
               Tobias Becker and
               Georgi Gaydadjiev and
               Hans Salomonsson and
               Devdatt P. Dubhashi and
               Oron Port and
               Elad Hadar and
               Yoav Etsion and
               Christof Fetzer and
               Jens Hagemeyer and
               Thorsten Jungeblut and
               Nils Kucza and
               Martin Kaiser and
               Mario Porrmann and
               Marcelo Pasin and
               Valerio Schiavoni and
               Isabelly Rocha and
               Christian G{\"{o}}ttel and
               Pascal Felber},
  title     = {LEGaTO: first steps towards energy-efficient toolset for heterogeneous
               computing},
  booktitle = {Proceedings of the 18th International Conference on Embedded Computer
               Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece,
               July 15-19, 2018.},
  pages     = {210--217},
  year      = {2018},
  crossref  = {DBLP:conf/samos/2018},
  url       = {https://doi.org/10.1145/3229631.3239370},
  doi       = {10.1145/3229631.3239370},
  timestamp = {Tue, 15 Jan 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/samos/CristalUMCCBJ0018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/KimTGJPW17,
  author    = {Jinchun Kim and
               Elvira Teran and
               Paul V. Gratz and
               Daniel A. Jim{\'{e}}nez and
               Seth H. Pugsley and
               Chris Wilkerson},
  title     = {Kill the Program Counter: Reconstructing Program Behavior in the Processor
               Cache Hierarchy},
  booktitle = {Proceedings of the Twenty-Second International Conference on Architectural
               Support for Programming Languages and Operating Systems, {ASPLOS}
               2017, Xi'an, China, April 8-12, 2017},
  pages     = {737--749},
  year      = {2017},
  crossref  = {DBLP:conf/asplos/2017},
  url       = {https://doi.org/10.1145/3037697.3037701},
  doi       = {10.1145/3037697.3037701},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/asplos/KimTGJPW17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JimenezT17,
  author    = {Daniel A. Jim{\'{e}}nez and
               Elvira Teran},
  title     = {Multiperspective reuse prediction},
  booktitle = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
               on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
               2017},
  pages     = {436--448},
  year      = {2017},
  crossref  = {DBLP:conf/micro/2017},
  url       = {https://doi.org/10.1145/3123939.3123942},
  doi       = {10.1145/3123939.3123942},
  timestamp = {Tue, 06 Nov 2018 16:58:26 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/JimenezT17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LiuMACJV16,
  author    = {Qixiao Liu and
               Miquel Moret{\'{o}} and
               Jaume Abella and
               Francisco J. Cazorla and
               Daniel A. Jim{\'{e}}nez and
               Mateo Valero},
  title     = {Sensible Energy Accounting with Abstract Metering for Multicore Systems},
  journal   = {{TACO}},
  volume    = {12},
  number    = {4},
  pages     = {60:1--60:26},
  year      = {2016},
  url       = {https://doi.org/10.1145/2842616},
  doi       = {10.1145/2842616},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/taco/LiuMACJV16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/TeranTWJ16,
  author    = {Elvira Teran and
               Yingying Tian and
               Zhe Wang and
               Daniel A. Jim{\'{e}}nez},
  title     = {Minimal disturbance placement and promotion},
  booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  pages     = {201--211},
  year      = {2016},
  crossref  = {DBLP:conf/hpca/2016},
  url       = {https://doi.org/10.1109/HPCA.2016.7446065},
  doi       = {10.1109/HPCA.2016.7446065},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/TeranTWJ16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/TeranWJ16,
  author    = {Elvira Teran and
               Zhe Wang and
               Daniel A. Jim{\'{e}}nez},
  title     = {Perceptron learning for reuse prediction},
  booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
  pages     = {2:1--2:12},
  year      = {2016},
  crossref  = {DBLP:conf/micro/2016},
  url       = {https://doi.org/10.1109/MICRO.2016.7783705},
  doi       = {10.1109/MICRO.2016.7783705},
  timestamp = {Sat, 10 Mar 2018 14:44:10 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/TeranWJ16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/WangJZLX16,
  author    = {Zhe Wang and
               Daniel A. Jim{\'{e}}nez and
               Tao Zhang and
               Gabriel H. Loh and
               Yuan Xie},
  title     = {Building a Low Latency, Highly Associative {DRAM} Cache with the Buffered
               Way Predictor},
  booktitle = {28th International Symposium on Computer Architecture and High Performance
               Computing, {SBAC-PAD} 2016, Los Angeles, CA, USA, October 26-28, 2016},
  pages     = {109--117},
  year      = {2016},
  crossref  = {DBLP:conf/sbac-pad/2016},
  url       = {https://doi.org/10.1109/SBAC-PAD.2016.22},
  doi       = {10.1109/SBAC-PAD.2016.22},
  timestamp = {Tue, 25 Sep 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/WangJZLX16},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/TianPGBJ15,
  author    = {Yingying Tian and
               Sooraj Puthoor and
               Joseph L. Greathouse and
               Bradford M. Beckmann and
               Daniel A. Jim{\'{e}}nez},
  title     = {Adaptive {GPU} cache bypassing},
  booktitle = {Proceedings of the 8th Workshop on General Purpose Processing using
               GPUs, GPGPU@PPoPP 2015, San Francisco, CA, USA, February 7, 2015},
  pages     = {25--35},
  year      = {2015},
  crossref  = {DBLP:conf/ppopp/2015gpgpu},
  url       = {https://doi.org/10.1145/2716282.2716283},
  doi       = {10.1145/2716282.2716283},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ppopp/TianPGBJ15},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/KimGGJ14,
  author    = {Hyungjun Kim and
               Boris Grot and
               Paul V. Gratz and
               Daniel A. Jim{\'{e}}nez},
  title     = {Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor
               Networks-on-Chip},
  journal   = {{IEEE} Trans. Computers},
  volume    = {63},
  number    = {3},
  pages     = {543--556},
  year      = {2014},
  url       = {https://doi.org/10.1109/TC.2012.238},
  doi       = {10.1109/TC.2012.238},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tc/KimGGJ14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WangJXSX14,
  author    = {Zhe Wang and
               Daniel A. Jim{\'{e}}nez and
               Cong Xu and
               Guangyu Sun and
               Yuan Xie},
  title     = {Adaptive placement and migration policy for an STT-RAM-based hybrid
               cache},
  booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
  pages     = {13--24},
  year      = {2014},
  crossref  = {DBLP:conf/hpca/2014},
  url       = {https://doi.org/10.1109/HPCA.2014.6835933},
  doi       = {10.1109/HPCA.2014.6835933},
  timestamp = {Thu, 07 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/WangJXSX14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KhanAWMJ14,
  author    = {Samira Manabi Khan and
               Alaa R. Alameldeen and
               Chris Wilkerson and
               Onur Mutlu and
               Daniel A. Jim{\'{e}}nez},
  title     = {Improving cache performance using read-write partitioning},
  booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
  pages     = {452--463},
  year      = {2014},
  crossref  = {DBLP:conf/hpca/2014},
  url       = {https://doi.org/10.1109/HPCA.2014.6835954},
  doi       = {10.1109/HPCA.2014.6835954},
  timestamp = {Thu, 07 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/KhanAWMJ14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/TianKJL14,
  author    = {Yingying Tian and
               Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez and
               Gabriel H. Loh},
  title     = {Last-level cache deduplication},
  booktitle = {2014 International Conference on Supercomputing, ICS'14, Muenchen,
               Germany, June 10-13, 2014},
  pages     = {53--62},
  year      = {2014},
  crossref  = {DBLP:conf/ics/2014},
  url       = {https://doi.org/10.1145/2597652.2597655},
  doi       = {10.1145/2597652.2597655},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/TianKJL14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KadjoKSPGJ14,
  author    = {David Kadjo and
               Jinchun Kim and
               Prabal Sharma and
               Reena Panda and
               Paul Gratz and
               Daniel A. Jim{\'{e}}nez},
  title     = {B-Fetch: Branch Prediction Directed Prefetching for Chip-Multiprocessors},
  booktitle = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
  pages     = {623--634},
  year      = {2014},
  crossref  = {DBLP:conf/micro/2014},
  url       = {https://doi.org/10.1109/MICRO.2014.29},
  doi       = {10.1109/MICRO.2014.29},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/KadjoKSPGJ14},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/TianKJ13,
  author    = {Yingying Tian and
               Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez},
  title     = {Temporal-based multilevel correlating inclusive cache replacement},
  journal   = {{TACO}},
  volume    = {10},
  number    = {4},
  pages     = {33:1--33:24},
  year      = {2013},
  url       = {https://doi.org/10.1145/2541228.2555290},
  doi       = {10.1145/2541228.2555290},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/taco/TianKJ13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WangSCGXM0J13,
  author    = {Zhe Wang and
               Shuchang Shan and
               Ting Cao and
               Junli Gu and
               Yi Xu and
               Shuai Mu and
               Yuan Xie and
               Daniel A. Jim{\'{e}}nez},
  title     = {{WADE:} Writeback-aware dynamic cache management for NVM-based main
               memory system},
  journal   = {{TACO}},
  volume    = {10},
  number    = {4},
  pages     = {51:1--51:21},
  year      = {2013},
  url       = {https://doi.org/10.1145/2541228.2555307},
  doi       = {10.1145/2541228.2555307},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/taco/WangSCGXM0J13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KhanAWKJ13,
  author    = {Samira Manabi Khan and
               Alaa R. Alameldeen and
               Chris Wilkerson and
               Jaydeep Kulkarni and
               Daniel A. Jim{\'{e}}nez},
  title     = {Improving multi-core performance using mixed-cell cache architecture},
  booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2013, Shenzhen, China, February 23-27, 2013},
  pages     = {119--130},
  year      = {2013},
  crossref  = {DBLP:conf/hpca/2013},
  url       = {https://doi.org/10.1109/HPCA.2013.6522312},
  doi       = {10.1109/HPCA.2013.6522312},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/KhanAWKJ13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Jimenez13,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Insertion and promotion for tree-based PseudoLRU last-level caches},
  booktitle = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               MICRO-46, Davis, CA, USA, December 7-11, 2013},
  pages     = {284--296},
  year      = {2013},
  crossref  = {DBLP:conf/micro/2013},
  url       = {https://doi.org/10.1145/2540708.2540733},
  doi       = {10.1145/2540708.2540733},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/Jimenez13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PandaGJ12,
  author    = {Reena Panda and
               Paul V. Gratz and
               Daniel A. Jim{\'{e}}nez},
  title     = {B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors},
  journal   = {Computer Architecture Letters},
  volume    = {11},
  number    = {2},
  pages     = {41--44},
  year      = {2012},
  url       = {https://doi.org/10.1109/L-CA.2011.33},
  doi       = {10.1109/L-CA.2011.33},
  timestamp = {Sat, 27 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/cal/PandaGJ12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KhanWJ12,
  author    = {Samira Manabi Khan and
               Zhe Wang and
               Daniel A. Jim{\'{e}}nez},
  title     = {Decoupled dynamic cache segmentation},
  booktitle = {18th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
  pages     = {235--246},
  year      = {2012},
  crossref  = {DBLP:conf/hpca/2012},
  url       = {https://doi.org/10.1109/HPCA.2012.6169030},
  doi       = {10.1109/HPCA.2012.6169030},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/KhanWJ12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WangKJ12,
  author    = {Zhe Wang and
               Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez},
  title     = {Improving writeback efficiency with decoupled last-write prediction},
  booktitle = {39th International Symposium on Computer Architecture {(ISCA} 2012),
               June 9-13, 2012, Portland, OR, {USA}},
  pages     = {309--320},
  year      = {2012},
  crossref  = {DBLP:conf/isca/2012},
  url       = {https://doi.org/10.1109/ISCA.2012.6237027},
  doi       = {10.1109/ISCA.2012.6237027},
  timestamp = {Tue, 12 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isca/WangKJ12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/WangKJ12,
  author    = {Zhe Wang and
               Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez},
  title     = {Rank idle time prediction driven last-level cache writeback},
  booktitle = {Proceedings of the 2012 {ACM} {SIGPLAN} workshop on Memory Systems
               Performance and Correctness: held in conjunction with {PLDI} '12,
               Beijing, China, June 16, 2012},
  pages     = {21--29},
  year      = {2012},
  crossref  = {DBLP:conf/pldi/2012mspc},
  url       = {https://doi.org/10.1145/2247684.2247690},
  doi       = {10.1145/2247684.2247690},
  timestamp = {Wed, 27 Feb 2019 14:10:50 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/pldi/WangKJ12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WangJ11,
  author    = {Zhe Wang and
               Daniel A. Jim{\'{e}}nez},
  title     = {Program Interferometry},
  booktitle = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  pages     = {185--186},
  year      = {2011},
  crossref  = {DBLP:conf/IEEEpact/2011},
  url       = {https://doi.org/10.1109/PACT.2011.32},
  doi       = {10.1109/PACT.2011.32},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/WangJ11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/TianJ11,
  author    = {Yingying Tian and
               Daniel A. Jim{\'{e}}nez},
  title     = {Sampling Temporal Touch Hint {(STTH)} Inclusive Cache Management Policy},
  booktitle = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  pages     = {209},
  year      = {2011},
  crossref  = {DBLP:conf/IEEEpact/2011},
  url       = {https://doi.org/10.1109/PACT.2011.42},
  doi       = {10.1109/PACT.2011.42},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/TianJ11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WangJ11a,
  author    = {Zhe Wang and
               Daniel A. Jim{\'{e}}nez},
  title     = {Exploiting Rank Idle Time for Scheduling Last-Level Cache Writeback},
  booktitle = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  pages     = {210},
  year      = {2011},
  crossref  = {DBLP:conf/IEEEpact/2011},
  url       = {https://doi.org/10.1109/PACT.2011.43},
  doi       = {10.1109/PACT.2011.43},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/WangJ11a},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/KhanJ11,
  author    = {Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez},
  title     = {Decoupled Cache Segmentation: Mutable Policy with Automated Bypass},
  booktitle = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  pages     = {212},
  year      = {2011},
  crossref  = {DBLP:conf/IEEEpact/2011},
  url       = {https://doi.org/10.1109/PACT.2011.45},
  doi       = {10.1109/PACT.2011.45},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/KhanJ11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Jimenez11,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {An optimized scaled neural branch predictor},
  booktitle = {{IEEE} 29th International Conference on Computer Design, {ICCD} 2011,
               Amherst, MA, USA, October 9-12, 2011},
  pages     = {113--118},
  year      = {2011},
  crossref  = {DBLP:conf/iccd/2011},
  url       = {https://doi.org/10.1109/ICCD.2011.6081385},
  doi       = {10.1109/ICCD.2011.6081385},
  timestamp = {Wed, 24 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/Jimenez11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/WangJ11,
  author    = {Zhe Wang and
               Daniel A. Jim{\'{e}}nez},
  title     = {Program Interferometry},
  booktitle = {Proceedings of the 2011 {IEEE} International Symposium on Workload
               Characterization, {IISWC} 2011, Austin, TX, USA, November 6-8, 2011},
  pages     = {172--175},
  year      = {2011},
  crossref  = {DBLP:conf/iiswc/2011},
  url       = {https://doi.org/10.1109/IISWC.2011.6114177},
  doi       = {10.1109/IISWC.2011.6114177},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/WangJ11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/KimGGGJ11,
  author    = {Hyungjun Kim and
               Pritha Ghoshal and
               Boris Grot and
               Paul V. Gratz and
               Daniel A. Jim{\'{e}}nez},
  title     = {Reducing network-on-chip energy consumption through spatial locality
               speculation},
  booktitle = {{NOCS} 2011, Fifth {ACM/IEEE} International Symposium on Networks-on-Chip,
               Pittsburgh, Pennsylvania, USA, May 1-4, 2011},
  pages     = {233--240},
  year      = {2011},
  crossref  = {DBLP:conf/nocs/2011},
  url       = {https://doi.org/10.1145/1999946.1999983},
  doi       = {10.1145/1999946.1999983},
  timestamp = {Tue, 06 Nov 2018 11:06:50 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/nocs/KimGGGJ11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/KhanJBF10,
  author    = {Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez and
               Doug Burger and
               Babak Falsafi},
  title     = {Using dead blocks as a virtual victim cache},
  booktitle = {19th International Conference on Parallel Architecture and Compilation
               Techniques, {PACT} 2010, Vienna, Austria, September 11-15, 2010},
  pages     = {489--500},
  year      = {2010},
  crossref  = {DBLP:conf/IEEEpact/2010},
  url       = {https://doi.org/10.1145/1854273.1854333},
  doi       = {10.1145/1854273.1854333},
  timestamp = {Tue, 06 Nov 2018 11:07:48 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/KhanJBF10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KhanJ10,
  author    = {Samira Manabi Khan and
               Daniel A. Jim{\'{e}}nez},
  title     = {Insertion policy selection using Decision Tree Analysis},
  booktitle = {28th International Conference on Computer Design, {ICCD} 2010, 3-6
               October 2010, Amsterdam, The Netherlands, Proceedings},
  pages     = {106--111},
  year      = {2010},
  crossref  = {DBLP:conf/iccd/2010},
  url       = {https://doi.org/10.1109/ICCD.2010.5647608},
  doi       = {10.1109/ICCD.2010.5647608},
  timestamp = {Mon, 11 Feb 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/KhanJ10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KhanTJ10,
  author    = {Samira Manabi Khan and
               Yingying Tian and
               Daniel A. Jim{\'{e}}nez},
  title     = {Sampling Dead Block Prediction for Last-Level Caches},
  booktitle = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
  pages     = {175--186},
  year      = {2010},
  crossref  = {DBLP:conf/micro/2010},
  url       = {https://doi.org/10.1109/MICRO.2010.24},
  doi       = {10.1109/MICRO.2010.24},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/KhanTJ10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AmantJB09,
  author    = {Ren{\'{e}}e St. Amant and
               Daniel A. Jim{\'{e}}nez and
               Doug Burger},
  title     = {Mixed-Signal Approximate Computation: {A} Neural Predictor Case Study},
  journal   = {{IEEE} Micro},
  volume    = {29},
  number    = {1},
  pages     = {104--115},
  year      = {2009},
  url       = {https://doi.org/10.1109/MM.2009.10},
  doi       = {10.1109/MM.2009.10},
  timestamp = {Sat, 20 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/micro/AmantJB09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/Jimenez09,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Generalizing neural branch prediction},
  journal   = {{TACO}},
  volume    = {5},
  number    = {4},
  pages     = {17:1--17:27},
  year      = {2009},
  url       = {https://doi.org/10.1145/1498690.1498692},
  doi       = {10.1145/1498690.1498692},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/taco/Jimenez09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/HuJK09,
  author    = {Chunling Hu and
               Daniel A. Jim{\'{e}}nez and
               Ulrich Kremer},
  title     = {Combining Edge Vector and Event Counter for Time-Dependent Power Behavior
               Characterization},
  journal   = {Trans. HiPEAC},
  volume    = {2},
  pages     = {85--104},
  year      = {2009},
  crossref  = {DBLP:journals/thipeac/2009-2},
  url       = {https://doi.org/10.1007/978-3-642-00904-4\_6},
  doi       = {10.1007/978-3-642-00904-4\_6},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/HuJK09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/Jimenez09,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Composite Confidence Estimators for Enhanced Speculation Control},
  booktitle = {21st International Symposium on Computer Architecture and High Performance
               Computing, {SBAC-PAD} 2009, Sao Paolo, Brazil, October 28-31, 2009},
  pages     = {161--168},
  year      = {2009},
  crossref  = {DBLP:conf/sbac-pad/2009},
  url       = {https://doi.org/10.1109/SBAC-PAD.2009.17},
  doi       = {10.1109/SBAC-PAD.2009.17},
  timestamp = {Wed, 17 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/Jimenez09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/LohJ08,
  author    = {Gabriel H. Loh and
               Daniel A. Jim{\'{e}}nez},
  title     = {Modulo Path History for the Reduction of Pipeline Overheads in Path-based
               Neural Branch Predictors},
  journal   = {International Journal of Parallel Programming},
  volume    = {36},
  number    = {2},
  pages     = {267--286},
  year      = {2008},
  url       = {https://doi.org/10.1007/s10766-007-0063-0},
  doi       = {10.1007/s10766-007-0063-0},
  timestamp = {Sun, 28 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijpp/LohJ08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PericasCCGVJV08,
  author    = {Miquel Peric{\`{a}}s and
               Adri{\'{a}}n Cristal and
               Francisco J. Cazorla and
               Rub{\'{e}}n Gonz{\'{a}}lez and
               Alexander V. Veidenbaum and
               Daniel A. Jim{\'{e}}nez and
               Mateo Valero},
  title     = {A Two-Level Load/Store Queue Based on Execution Locality},
  booktitle = {35th International Symposium on Computer Architecture {(ISCA} 2008),
               June 21-25, 2008, Beijing, China},
  pages     = {25--36},
  year      = {2008},
  crossref  = {DBLP:conf/isca/2008},
  url       = {https://doi.org/10.1109/ISCA.2008.10},
  doi       = {10.1109/ISCA.2008.10},
  timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/PericasCCGVJV08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/AmantJB08,
  author    = {Ren{\'{e}}e St. Amant and
               Daniel A. Jim{\'{e}}nez and
               Doug Burger},
  title     = {Low-power, high-performance analog neural branch prediction},
  booktitle = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture
               {(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy},
  pages     = {447--458},
  year      = {2008},
  crossref  = {DBLP:conf/micro/2008},
  url       = {https://doi.org/10.1109/MICRO.2008.4771812},
  doi       = {10.1109/MICRO.2008.4771812},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/AmantJB08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/HuJK07,
  author    = {Chunling Hu and
               Daniel A. Jim{\'{e}}nez and
               Ulrich Kremer},
  title     = {An evaluation infrastructure for power and energy optimisations},
  journal   = {{IJES}},
  volume    = {3},
  number    = {1/2},
  pages     = {31--42},
  year      = {2007},
  url       = {https://doi.org/10.1504/IJES.2007.016031},
  doi       = {10.1504/IJES.2007.016031},
  timestamp = {Sat, 06 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/ijes/HuJK07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/Jimenez07,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Guest Editor's Introduction},
  journal   = {J. Instruction-Level Parallelism},
  volume    = {9},
  year      = {2007},
  timestamp = {Fri, 21 Dec 2012 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/jilp/Jimenez07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/PericasCCGJV07,
  author    = {Miquel Peric{\`{a}}s and
               Adri{\'{a}}n Cristal and
               Francisco J. Cazorla and
               Rub{\'{e}}n Gonz{\'{a}}lez and
               Daniel A. Jim{\'{e}}nez and
               Mateo Valero},
  title     = {A Flexible Heterogeneous Multi-Core Architecture},
  booktitle = {16th International Conference on Parallel Architecture and Compilation
               Techniques {(PACT} 2007), Brasov, Romania, September 15-19, 2007},
  pages     = {13--24},
  year      = {2007},
  crossref  = {DBLP:conf/IEEEpact/2007},
  url       = {http://doi.ieeecomputersociety.org/10.1109/PACT.2007.5},
  doi       = {10.1109/PACT.2007.5},
  timestamp = {Thu, 23 Jun 2016 15:53:27 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/PericasCCGJV07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/HuJK07,
  author    = {Chunling Hu and
               Daniel A. Jim{\'{e}}nez and
               Ulrich Kremer},
  title     = {Efficient Program Power Behavior Characterization},
  booktitle = {High Performance Embedded Architectures and Compilers, Second International
               Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings},
  pages     = {183--197},
  year      = {2007},
  crossref  = {DBLP:conf/hipeac/2007},
  url       = {https://doi.org/10.1007/978-3-540-69338-3\_13},
  doi       = {10.1007/978-3-540-69338-3\_13},
  timestamp = {Fri, 02 Jun 2017 13:01:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/HuJK07},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PericasCGJV06,
  author    = {Miquel Peric{\`{a}}s and
               Adri{\'{a}}n Cristal and
               Rub{\'{e}}n Gonz{\'{a}}lez and
               Daniel A. Jim{\'{e}}nez and
               Mateo Valero},
  title     = {A decoupled KILO-instruction processor},
  booktitle = {12th International Symposium on High-Performance Computer Architecture,
               {HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
  pages     = {53--64},
  year      = {2006},
  crossref  = {DBLP:conf/hpca/2006},
  url       = {https://doi.org/10.1109/HPCA.2006.1598112},
  doi       = {10.1109/HPCA.2006.1598112},
  timestamp = {Wed, 20 Jun 2018 17:44:09 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/PericasCGJV06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/JimenezL06,
  author    = {Daniel A. Jim{\'{e}}nez and
               Gabriel H. Loh},
  title     = {Controlling the Power and Area of Neural Branch Predictors for Practical
               Implementation in High-Performance Processors},
  booktitle = {18th Symposium on Computer Architecture and High Performance Computing
               {(SBAC-PAD} 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil},
  pages     = {55--62},
  year      = {2006},
  crossref  = {DBLP:conf/sbac-pad/2006},
  url       = {https://doi.org/10.1109/SBAC-PAD.2006.14},
  doi       = {10.1109/SBAC-PAD.2006.14},
  timestamp = {Wed, 17 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/JimenezL06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/Jimenez05,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Idealized Piecewise Linear Branch Prediction},
  journal   = {J. Instruction-Level Parallelism},
  volume    = {7},
  year      = {2005},
  url       = {http://www.jilp.org/vol7/v7paper9.pdf},
  timestamp = {Fri, 21 Dec 2012 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/jilp/Jimenez05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/HuMJK05,
  author    = {Chunling Hu and
               John B. P. McCabe and
               Daniel A. Jim{\'{e}}nez and
               Ulrich Kremer},
  title     = {The Camino Compiler infrastructure},
  journal   = {{SIGARCH} Computer Architecture News},
  volume    = {33},
  number    = {5},
  pages     = {3--8},
  year      = {2005},
  url       = {https://doi.org/10.1145/1127577.1127580},
  doi       = {10.1145/1127577.1127580},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/sigarch/HuMJK05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/Jimenez05,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Improved latency and accuracy for neural branch prediction},
  journal   = {{ACM} Trans. Comput. Syst.},
  volume    = {23},
  number    = {2},
  pages     = {197--218},
  year      = {2005},
  url       = {https://doi.org/10.1145/1062247.1062250},
  doi       = {10.1145/1062247.1062250},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/tocs/Jimenez05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HuJK05,
  author    = {Chunling Hu and
               Daniel A. Jim{\'{e}}nez and
               Ulrich Kremer},
  title     = {Toward an Evaluation Infrastructure for Power and Energy Optimizations},
  booktitle = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
               2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
               {USA}},
  year      = {2005},
  crossref  = {DBLP:conf/ipps/2005},
  url       = {https://doi.org/10.1109/IPDPS.2005.437},
  doi       = {10.1109/IPDPS.2005.437},
  timestamp = {Wed, 24 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/HuJK05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Jimenez05,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Piecewise Linear Branch Prediction},
  booktitle = {32st International Symposium on Computer Architecture {(ISCA} 2005),
               4-8 June 2005, Madison, Wisconsin, {USA}},
  pages     = {382--393},
  year      = {2005},
  crossref  = {DBLP:conf/isca/2005},
  url       = {https://doi.org/10.1109/ISCA.2005.40},
  doi       = {10.1109/ISCA.2005.40},
  timestamp = {Tue, 23 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/Jimenez05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/PericasCGJV05,
  author    = {Miquel Peric{\`{a}}s and
               Adri{\'{a}}n Cristal and
               Rub{\'{e}}n Gonz{\'{a}}lez and
               Daniel A. Jim{\'{e}}nez and
               Mateo Valero},
  title     = {Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor},
  booktitle = {High-Performance Computing - 6th International Symposium, {ISHPC}
               2005, Nara, Japan, September 7-9, 2005, First International Workshop
               on Advanced Low Power Systems, {ALPS} 2006, Revised Selected Papers},
  pages     = {56--67},
  year      = {2005},
  crossref  = {DBLP:conf/ishpc/2005},
  url       = {https://doi.org/10.1007/978-3-540-77704-5\_5},
  doi       = {10.1007/978-3-540-77704-5\_5},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/PericasCGJV05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/Jimenez05,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Code placement for improving dynamic branch prediction accuracy},
  booktitle = {Proceedings of the {ACM} {SIGPLAN} 2005 Conference on Programming
               Language Design and Implementation, Chicago, IL, USA, June 12-15,
               2005},
  pages     = {107--116},
  year      = {2005},
  crossref  = {DBLP:conf/pldi/2005},
  url       = {https://doi.org/10.1145/1065010.1065025},
  doi       = {10.1145/1065010.1065025},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/pldi/Jimenez05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/PericasCGJ05,
  author    = {Miquel Peric{\`{a}}s and
               Adri{\'{a}}n Cristal and
               Rub{\'{e}}n Gonz{\'{a}}lez and
               Daniel A. Jim{\'{e}}nez},
  title     = {Chained In-Order/Out-of-Order DoubleCore Architecture},
  booktitle = {17th Symposium on Computer Architecture and High Performance Computing
               {(SBAC-PAD} 2005), 24-27 October 2005, Rio de Janeiro, Brazil},
  pages     = {209--217},
  year      = {2005},
  crossref  = {DBLP:conf/sbac-pad/2005},
  url       = {https://doi.org/10.1109/CAHPC.2005.18},
  doi       = {10.1109/CAHPC.2005.18},
  timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/PericasCGJ05},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEinteract/BatchuJ04,
  author    = {Ravi V. Batchu and
               Daniel A. Jim{\'{e}}nez},
  title     = {Exploiting Procedure Level Locality to Reduce Instruction Cache Misses},
  booktitle = {8th Annual Workshop on Interaction between Compilers and Computer
               Architecture {(INTERACT-8} 2004), 15 February 2004, Madrid, Spain},
  pages     = {75--84},
  year      = {2004},
  crossref  = {DBLP:conf/IEEEinteract/2004},
  url       = {https://doi.org/10.1109/INTERA.2004.1299512},
  doi       = {10.1109/INTERA.2004.1299512},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEinteract/BatchuJ04},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Jimenez03,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Reconsidering Complex Branch Predictors},
  booktitle = {Proceedings of the Ninth International Symposium on High-Performance
               Computer Architecture (HPCA'03), Anaheim, California, USA, February
               8-12, 2003},
  pages     = {43--52},
  year      = {2003},
  crossref  = {DBLP:conf/hpca/2003},
  url       = {https://doi.org/10.1109/HPCA.2003.1183523},
  doi       = {10.1109/HPCA.2003.1183523},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/Jimenez03},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Jimenez03,
  author    = {Daniel A. Jim{\'{e}}nez},
  title     = {Fast Path-Based Neural Branch Prediction},
  booktitle = {Proceedings of the 36th Annual International Symposium on Microarchitecture,
               San Diego, CA, USA, December 3-5, 2003},
  pages     = {243--252},
  year      = {2003},
  crossref  = {DBLP:conf/micro/2003},
  url       = {https://doi.org/10.1109/MICRO.2003.1253199},
  doi       = {10.1109/MICRO.2003.1253199},
  timestamp = {Wed, 28 Nov 2018 12:57:16 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/Jimenez03},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/JimenezL02,
  author    = {Daniel A. Jim{\'{e}}nez and
               Calvin Lin},
  title     = {Neural methods for dynamic branch prediction},
  journal   = {{ACM} Trans. Comput. Syst.},
  volume    = {20},
  number    = {4},
  pages     = {369--397},
  year      = {2002},
  url       = {https://doi.org/10.1145/571637.571639},
  doi       = {10.1145/571637.571639},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/journals/tocs/JimenezL02},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/JimenezHL01,
  author    = {Daniel A. Jim{\'{e}}nez and
               Heather L. Hanson and
               Calvin Lin},
  title     = {Boolean Formula-Based Branch Prediction for Future Technologies},
  booktitle = {2001 International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2001), 8-12 September 2001, Barcelona, Spain},
  pages     = {97--106},
  year      = {2001},
  crossref  = {DBLP:conf/IEEEpact/2001},
  url       = {https://doi.org/10.1109/PACT.2001.953291},
  doi       = {10.1109/PACT.2001.953291},
  timestamp = {Mon, 22 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/JimenezHL01},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/JimenezL01,
  author    = {Daniel A. Jim{\'{e}}nez and
               Calvin Lin},
  title     = {Dynamic Branch Prediction with Perceptrons},
  booktitle = {Proceedings of the Seventh International Symposium on High-Performance
               Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24,
               2001},
  pages     = {197--206},
  year      = {2001},
  crossref  = {DBLP:conf/hpca/2001},
  url       = {https://doi.org/10.1109/HPCA.2001.903263},
  doi       = {10.1109/HPCA.2001.903263},
  timestamp = {Fri, 19 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/JimenezL01},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JimenezKL00,
  author    = {Daniel A. Jim{\'{e}}nez and
               Stephen W. Keckler and
               Calvin Lin},
  title     = {The impact of delay on the design of branch predictors},
  booktitle = {Proceedings of the 33rd Annual {IEEE/ACM} International Symposium
               on Microarchitecture, {MICRO} 33, Monterey, California, USA, December
               10-13, 2000},
  pages     = {67--76},
  year      = {2000},
  crossref  = {DBLP:conf/micro/2000},
  url       = {https://doi.org/10.1109/MICRO.2000.898059},
  doi       = {10.1109/MICRO.2000.898059},
  timestamp = {Sun, 21 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/JimenezKL00},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2018,
  editor    = {David R. Kaeli and
               Miquel Peric{\`{a}}s},
  title     = {Proceedings of the 15th {ACM} International Conference on Computing
               Frontiers, {CF} 2018, Ischia, Italy, May 08-10, 2018},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://doi.org/10.1145/3203217},
  doi       = {10.1145/3203217},
  timestamp = {Wed, 21 Nov 2018 12:44:06 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/cf/2018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2018,
  editor    = {Murali Annavaram and
               Timothy M. Pinkston and
               Babak Falsafi},
  title     = {45th {ACM/IEEE} Annual International Symposium on Computer Architecture,
               {ISCA} 2018, Los Angeles, CA, USA, June 1-6, 2018},
  publisher = {{IEEE} Computer Society},
  year      = {2018},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8401306},
  isbn      = {978-1-5386-5984-7},
  timestamp = {Sun, 09 Sep 2018 11:52:43 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2018,
  editor    = {Trevor N. Mudge and
               Dionisios N. Pnevmatikatos},
  title     = {Proceedings of the 18th International Conference on Embedded Computer
               Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece,
               July 15-19, 2018},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://dl.acm.org/citation.cfm?id=3229631},
  isbn      = {978-1-4503-6494-2},
  timestamp = {Mon, 14 Jan 2019 07:39:33 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/samos/2018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2017,
  editor    = {Yunji Chen and
               Olivier Temam and
               John Carter},
  title     = {Proceedings of the Twenty-Second International Conference on Architectural
               Support for Programming Languages and Operating Systems, {ASPLOS}
               2017, Xi'an, China, April 8-12, 2017},
  publisher = {{ACM}},
  year      = {2017},
  url       = {http://dl.acm.org/citation.cfm?id=3037697},
  isbn      = {978-1-4503-4465-4},
  timestamp = {Wed, 05 Apr 2017 09:51:35 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/asplos/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2017,
  editor    = {Hillery C. Hunter and
               Jaime Moreno and
               Joel S. Emer and
               Daniel S{\'{a}}nchez},
  title     = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
               on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
               2017},
  publisher = {{ACM}},
  year      = {2017},
  url       = {https://doi.org/10.1145/3123939},
  doi       = {10.1145/3123939},
  isbn      = {978-1-4503-4952-9},
  timestamp = {Tue, 06 Nov 2018 16:58:26 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2016,
  title     = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7440961},
  isbn      = {978-1-4673-9211-2},
  timestamp = {Fri, 08 Apr 2016 13:41:18 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2016,
  title     = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7777315},
  isbn      = {978-1-5090-3508-3},
  timestamp = {Sat, 10 Mar 2018 14:44:10 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sbac-pad/2016,
  title     = {28th International Symposium on Computer Architecture and High Performance
               Computing, {SBAC-PAD} 2016, Los Angeles, CA, USA, October 26-28, 2016},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7784519},
  isbn      = {978-1-5090-6108-2},
  timestamp = {Sun, 08 Jan 2017 19:42:05 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/2016},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ppopp/2015gpgpu,
  editor    = {David R. Kaeli and
               John Cavazos},
  title     = {Proceedings of the 8th Workshop on General Purpose Processing using
               GPUs, GPGPU@PPoPP 2015, San Francisco, CA, USA, February 7, 2015},
  publisher = {{ACM}},
  year      = {2015},
  url       = {http://dl.acm.org/citation.cfm?id=2716282},
  isbn      = {978-1-4503-3407-5},
  timestamp = {Thu, 29 Jan 2015 08:56:04 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ppopp/2015gpgpu},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2014,
  title     = {20th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6823235},
  isbn      = {978-1-4799-3097-5},
  timestamp = {Tue, 07 Oct 2014 17:26:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2014},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ics/2014,
  editor    = {Arndt Bode and
               Michael Gerndt and
               Per Stenstr{\"{o}}m and
               Lawrence Rauchwerger and
               Barton P. Miller and
               Martin Schulz},
  title     = {2014 International Conference on Supercomputing, ICS'14, Muenchen,
               Germany, June 10-13, 2014},
  publisher = {{ACM}},
  year      = {2014},
  url       = {http://dl.acm.org/citation.cfm?id=2597652},
  isbn      = {978-1-4503-2642-1},
  timestamp = {Mon, 06 Mar 2017 12:14:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/ics/2014},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2014,
  title     = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7008946},
  isbn      = {978-1-4799-6998-2},
  timestamp = {Fri, 23 Dec 2016 12:56:23 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2014},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2013,
  title     = {19th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2013, Shenzhen, China, February 23-27, 2013},
  publisher = {{IEEE} Computer Society},
  year      = {2013},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6518038},
  isbn      = {978-1-4673-5585-8},
  timestamp = {Tue, 07 Oct 2014 17:26:20 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2013,
  editor    = {Matthew K. Farrens and
               Christos Kozyrakis},
  title     = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
               MICRO-46, Davis, CA, USA, December 7-11, 2013},
  publisher = {{ACM}},
  year      = {2013},
  url       = {http://dl.acm.org/citation.cfm?id=2540708},
  isbn      = {978-1-4503-2638-4},
  timestamp = {Tue, 14 Feb 2017 11:55:54 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2013},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2012,
  title     = {18th {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
  publisher = {{IEEE} Computer Society},
  year      = {2012},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6165554},
  isbn      = {978-1-4673-0827-4},
  timestamp = {Tue, 07 Oct 2014 17:26:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2012},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2012,
  title     = {39th International Symposium on Computer Architecture {(ISCA} 2012),
               June 9-13, 2012, Portland, OR, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2012},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6230820},
  isbn      = {978-1-4673-0475-7},
  timestamp = {Thu, 16 Oct 2014 17:35:15 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2012},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/pldi/2012mspc,
  editor    = {Lixin Zhang and
               Onur Mutlu},
  title     = {Proceedings of the 2012 {ACM} {SIGPLAN} workshop on Memory Systems
               Performance and Correctness: held in conjunction with {PLDI} '12,
               Beijing, China, June 16, 2012},
  publisher = {{ACM}},
  year      = {2012},
  url       = {http://dl.acm.org/citation.cfm?id=2247684},
  isbn      = {978-1-4503-1219-6},
  timestamp = {Wed, 27 Feb 2019 14:10:50 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/pldi/2012mspc},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2011,
  editor    = {Lawrence Rauchwerger and
               Vivek Sarkar},
  title     = {2011 International Conference on Parallel Architectures and Compilation
               Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6112806},
  isbn      = {978-1-4577-1794-9},
  timestamp = {Mon, 11 Aug 2014 17:11:12 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccd/2011,
  title     = {{IEEE} 29th International Conference on Computer Design, {ICCD} 2011,
               Amherst, MA, USA, October 9-12, 2011},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6066261},
  isbn      = {978-1-4577-1953-0},
  timestamp = {Mon, 22 Sep 2014 16:50:10 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iiswc/2011,
  title     = {Proceedings of the 2011 {IEEE} International Symposium on Workload
               Characterization, {IISWC} 2011, Austin, TX, USA, November 6-8, 2011},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6107922},
  isbn      = {978-1-4577-2064-2},
  timestamp = {Thu, 27 Aug 2015 18:04:47 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iiswc/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nocs/2011,
  editor    = {Radu Marculescu and
               Michael Kishinevsky and
               Ran Ginosar and
               Karam S. Chatha},
  title     = {{NOCS} 2011, Fifth {ACM/IEEE} International Symposium on Networks-on-Chip,
               Pittsburgh, Pennsylvania, USA, May 1-4, 2011},
  publisher = {{ACM/IEEE} Computer Society},
  year      = {2011},
  url       = {https://doi.org/10.1145/1999946},
  doi       = {10.1145/1999946},
  isbn      = {978-1-4503-0720-8},
  timestamp = {Tue, 06 Nov 2018 11:06:50 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/nocs/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2010,
  editor    = {Valentina Salapura and
               Michael Gschwind and
               Jens Knoop},
  title     = {19th International Conference on Parallel Architecture and Compilation
               Techniques, {PACT} 2010, Vienna, Austria, September 11-15, 2010},
  publisher = {{ACM}},
  year      = {2010},
  url       = {https://doi.org/10.1145/1854273},
  doi       = {10.1145/1854273},
  isbn      = {978-1-4503-0178-7},
  timestamp = {Tue, 06 Nov 2018 11:07:48 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccd/2010,
  title     = {28th International Conference on Computer Design, {ICCD} 2010, 3-6
               October 2010, Amsterdam, The Netherlands, Proceedings},
  publisher = {{IEEE} Computer Society},
  year      = {2010},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5640356},
  isbn      = {978-1-4244-8936-7},
  timestamp = {Mon, 22 Sep 2014 16:50:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iccd/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2010,
  title     = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
               {MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2010},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5692847},
  isbn      = {978-0-7695-4299-7},
  timestamp = {Thu, 18 Sep 2014 16:58:22 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2009-2,
  editor    = {Per Stenstr{\"{o}}m},
  title     = {Transactions on High-Performance Embedded Architectures and Compilers
               {II}},
  series    = {Lecture Notes in Computer Science},
  volume    = {5470},
  publisher = {Springer},
  year      = {2009},
  url       = {https://doi.org/10.1007/978-3-642-00904-4},
  doi       = {10.1007/978-3-642-00904-4},
  isbn      = {978-3-642-00903-7},
  timestamp = {Fri, 26 May 2017 22:52:03 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/thipeac/2009-2},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sbac-pad/2009,
  title     = {21st International Symposium on Computer Architecture and High Performance
               Computing, {SBAC-PAD} 2009, Sao Paolo, Brazil, October 28-31, 2009},
  publisher = {{IEEE} Computer Society},
  year      = {2009},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5336186},
  isbn      = {978-0-7695-3857-0},
  timestamp = {Wed, 22 Apr 2015 16:41:58 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2008,
  title     = {35th International Symposium on Computer Architecture {(ISCA} 2008),
               June 21-25, 2008, Beijing, China},
  publisher = {{IEEE} Computer Society},
  year      = {2008},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4556699},
  isbn      = {978-0-7695-3174-8},
  timestamp = {Thu, 16 Oct 2014 17:35:17 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2008,
  title     = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture
               {(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy},
  publisher = {{IEEE} Computer Society},
  year      = {2008},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4757685},
  isbn      = {978-1-4244-2836-6},
  timestamp = {Thu, 18 Sep 2014 16:58:22 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2007,
  title     = {16th International Conference on Parallel Architecture and Compilation
               Techniques {(PACT} 2007), Brasov, Romania, September 15-19, 2007},
  publisher = {{IEEE} Computer Society},
  year      = {2007},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4336183},
  isbn      = {0-7695-2944-5},
  timestamp = {Thu, 23 Jun 2016 15:53:27 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2007},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hipeac/2007,
  editor    = {Koen De Bosschere and
               David R. Kaeli and
               Per Stenstr{\"{o}}m and
               David B. Whalley and
               Theo Ungerer},
  title     = {High Performance Embedded Architectures and Compilers, Second International
               Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {4367},
  publisher = {Springer},
  year      = {2007},
  url       = {https://doi.org/10.1007/978-3-540-69338-3},
  doi       = {10.1007/978-3-540-69338-3},
  isbn      = {978-3-540-69337-6},
  timestamp = {Fri, 02 Jun 2017 13:01:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hipeac/2007},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2006,
  title     = {12th International Symposium on High-Performance Computer Architecture,
               {HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
  publisher = {{IEEE} Computer Society},
  year      = {2006},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=10647},
  isbn      = {0-7803-9368-6},
  timestamp = {Wed, 20 Jun 2018 17:44:09 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2006},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sbac-pad/2006,
  title     = {18th Symposium on Computer Architecture and High Performance Computing
               {(SBAC-PAD} 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil},
  publisher = {{IEEE} Computer Society},
  year      = {2006},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4032399},
  isbn      = {0-7695-2704-3},
  timestamp = {Wed, 22 Apr 2015 16:41:58 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/2006},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ipps/2005,
  title     = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
               2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
               {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9722},
  isbn      = {0-7695-2312-9},
  timestamp = {Fri, 01 Aug 2014 14:26:13 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ipps/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2005,
  title     = {32st International Symposium on Computer Architecture {(ISCA} 2005),
               4-8 June 2005, Madison, Wisconsin, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9793},
  timestamp = {Thu, 16 Oct 2014 17:35:16 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/isca/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ishpc/2005,
  editor    = {Jes{\'{u}}s Labarta and
               Kazuki Joe and
               Toshinori Sato},
  title     = {High-Performance Computing - 6th International Symposium, {ISHPC}
               2005, Nara, Japan, September 7-9, 2005, First International Workshop
               on Advanced Low Power Systems, {ALPS} 2006, Revised Selected Papers},
  series    = {Lecture Notes in Computer Science},
  volume    = {4759},
  publisher = {Springer},
  year      = {2008},
  url       = {https://doi.org/10.1007/978-3-540-77704-5},
  doi       = {10.1007/978-3-540-77704-5},
  isbn      = {978-3-540-77703-8},
  timestamp = {Sun, 21 May 2017 00:21:56 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ishpc/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/pldi/2005,
  editor    = {Vivek Sarkar and
               Mary W. Hall},
  title     = {Proceedings of the {ACM} {SIGPLAN} 2005 Conference on Programming
               Language Design and Implementation, Chicago, IL, USA, June 12-15,
               2005},
  publisher = {{ACM}},
  year      = {2005},
  isbn      = {1-59593-056-6},
  timestamp = {Wed, 22 Jun 2005 09:32:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/pldi/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sbac-pad/2005,
  title     = {17th Symposium on Computer Architecture and High Performance Computing
               {(SBAC-PAD} 2005), 24-27 October 2005, Rio de Janeiro, Brazil},
  publisher = {{IEEE} Computer Society},
  year      = {2005},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=10613},
  isbn      = {0-7695-2446-X},
  timestamp = {Wed, 22 Apr 2015 16:41:58 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/sbac-pad/2005},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEinteract/2004,
  title     = {8th Annual Workshop on Interaction between Compilers and Computer
               Architecture {(INTERACT-8} 2004), 15 February 2004, Madrid, Spain},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9098},
  isbn      = {0-7695-2061-8},
  timestamp = {Fri, 01 Apr 2016 10:14:07 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEinteract/2004},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2003,
  title     = {Proceedings of the Ninth International Symposium on High-Performance
               Computer Architecture (HPCA'03), Anaheim, California, USA, February
               8-12, 2003},
  publisher = {{IEEE} Computer Society},
  year      = {2003},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8433},
  isbn      = {0-7695-1871-0},
  timestamp = {Tue, 07 Oct 2014 17:26:19 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2003},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2003,
  title     = {Proceedings of the 36th Annual International Symposium on Microarchitecture,
               San Diego, CA, USA, December 3-5, 2003},
  publisher = {{IEEE} Computer Society},
  year      = {2003},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8876},
  isbn      = {0-7695-2043-X},
  timestamp = {Wed, 28 Nov 2018 12:57:16 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2003},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2001,
  title     = {2001 International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2001), 8-12 September 2001, Barcelona, Spain},
  publisher = {{IEEE} Computer Society},
  year      = {2001},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7564},
  isbn      = {0-7695-1363-8},
  timestamp = {Mon, 11 Aug 2014 17:11:11 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/IEEEpact/2001},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2001,
  title     = {Proceedings of the Seventh International Symposium on High-Performance
               Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24,
               2001},
  publisher = {{IEEE} Computer Society},
  year      = {2001},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7240},
  isbn      = {0-7695-1019-1},
  timestamp = {Tue, 07 Oct 2014 17:26:20 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/hpca/2001},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2000,
  editor    = {Andrew Wolfe and
               Michael S. Schlansker},
  title     = {Proceedings of the 33rd Annual {IEEE/ACM} International Symposium
               on Microarchitecture, {MICRO} 33, Monterey, California, USA, December
               10-13, 2000},
  publisher = {{ACM/IEEE} Computer Society},
  year      = {2000},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7216},
  isbn      = {0-7695-0924-x},
  timestamp = {Thu, 18 Sep 2014 16:58:21 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/micro/2000},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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