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ORCIDBibTeX records: Vinay B. Y. Kumar
@article{DBLP:journals/esticas/YangBKCDDVMC22,
author = {Simei Yang and
Debjyoti Bhattacharjee and
Vinay B. Y. Kumar and
Saikat Chatterjee and
Sayandip De and
Peter Debacker and
Diederik Verkest and
Arindam Mallik and
Francky Catthoor},
title = {{AERO:} Design Space Exploration Framework for Resource-Constrained
{CNN} Mapping on Tile-Based Accelerators},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {12},
number = {2},
pages = {508--521},
year = {2022},
url = {https://doi.org/10.1109/JETCAS.2022.3171826},
doi = {10.1109/JETCAS.2022.3171826},
timestamp = {Tue, 28 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/YangBKCDDVMC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BaksiBBCK21,
author = {Anubhab Baksi and
Shivam Bhasin and
Jakub Breier and
Anupam Chattopadhyay and
Vinay B. Y. Kumar},
title = {Feeding Three Birds With One Scone: {A} Generic Duplication Based
Countermeasure To Fault Attacks},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {561--564},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474072},
doi = {10.23919/DATE51398.2021.9474072},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BaksiBBCK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jhss/KumarDGBHCM20,
author = {Vinay B. Y. Kumar and
Suman Deb and
Naina Gupta and
Shivam Bhasin and
Jawad Haj{-}Yahya and
Anupam Chattopadhyay and
Avi Mendelson},
title = {Towards Designing a Secure {RISC-V} System-on-Chip: {ITUS}},
journal = {J. Hardw. Syst. Secur.},
volume = {4},
number = {4},
pages = {329--342},
year = {2020},
url = {https://doi.org/10.1007/s41635-020-00108-8},
doi = {10.1007/S41635-020-00108-8},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jhss/KumarDGBHCM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acisp/BaksiKKBSC20,
author = {Anubhab Baksi and
Vinay B. Y. Kumar and
Banashri Karmakar and
Shivam Bhasin and
Dhiman Saha and
Anupam Chattopadhyay},
editor = {Joseph K. Liu and
Hui Cui},
title = {A Novel Duplication Based Countermeasure to Statistical Ineffective
Fault Analysis},
booktitle = {Information Security and Privacy - 25th Australasian Conference, {ACISP}
2020, Perth, WA, Australia, November 30 - December 2, 2020, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12248},
pages = {525--542},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-55304-3\_27},
doi = {10.1007/978-3-030-55304-3\_27},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acisp/BaksiKKBSC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Kumar0CKKN20,
author = {Vinay B. Y. Kumar and
Naina Gupta and
Anupam Chattopadhyay and
Michael Kasper and
Christoph Krau{\ss} and
Ruben Niederhagen},
title = {Post-Quantum Secure Boot},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {1582--1585},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116252},
doi = {10.23919/DATE48585.2020.9116252},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Kumar0CKKN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/BhasinCCKMPT20,
author = {Shivam Bhasin and
Trevor E. Carlson and
Anupam Chattopadhyay and
Vinay B. Y. Kumar and
Avi Mendelson and
Romain Poussier and
Yaswanth Tavva},
title = {Secure Your SoC: Building System-an-Chip Designs for Security},
booktitle = {33rd {IEEE} International System-on-Chip Conference, SoCC 2020, Las
Vegas, NV, USA, September 8-11, 2020},
pages = {248--253},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/SOCC49529.2020.9524760},
doi = {10.1109/SOCC49529.2020.9524760},
timestamp = {Tue, 14 Sep 2021 10:14:37 +0200},
biburl = {https://dblp.org/rec/conf/socc/BhasinCCKMPT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/BaksiKKBSC20,
author = {Anubhab Baksi and
Vinay B. Y. Kumar and
Banashri Karmakar and
Shivam Bhasin and
Dhiman Saha and
Anupam Chattopadhyay},
title = {A Novel Duplication Based Countermeasure To Statistical Ineffective
Fault Analysis},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1268},
year = {2020},
url = {https://eprint.iacr.org/2020/1268},
timestamp = {Fri, 30 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iacr/BaksiKKBSC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/BaksiBBCK20,
author = {Anubhab Baksi and
Shivam Bhasin and
Jakub Breier and
Anupam Chattopadhyay and
Vinay B. Y. Kumar},
title = {Feeding Three Birds With One Scone: {A} Generic Duplication Based
Countermeasure To Fault Attacks (Extended Version)},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1542},
year = {2020},
url = {https://eprint.iacr.org/2020/1542},
timestamp = {Mon, 04 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iacr/BaksiBBCK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/KumarDKKCM19,
author = {Vinay B. Y. Kumar and
Suman Deb and
Rupesh Kumar and
Mustafa Khairallah and
Anupam Chattopadhyay and
Avi Mendelson},
title = {Recruiting Fault Tolerance Techniques for Microprocessor Security},
booktitle = {28th {IEEE} Asian Test Symposium, {ATS} 2019, Kolkata, India, December
10-13, 2019},
pages = {80--85},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ATS47505.2019.00015},
doi = {10.1109/ATS47505.2019.00015},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/KumarDKKCM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/KumarCHM19,
author = {Vinay B. Y. Kumar and
Anupam Chattopadhyay and
Jawad Haj{-}Yahya and
Avi Mendelson},
title = {{ITUS:} {A} Secure {RISC-V} System-on-Chip},
booktitle = {32nd {IEEE} International System-on-Chip Conference, {SOCC} 2019,
Singapore, September 3-6, 2019},
pages = {418--423},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SOCC46988.2019.1570564307},
doi = {10.1109/SOCC46988.2019.1570564307},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/KumarCHM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarSDP18,
author = {Vinay B. Y. Kumar and
Deval Shah and
Mandar Datar and
Sachin B. Patkar},
title = {Lightweight Forth Programmable NoCs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {368--373},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.92},
doi = {10.1109/VLSID.2018.92},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarSDP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarDDPNP16,
author = {Vinay B. Y. Kumar and
Kulshreshth Dhiman and
Mandar Datar and
Akash Pacharne and
H. Narayanan and
Sachin B. Patkar},
title = {Relaxation Based Circuit Simulation Acceleration over {CPU-FPGA}},
booktitle = {29th International Conference on {VLSI} Design and 15th International
Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January
4-8, 2016},
pages = {409--414},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VLSID.2016.84},
doi = {10.1109/VLSID.2016.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarDDPNP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DashBKTP15,
author = {Satyabrata Dash and
Vivek Bangera and
Vinay B. Y. Kumar and
Gaurav Trivedi and
Sachin B. Patkar},
title = {Parallel two step random walk algorithm to analyze {VLSI} power grid
networks},
booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
Ahmedabad, India, June 26-29, 2015},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVDAT.2015.7208101},
doi = {10.1109/ISVDAT.2015.7208101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/DashBKTP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/KumarEDTADP15,
author = {Vinay B. Y. Kumar and
Pinalkumar Engineer and
Mandar Datar and
Yatish Turakhia and
Saurabh Agarwal and
Sanket Diwale and
Sachin B. Patkar},
title = {Framework for Application Mapping over Packet-Switched Network of
FPGAs: Case Studies},
journal = {CoRR},
volume = {abs/1508.06823},
year = {2015},
url = {http://arxiv.org/abs/1508.06823},
eprinttype = {arXiv},
eprint = {1508.06823},
timestamp = {Fri, 25 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/KumarEDTADP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KumarMP14,
author = {Vinay B. Y. Kumar and
Shovan Maity and
Sachin B. Patkar},
title = {Storage-allocation to sequential structures in High-Level Synthesis-assisted
prototyping},
booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
Seoul, South Korea, October 19-22, 2014},
pages = {464--469},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICCD.2014.6974720},
doi = {10.1109/ICCD.2014.6974720},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KumarMP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/KumarKP14,
author = {Vivek Kumar and
Vinay B. Y. Kumar and
Sachin B. Patkar},
title = {FPGA-based implementation of {M4RM} for matrix multiplication over
{GF(2)}},
booktitle = {18th International Symposium on {VLSI} Design and Test, {VDAT} 2014,
Coimbatore, India, July 16-18, 2014},
pages = {1--2},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISVDAT.2014.6881072},
doi = {10.1109/ISVDAT.2014.6881072},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/KumarKP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/PorwalDKP14,
author = {Janak Porwal and
Sanket Diwale and
Vinay B. Y. Kumar and
Sachin B. Patkar},
title = {Projective Geometry and precedence constraint based application mapping
on multicore network-on-chip systems},
booktitle = {Technical Papers of 2014 International Symposium on {VLSI} Design,
Automation and Test, {VLSI-DAT} 2014, Hsinchu, Taiwan, April 28-30,
2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSI-DAT.2014.6834911},
doi = {10.1109/VLSI-DAT.2014.6834911},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi-dat/PorwalDKP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/peccs/SaxenaKSNP13,
author = {Prateek Saxena and
Vinay B. Y. Kumar and
Dilawar Singh and
H. Narayanan and
Sachin B. Patkar},
editor = {C{\'{e}}sar Benavente{-}Peces and
Joaquim Filipe},
title = {Hardware-software Scalable Architectures for Gaussian Elimination
over {GF(2)} and Higher Galois Fields},
booktitle = {{PECCS} 2013 - Proceedings of the 3rd International Conference on
Pervasive Embedded Computing and Communication Systems, Barcelona,
Spain, 19-21 February, 2013},
pages = {195--201},
publisher = {SciTePress},
year = {2013},
timestamp = {Sun, 14 Jul 2013 12:16:13 +0200},
biburl = {https://dblp.org/rec/conf/peccs/SaxenaKSNP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/KumarJPN10,
author = {Vinay B. Y. Kumar and
Siddharth Joshi and
Sachin B. Patkar and
H. Narayanan},
title = {{FPGA} Based High Performance Double-Precision Matrix Multiplication},
journal = {Int. J. Parallel Program.},
volume = {38},
number = {3-4},
pages = {322--338},
year = {2010},
url = {https://doi.org/10.1007/s10766-010-0131-8},
doi = {10.1007/S10766-010-0131-8},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijpp/KumarJPN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarJPN09,
author = {Vinay B. Y. Kumar and
Siddharth Joshi and
Sachin B. Patkar and
H. Narayanan},
title = {{FPGA} Based High Performance Double-Precision Matrix Multiplication},
booktitle = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction,
The 22nd International Conference on {VLSI} Design, New Delhi, India,
5-9 January 2009},
pages = {341--346},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VLSI.Design.2009.13},
doi = {10.1109/VLSI.DESIGN.2009.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarJPN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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