BibTeX records: Rainer Leupers

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@article{DBLP:journals/corr/abs-2401-07671,
  author       = {Rebecca Pelke and
                  Jos{\'{e}} Cubero{-}Cascante and
                  Nils Bosbach and
                  Felix Staudigl and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  title        = {{CLSA-CIM:} {A} Cross-Layer Scheduling Approach for Computing-in-Memory
                  Architectures},
  journal      = {CoRR},
  volume       = {abs/2401.07671},
  year         = {2024},
  url          = {https://doi.org/10.48550/arXiv.2401.07671},
  doi          = {10.48550/ARXIV.2401.07671},
  eprinttype    = {arXiv},
  eprint       = {2401.07671},
  timestamp    = {Thu, 01 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2401-07671.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2401-17819,
  author       = {Lennart M. Reimann and
                  Anschul Prashar and
                  Chiara Ghinami and
                  Rebecca Pelke and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware
                  Hardware Design on {RTL}},
  journal      = {CoRR},
  volume       = {abs/2401.17819},
  year         = {2024},
  url          = {https://doi.org/10.48550/arXiv.2401.17819},
  doi          = {10.48550/ARXIV.2401.17819},
  eprinttype    = {arXiv},
  eprint       = {2401.17819},
  timestamp    = {Wed, 07 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2401-17819.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SharmaJPPLNM23,
  author       = {Niraj N. Sharma and
                  Riya Jain and
                  Mohana Madhumita Pokkuluri and
                  Sachin B. Patkar and
                  Rainer Leupers and
                  Rishiyur S. Nikhil and
                  Farhad Merchant},
  title        = {{CLARINET:} {A} quire-enabled RISC-V-based framework for posit arithmetic
                  empiricism},
  journal      = {J. Syst. Archit.},
  volume       = {135},
  pages        = {102801},
  year         = {2023},
  url          = {https://doi.org/10.1016/j.sysarc.2022.102801},
  doi          = {10.1016/J.SYSARC.2022.102801},
  timestamp    = {Tue, 28 Mar 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SharmaJPPLNM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codesisss/BosbachPZJWL23,
  author       = {Nils Bosbach and
                  Rebecca Pelke and
                  Niko Zurstra{\ss}en and
                  Lukas J{\"{u}}nger and
                  Jan Henrik Weinstock and
                  Rainer Leupers},
  title        = {Work-in-Progress: {A} Generic Non-Intrusive Parallelization Approach
                  for SystemC TlM-2.0-Based Virtual Platforms},
  booktitle    = {International Conference on Hardware/Software Codesign and System
                  Synthesis, {CODES+ISSS} 2023, Hamburg, Germany, September 17-22, 2023},
  pages        = {42--43},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://ieeexplore.ieee.org/document/10317849},
  timestamp    = {Tue, 05 Dec 2023 20:47:36 +0100},
  biburl       = {https://dblp.org/rec/conf/codesisss/BosbachPZJWL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codesisss/StaudiglHZIPSWSJL23,
  author       = {Felix Staudigl and
                  Mohammed Hossein and
                  Tobias Ziegler and
                  Hazem Al Indari and
                  Rebecca Pelke and
                  Sebastian Siegel and
                  Dirk J. Wouters and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Rainer Leupers},
  title        = {Work-in-Progress: {A} Universal Instrumentation Platform for Non-Volatile
                  Memories},
  booktitle    = {International Conference on Hardware/Software Codesign and System
                  Synthesis, {CODES+ISSS} 2023, Hamburg, Germany, September 17-22, 2023},
  pages        = {44--45},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1145/3607888.3608608},
  doi          = {10.1145/3607888.3608608},
  timestamp    = {Fri, 26 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/codesisss/StaudiglHZIPSWSJL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/StaudiglFPSJPL23,
  author       = {Felix Staudigl and
                  Thorben Fetz and
                  Rebecca Pelke and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Let{\'{\i}}cia Maria Bolzani P{\"{o}}hls and
                  Rainer Leupers},
  title        = {Fault Injection in Native Logic-in-Memory Computation on Neuromorphic
                  Hardware},
  booktitle    = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
                  CA, USA, July 9-13, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/DAC56929.2023.10247742},
  doi          = {10.1109/DAC56929.2023.10247742},
  timestamp    = {Sun, 24 Sep 2023 13:31:06 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/StaudiglFPSJPL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ThieuGVRRFMSBWSSWRLBKJBJBBKSBKBS23,
  author       = {Gia Bao Thieu and
                  Sven Gesper and
                  Guillermo Pay{\'{a}} Vay{\'{a}} and
                  Christoph Riggers and
                  Oliver Renke and
                  Till Fiedler and
                  Jakob Marten and
                  Tobias Stuckenberg and
                  Holger Blume and
                  Christian Weis and
                  Lukas Steiner and
                  Chirag Sudarshan and
                  Norbert Wehn and
                  Lennart M. Reimann and
                  Rainer Leupers and
                  Michael Beyer and
                  Daniel K{\"{o}}hler and
                  Alisa Jauch and
                  Jan Micha Borrmann and
                  Setareh Jaberansari and
                  Tim Berthold and
                  Meinolf Blawat and
                  Markus Kock and
                  Gregor Schewior and
                  Jens Benndorf and
                  Frederik Kautz and
                  Hans{-}Martin Bl{\"{u}}thgen and
                  Christian Sauer},
  title        = {ZuSE Ki-Avf: Application-Specific {AI} Processor for Intelligent Sensor
                  Signal Processing in Autonomous Driving},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/DATE56975.2023.10136978},
  doi          = {10.23919/DATE56975.2023.10136978},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ThieuGVRRFMSBWSSWRLBKJBJBBKSBKBS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZurstrassenCJYXL23,
  author       = {Niko Zurstra{\ss}en and
                  Jos{\'{e}} Cubero{-}Cascante and
                  Jan Moritz Joseph and
                  Li Yichao and
                  Xinghua Xie and
                  Rainer Leupers},
  title        = {par-gem5: Parallelizing gem5's Atomic Mode},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/DATE56975.2023.10137178},
  doi          = {10.23919/DATE56975.2023.10137178},
  timestamp    = {Sun, 17 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ZurstrassenCJYXL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/Bosbach0PZL23,
  author       = {Nils Bosbach and
                  Lukas J{\"{u}}nger and
                  Rebecca Pelke and
                  Niko Zurstra{\ss}en and
                  Rainer Leupers},
  title        = {Entropy-Based Analysis of Benchmarks for Instruction Set Simulators},
  booktitle    = {Proceedings of the DroneSE and {RAPIDO:} System Engineering for constrained
                  embedded systems, {RAPIDO} 2023, Toulouse, France, January 17-18,
                  2023},
  pages        = {54--59},
  publisher    = {{ACM}},
  year         = {2023},
  url          = {https://doi.org/10.1145/3579170.3579267},
  doi          = {10.1145/3579170.3579267},
  timestamp    = {Sat, 29 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hipeac/Bosbach0PZL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ZurstrassenBJ0W23,
  author       = {Niko Zurstra{\ss}en and
                  Nils Bosbach and
                  Jan Moritz Joseph and
                  Lukas J{\"{u}}nger and
                  Jan Henrik Weinstock and
                  Rainer Leupers},
  title        = {Efficient RISC-V-on-x64 Floating Point Simulation},
  booktitle    = {41st {IEEE} International Conference on Computer Design, {ICCD} 2023,
                  Washington, DC, USA, November 6-8, 2023},
  pages        = {558--565},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ICCD58817.2023.00090},
  doi          = {10.1109/ICCD58817.2023.00090},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/ZurstrassenBJ0W23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icons2/GaliciaOOL23,
  author       = {Melvin Estuardo Galicia and
                  Ibrahim Jimale Osman and
                  Christian Owusu{-}Afriyie and
                  Rainer Leupers},
  editor       = {Catherine D. Schuman and
                  Melika Payvand and
                  Maryam Parsa},
  title        = {"S3cure": Scramble, Shuffle and Shambles - Secure Deployment
                  of Weight Matrices in Memristor Crossbar Arrays},
  booktitle    = {Proceedings of the 2023 International Conference on Neuromorphic Systems,
                  {ICONS} 2023, Santa Fe, NM, USA, August 1-3, 2023},
  pages        = {41:1--41:8},
  publisher    = {{ACM}},
  year         = {2023},
  url          = {https://doi.org/10.1145/3589737.3605964},
  doi          = {10.1145/3589737.3605964},
  timestamp    = {Thu, 14 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icons2/GaliciaOOL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/ReimannESL23,
  author       = {Lennart M. Reimann and
                  Sarp Erd{\"{o}}nmez and
                  Dominik Sisejkovic and
                  Rainer Leupers},
  title        = {Quantitative Information Flow for Hardware: Advancing the Attack Landscape},
  booktitle    = {14th {IEEE} Latin America Symposium on Circuits and System, {LASCAS}
                  2023, Quito, Ecuador, February 28 - March 3, 2023},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/LASCAS56464.2023.10108235},
  doi          = {10.1109/LASCAS56464.2023.10108235},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/lascas/ReimannESL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/StaudiglFPSJPL23,
  author       = {Felix Staudigl and
                  Thorben Fetz and
                  Rebecca Pelke and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Let{\'{\i}}cia Maria Veiras Bolzani Poehls and
                  Rainer Leupers},
  title        = {Invited Paper: {A} Holistic Fault Injection Platform for Neuromorphic
                  Hardware},
  booktitle    = {24th {IEEE} Latin American Test Symposium, {LATS} 2023, Veracruz,
                  Mexico, March 21-24, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/LATS58125.2023.10154482},
  doi          = {10.1109/LATS58125.2023.10154482},
  timestamp    = {Wed, 28 Jun 2023 16:25:05 +0200},
  biburl       = {https://dblp.org/rec/conf/latw/StaudiglFPSJPL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SinghMBPWLRPMM23,
  author       = {Simranjeet Singh and
                  Elmira Moussavi and
                  Christopher Bengel and
                  Sachin B. Patkar and
                  Rainer Waser and
                  Rainer Leupers and
                  Vikas Rana and
                  Vivek Pachauri and
                  Stephan Menzel and
                  Farhad Merchant},
  editor       = {Ronald Tetzlaff and
                  Fernando Corinto and
                  Neil Kemp and
                  Alon Ascoli and
                  Andreas M{\"{o}}gel and
                  Meng{-}Fan Marvin Chang and
                  Joseph S. Friedman and
                  Siting Liu and
                  John Paul Strachan and
                  Stephan Menzel and
                  Mehdi B. Tahoori and
                  Martin Ziegler and
                  Jason Eshraghian and
                  Ioannis Messaris and
                  Christian Koitzsch and
                  Thomas Mikolajick and
                  Vasileios G. Ntinas},
  title        = {Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS
                  Technologies},
  booktitle    = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
                  Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
                  2023},
  pages        = {30:1--30:7},
  publisher    = {{ACM}},
  year         = {2023},
  url          = {https://doi.org/10.1145/3611315.3633268},
  doi          = {10.1145/3611315.3633268},
  timestamp    = {Sat, 10 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/nanoarch/SinghMBPWLRPMM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/GaliciaHBL23,
  author       = {Melvin Galicia and
                  Leon Happek and
                  Magnus Balzer and
                  Rainer Leupers},
  title        = {Frequency and noise characterization for baseband signal processing
                  on neuromorphic circuits},
  booktitle    = {21st {IEEE} Interregional {NEWCAS} Conference, {NEWCAS} 2023, Edinburgh,
                  United Kingdom, June 26-28, 2023},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/NEWCAS57931.2023.10198095},
  doi          = {10.1109/NEWCAS57931.2023.10198095},
  timestamp    = {Tue, 15 Aug 2023 11:43:59 +0200},
  biburl       = {https://dblp.org/rec/conf/newcas/GaliciaHBL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/MoussaviSSKKILPM23,
  author       = {Elmira Moussavi and
                  Animesh Singh and
                  Dominik Sisejkovic and
                  Aravind Padma Kumar and
                  Daniyar Kizatov and
                  Sven Ingebrandt and
                  Rainer Leupers and
                  Vivek Pachauri and
                  Farhad Merchant},
  title        = {Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage
                  Defined Logic},
  booktitle    = {21st {IEEE} Interregional {NEWCAS} Conference, {NEWCAS} 2023, Edinburgh,
                  United Kingdom, June 26-28, 2023},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/NEWCAS57931.2023.10198032},
  doi          = {10.1109/NEWCAS57931.2023.10198032},
  timestamp    = {Tue, 15 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/newcas/MoussaviSSKKILPM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/ReimannSL23,
  author       = {Lennart M. Reimann and
                  Felix Staudigl and
                  Rainer Leupers},
  title        = {Automated Information Flow Analysis for Integrated Computing-in-Memory
                  Modules},
  booktitle    = {21st {IEEE} Interregional {NEWCAS} Conference, {NEWCAS} 2023, Edinburgh,
                  United Kingdom, June 26-28, 2023},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/NEWCAS57931.2023.10198075},
  doi          = {10.1109/NEWCAS57931.2023.10198075},
  timestamp    = {Tue, 15 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/newcas/ReimannSL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CuberoCascanteZNLJ23,
  author       = {Jos{\'{e}} Cubero{-}Cascante and
                  Niko Zurstra{\ss}en and
                  J{\"{o}}rn N{\"{o}}ller and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  editor       = {Cristina Silvano and
                  Christian Pilato and
                  Marc Reichenbach},
  title        = {parti-gem5: gem5's Timing Mode Parallelised},
  booktitle    = {Embedded Computer Systems: Architectures, Modeling, and Simulation
                  - 23rd International Conference, {SAMOS} 2023, Samos, Greece, July
                  2-6, 2023, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {14385},
  pages        = {177--192},
  publisher    = {Springer},
  year         = {2023},
  url          = {https://doi.org/10.1007/978-3-031-46077-7\_12},
  doi          = {10.1007/978-3-031-46077-7\_12},
  timestamp    = {Sun, 10 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/samos/CuberoCascanteZNLJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PelkeBCSLJ23,
  author       = {Rebecca Pelke and
                  Nils Bosbach and
                  Jos{\'{e}} Cubero{-}Cascante and
                  Felix Staudigl and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  title        = {Mapping of CNNs on multi-core RRAM-based {CIM} architectures},
  booktitle    = {31st {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2023, Dubai, United Arab Emirates, October 16-18, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/VLSI-SoC57769.2023.10321873},
  doi          = {10.1109/VLSI-SOC57769.2023.10321873},
  timestamp    = {Wed, 06 Dec 2023 13:14:06 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi/PelkeBCSLJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ReimannWSML23,
  author       = {Lennart M. Reimann and
                  Jonathan Wiesner and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {SoftFlow: Automated {HW-SW} Confidentiality Verification for Embedded
                  Processors},
  booktitle    = {31st {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2023, Dubai, United Arab Emirates, October 16-18, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/VLSI-SoC57769.2023.10321922},
  doi          = {10.1109/VLSI-SOC57769.2023.10321922},
  timestamp    = {Wed, 06 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi/ReimannWSML23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2302-07655,
  author       = {Felix Staudigl and
                  Thorben Fetz and
                  Rebecca Pelke and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Leticia Bolzani Poehls and
                  Rainer Leupers},
  title        = {Fault Injection in Native Logic-in-Memory Computation on Neuromorphic
                  Hardware},
  journal      = {CoRR},
  volume       = {abs/2302.07655},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2302.07655},
  doi          = {10.48550/ARXIV.2302.07655},
  eprinttype    = {arXiv},
  eprint       = {2302.07655},
  timestamp    = {Mon, 20 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2302-07655.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2304-05682,
  author       = {Lennart M. Reimann and
                  Felix Staudigl and
                  Rainer Leupers},
  title        = {Automated Information Flow Analysis for Integrated Computing-in-Memory
                  Modules},
  journal      = {CoRR},
  volume       = {abs/2304.05682},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2304.05682},
  doi          = {10.48550/ARXIV.2304.05682},
  eprinttype    = {arXiv},
  eprint       = {2304.05682},
  timestamp    = {Wed, 19 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2304-05682.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2304-05686,
  author       = {Elmira Moussavi and
                  Animesh Singh and
                  Dominik Sisejkovic and
                  Aravind Padma Kumar and
                  Daniyar Kizatov and
                  Sven Ingebrandt and
                  Rainer Leupers and
                  Vivek Pachauri and
                  Farhad Merchant},
  title        = {Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage
                  Defined Logic},
  journal      = {CoRR},
  volume       = {abs/2304.05686},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2304.05686},
  doi          = {10.48550/ARXIV.2304.05686},
  eprinttype    = {arXiv},
  eprint       = {2304.05686},
  timestamp    = {Wed, 19 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2304-05686.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-02400,
  author       = {Felix Staudigl and
                  Mohammed Hossein and
                  Tobias Ziegler and
                  Hazem Al Indari and
                  Rebecca Pelke and
                  Sebastian Siegel and
                  Dirk J. Wouters and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Rainer Leupers},
  title        = {Work-in-Progress: {A} Universal Instrumentation Platform for Non-Volatile
                  Memories},
  journal      = {CoRR},
  volume       = {abs/2308.02400},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2308.02400},
  doi          = {10.48550/ARXIV.2308.02400},
  eprinttype    = {arXiv},
  eprint       = {2308.02400},
  timestamp    = {Mon, 21 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2308-02400.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-02694,
  author       = {Lennart M. Reimann and
                  Jonathan Wiesner and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {SoftFlow: Automated {HW-SW} Confidentiality Verification for Embedded
                  Processors},
  journal      = {CoRR},
  volume       = {abs/2308.02694},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2308.02694},
  doi          = {10.48550/ARXIV.2308.02694},
  eprinttype    = {arXiv},
  eprint       = {2308.02694},
  timestamp    = {Mon, 21 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2308-02694.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-09445,
  author       = {Jos{\'{e}} Cubero{-}Cascante and
                  Niko Zurstra{\ss}en and
                  J{\"{o}}rn N{\"{o}}ller and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  title        = {parti-gem5: gem5's Timing Mode Parallelised},
  journal      = {CoRR},
  volume       = {abs/2308.09445},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2308.09445},
  doi          = {10.48550/ARXIV.2308.09445},
  eprinttype    = {arXiv},
  eprint       = {2308.09445},
  timestamp    = {Fri, 25 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2308-09445.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2309-03805,
  author       = {Rebecca Pelke and
                  Nils Bosbach and
                  Jos{\'{e}} Cubero{-}Cascante and
                  Felix Staudigl and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  title        = {Mapping of CNNs on multi-core RRAM-based {CIM} architectures},
  journal      = {CoRR},
  volume       = {abs/2309.03805},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2309.03805},
  doi          = {10.48550/ARXIV.2309.03805},
  eprinttype    = {arXiv},
  eprint       = {2309.03805},
  timestamp    = {Tue, 12 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2309-03805.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/StaudiglML22,
  author       = {Felix Staudigl and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators,
                  and Security},
  journal      = {{IEEE} Des. Test},
  volume       = {39},
  number       = {2},
  pages        = {90--99},
  year         = {2022},
  url          = {https://doi.org/10.1109/MDAT.2021.3102013},
  doi          = {10.1109/MDAT.2021.3102013},
  timestamp    = {Fri, 01 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dt/StaudiglML22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/ZurstrassenJKKL22,
  author       = {Niko Zurstra{\ss}en and
                  Lukas J{\"{u}}nger and
                  Tim Kogel and
                  Holger Keding and
                  Rainer Leupers},
  title        = {{AMAIX} In-Depth: {A} Generic Analytical Model for Deep Learning Accelerators},
  journal      = {Int. J. Parallel Program.},
  volume       = {50},
  number       = {2},
  pages        = {295--318},
  year         = {2022},
  url          = {https://doi.org/10.1007/s10766-022-00728-3},
  doi          = {10.1007/S10766-022-00728-3},
  timestamp    = {Wed, 18 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijpp/ZurstrassenJKKL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SisejkovicMRL22,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Lennart M. Reimann and
                  Rainer Leupers},
  title        = {Deceptive Logic Locking for Hardware Integrity Protection Against
                  Machine Learning Attacks},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {41},
  number       = {6},
  pages        = {1716--1729},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCAD.2021.3100275},
  doi          = {10.1109/TCAD.2021.3100275},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/SisejkovicMRL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/StaudiglSBFSJPL22,
  author       = {Felix Staudigl and
                  Karl J. X. Sturm and
                  Maximilian Bartel and
                  Thorben Fetz and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Let{\'{\i}}cia Maria Bolzani P{\"{o}}hls and
                  Rainer Leupers},
  title        = {X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar
                  Arrays with Logic-in-Memory Computation},
  booktitle    = {4th {IEEE} International Conference on Artificial Intelligence Circuits
                  and Systems, {AICAS} 2022, Incheon, Republic of Korea, June 13-15,
                  2022},
  pages        = {174--177},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/AICAS54282.2022.9869897},
  doi          = {10.1109/AICAS54282.2022.9869897},
  timestamp    = {Sun, 20 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aicas/StaudiglSBFSJPL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SisejkovicC0PKL22,
  author       = {Dominik Sisejkovic and
                  Luca Collini and
                  Benjamin Tan and
                  Christian Pilato and
                  Ramesh Karri and
                  Rainer Leupers},
  editor       = {Rob Oshana},
  title        = {Designing ML-resilient locking at register-transfer level},
  booktitle    = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
                  California, USA, July 10 - 14, 2022},
  pages        = {769--774},
  publisher    = {{ACM}},
  year         = {2022},
  url          = {https://doi.org/10.1145/3489517.3530541},
  doi          = {10.1145/3489517.3530541},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/SisejkovicC0PKL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GaliciaMMMCZCJS22,
  author       = {Melvin Galicia and
                  Stephan Menzel and
                  Farhad Merchant and
                  Maximilian M{\"{u}}ller and
                  Hsin{-}Yu Chen and
                  Qing{-}Tai Zhao and
                  Felix C{\"{u}}ppers and
                  Abdur R. Jalil and
                  Qi Shu and
                  Peter Sch{\"{u}}ffelgen and
                  Gregor Mussler and
                  Carsten Funck and
                  Christian Lanius and
                  Stefan Wiefels and
                  Moritz von Witzleben and
                  Christopher Bengel and
                  Nils Kopperberg and
                  Tobias Ziegler and
                  R. Walied Ahmad and
                  Alexander Kr{\"{u}}ger and
                  Leticia P{\"{o}}hls and
                  Regina Dittmann and
                  Susanne Hoffmann{-}Eifert and
                  Vikas Rana and
                  Detlev Gr{\"{u}}tzmacher and
                  Matthias Wuttig and
                  Dirk J. Wouters and
                  Andrei Vescan and
                  Tobias Gemmeke and
                  Joachim Knoch and
                  Max C. Lemme and
                  Rainer Leupers and
                  Rainer Waser},
  editor       = {Cristiana Bolchini and
                  Ingrid Verbauwhede and
                  Ioana Vatajelu},
  title        = {{NEUROTEC} {I:} Neuro-inspired Artificial Intelligence Technologies
                  for the Electronics of the Future},
  booktitle    = {2022 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
  pages        = {957--962},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.23919/DATE54114.2022.9774755},
  doi          = {10.23919/DATE54114.2022.9774755},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/GaliciaMMMCZCJS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/StaudiglISSMJRM22,
  author       = {Felix Staudigl and
                  Hazem Al Indari and
                  Daniel Sch{\"{o}}n and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Jan Moritz Joseph and
                  Vikas Rana and
                  Stephan Menzel and
                  Rainer Leupers},
  editor       = {Cristiana Bolchini and
                  Ingrid Verbauwhede and
                  Ioana Vatajelu},
  title        = {NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories},
  booktitle    = {2022 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
  pages        = {1181--1184},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.23919/DATE54114.2022.9774651},
  doi          = {10.23919/DATE54114.2022.9774651},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/StaudiglISSMJRM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/JungerWL22,
  author       = {Lukas J{\"{u}}nger and
                  Simon Winther and
                  Rainer Leupers},
  title        = {X-on-X: Distributed Parallel Virtual Platforms for Heterogeneous Systems},
  booktitle    = {25th Euromicro Conference on Digital System Design, {DSD} 2022, Maspalomas,
                  Spain, August 31 - Sept. 2, 2022},
  pages        = {142--148},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/DSD57027.2022.00028},
  doi          = {10.1109/DSD57027.2022.00028},
  timestamp    = {Mon, 09 Jan 2023 17:07:14 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/JungerWL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TanS0DLJ22,
  author       = {Yee Yang Tan and
                  Felix Staudigl and
                  Lukas J{\"{u}}nger and
                  Anna Drewes and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  title        = {EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping
                  on FPGAs},
  booktitle    = {32nd International Conference on Field-Programmable Logic and Applications,
                  {FPL} 2022, Belfast, United Kingdom, August 29 - Sept. 2, 2022},
  pages        = {334--341},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/FPL57034.2022.00058},
  doi          = {10.1109/FPL57034.2022.00058},
  timestamp    = {Mon, 20 Feb 2023 17:38:16 +0100},
  biburl       = {https://dblp.org/rec/conf/fpl/TanS0DLJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/host/MoussaviSBKSVLI22,
  author       = {Elmira Moussavi and
                  Dominik Sisejkovic and
                  Fabian Brings and
                  Daniyar Kizatov and
                  Animesh Singh and
                  Xuan Thang Vu and
                  Rainer Leupers and
                  Sven Ingebrandt and
                  Vivek Pachauri and
                  Farhad Merchant},
  title        = {pHGen: {A} pH-Based Key Generation Mechanism Using ISFETs},
  booktitle    = {{IEEE} International Symposium on Hardware Oriented Security and Trust,
                  {HOST} 2022, McLean, VA, USA, June 27-30, 2022},
  pages        = {61--64},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/HOST54066.2022.9840282},
  doi          = {10.1109/HOST54066.2022.9840282},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/host/MoussaviSBKSVLI22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GaliciaML22,
  author       = {Melvin Galicia and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {A Parallel SystemC Virtual Platform for Neuromorphic Architectures},
  booktitle    = {23rd International Symposium on Quality Electronic Design, {ISQED}
                  2022, Santa Clara, CA, USA, April 6-7, 2022},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISQED54688.2022.9806235},
  doi          = {10.1109/ISQED54688.2022.9806235},
  timestamp    = {Mon, 04 Jul 2022 17:06:19 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/GaliciaML22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/MoussaviSSKLIPM22,
  author       = {Elmira Moussavi and
                  Dominik Sisejkovic and
                  Animesh Singh and
                  Daniyar Kizatov and
                  Rainer Leupers and
                  Sven Ingebrandt and
                  Vivek Pachauri and
                  Farhad Merchant},
  title        = {A Temperature Independent Readout Circuit for ISFET-Based Sensor Applications},
  booktitle    = {23rd {IEEE} Latin American Test Symposium, {LATS} 2022, Montevideo,
                  Uruguay, September 5-8, 2022},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/LATS57337.2022.9937020},
  doi          = {10.1109/LATS57337.2022.9937020},
  timestamp    = {Sun, 20 Nov 2022 22:42:09 +0100},
  biburl       = {https://dblp.org/rec/conf/latw/MoussaviSSKLIPM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norcas/BirkeHAWAL22,
  author       = {Sebastian Birke and
                  Bjoern Hartmann and
                  Dominik Auras and
                  Markus Wloka and
                  Gerd Ascheid and
                  Rainer Leupers},
  editor       = {Jari Nurmi and
                  Dag T. Wisland and
                  Snorre Aunet and
                  Kristian Kjelgaard},
  title        = {Design and Exploration of an ARC-Coprocessor for {LSTM} Based Audio
                  Applications},
  booktitle    = {{IEEE} Nordic Circuits and Systems Conference, NorCAS 2022, Oslo,
                  Norway, October 25-26, 2022},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/NorCAS57515.2022.9934553},
  doi          = {10.1109/NORCAS57515.2022.9934553},
  timestamp    = {Tue, 21 Mar 2023 20:58:08 +0100},
  biburl       = {https://dblp.org/rec/conf/norcas/BirkeHAWAL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/JungerSBL22,
  author       = {Lukas J{\"{u}}nger and
                  Antonios Salios and
                  Peter Bl{\"{o}}cher and
                  Rainer Leupers},
  editor       = {Sakir Sezer and
                  Thomas B{\"{u}}chner and
                  J{\"{u}}rgen Becker and
                  Andrew Marshall and
                  Fahad Siddiqui and
                  Tanja Harbaum and
                  Kieran McLaughlin},
  title        = {Virtual Platform Acceleration through Userspace Host Execution},
  booktitle    = {35th {IEEE} International System-on-Chip Conference, {SOCC} 2022,
                  Belfast, United Kingdom, September 5-8, 2022},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/SOCC56010.2022.9908079},
  doi          = {10.1109/SOCC56010.2022.9908079},
  timestamp    = {Fri, 21 Oct 2022 09:20:15 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/JungerSBL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BosbachJLJ22,
  author       = {Nils Bosbach and
                  Jan Moritz Joseph and
                  Rainer Leupers and
                  Lukas J{\"{u}}nger},
  title        = {{NISTT:} {A} Non-Intrusive SystemC-TLM 2.0 Tracing Tool},
  booktitle    = {30th {IFIP/IEEE} 30th International Conference on Very Large Scale
                  Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939578},
  doi          = {10.1109/VLSI-SOC54400.2022.9939578},
  timestamp    = {Mon, 01 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/BosbachJLJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SinghBPLCM22,
  author       = {Simranjeet Singh and
                  Srinivasu Bodapati and
                  Sachin B. Patkar and
                  Rainer Leupers and
                  Anupam Chattopadhyay and
                  Farhad Merchant},
  title        = {{PA-PUF:} {A} Novel Priority Arbiter {PUF}},
  booktitle    = {30th {IFIP/IEEE} 30th International Conference on Very Large Scale
                  Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939642},
  doi          = {10.1109/VLSI-SOC54400.2022.9939642},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/SinghBPLCM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2202-12085,
  author       = {Elmira Moussavi and
                  Dominik Sisejkovic and
                  Fabian Brings and
                  Daniyar Kizatov and
                  Animesh Singh and
                  Xuan Thang Vu and
                  Sven Ingebrandt and
                  Rainer Leupers and
                  Vivek Pachauri and
                  Farhad Merchant},
  title        = {pHGen: {A} pH-Based Key Generation Mechanism Using ISFETs},
  journal      = {CoRR},
  volume       = {abs/2202.12085},
  year         = {2022},
  url          = {https://arxiv.org/abs/2202.12085},
  eprinttype    = {arXiv},
  eprint       = {2202.12085},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2202-12085.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-05399,
  author       = {Dominik Sisejkovic and
                  Luca Collini and
                  Benjamin Tan and
                  Christian Pilato and
                  Ramesh Karri and
                  Rainer Leupers},
  title        = {Designing ML-Resilient Locking at Register-Transfer Level},
  journal      = {CoRR},
  volume       = {abs/2203.05399},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2203.05399},
  doi          = {10.48550/ARXIV.2203.05399},
  eprinttype    = {arXiv},
  eprint       = {2203.05399},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2203-05399.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2204-01501,
  author       = {Felix Staudigl and
                  Karl J. X. Sturm and
                  Maximilian Bartel and
                  Thorben Fetz and
                  Dominik Sisejkovic and
                  Jan Moritz Joseph and
                  Let{\'{\i}}cia Maria Bolzani P{\"{o}}hls and
                  Rainer Leupers},
  title        = {X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar
                  Arrays with Logic-in-Memory Computation},
  journal      = {CoRR},
  volume       = {abs/2204.01501},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2204.01501},
  doi          = {10.48550/ARXIV.2204.01501},
  eprinttype    = {arXiv},
  eprint       = {2204.01501},
  timestamp    = {Sun, 20 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2204-01501.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2206-11613,
  author       = {Yee Yang Tan and
                  Felix Staudigl and
                  Lukas J{\"{u}}nger and
                  Anna Drewes and
                  Rainer Leupers and
                  Jan Moritz Joseph},
  title        = {EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping
                  on FPGAs},
  journal      = {CoRR},
  volume       = {abs/2206.11613},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2206.11613},
  doi          = {10.48550/ARXIV.2206.11613},
  eprinttype    = {arXiv},
  eprint       = {2206.11613},
  timestamp    = {Mon, 27 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2206-11613.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2207-10526,
  author       = {Simranjeet Singh and
                  Srinivasu Bodapati and
                  Sachin B. Patkar and
                  Rainer Leupers and
                  Anupam Chattopadhyay and
                  Farhad Merchant},
  title        = {{PA-PUF:} {A} Novel Priority Arbiter {PUF}},
  journal      = {CoRR},
  volume       = {abs/2207.10526},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2207.10526},
  doi          = {10.48550/ARXIV.2207.10526},
  eprinttype    = {arXiv},
  eprint       = {2207.10526},
  timestamp    = {Sun, 19 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2207-10526.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2207-11036,
  author       = {Nils Bosbach and
                  Lukas J{\"{u}}nger and
                  Jan Moritz Joseph and
                  Rainer Leupers},
  title        = {{NISTT:} {A} Non-Intrusive SystemC-TLM 2.0 Tracing Tool},
  journal      = {CoRR},
  volume       = {abs/2207.11036},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2207.11036},
  doi          = {10.48550/ARXIV.2207.11036},
  eprinttype    = {arXiv},
  eprint       = {2207.11036},
  timestamp    = {Mon, 25 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2207-11036.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2208-04769,
  author       = {Elmira Moussavi and
                  Dominik Sisejkovic and
                  Animesh Singh and
                  Daniyar Kizatov and
                  Rainer Leupers and
                  Sven Ingebrandt and
                  Vivek Pachauri and
                  Farhad Merchant},
  title        = {A Temperature Independent Readout Circuit for ISFET-Based Sensor Applications},
  journal      = {CoRR},
  volume       = {abs/2208.04769},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2208.04769},
  doi          = {10.48550/ARXIV.2208.04769},
  eprinttype    = {arXiv},
  eprint       = {2208.04769},
  timestamp    = {Tue, 16 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2208-04769.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2211-16891,
  author       = {Lennart M. Reimann and
                  Sarp Erd{\"{o}}nmez and
                  Dominik Sisejkovic and
                  Rainer Leupers},
  title        = {Quantitative Information Flow for Hardware: Advancing the Attack Landscape},
  journal      = {CoRR},
  volume       = {abs/2211.16891},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2211.16891},
  doi          = {10.48550/ARXIV.2211.16891},
  eprinttype    = {arXiv},
  eprint       = {2211.16891},
  timestamp    = {Fri, 02 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2211-16891.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/SisejkovicMRSHL21,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Lennart M. Reimann and
                  Harshit Srivastava and
                  Ahmed Hallawa and
                  Rainer Leupers},
  title        = {Challenging the Security of Logic Locking Schemes in the Era of Deep
                  Learning: {A} Neuroevolutionary Approach},
  journal      = {{ACM} J. Emerg. Technol. Comput. Syst.},
  volume       = {17},
  number       = {3},
  pages        = {30:1--30:26},
  year         = {2021},
  url          = {https://doi.org/10.1145/3431389},
  doi          = {10.1145/3431389},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jetc/SisejkovicMRSHL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ojcands/BytynLA21,
  author       = {Andreas Bytyn and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {ConvAix: An Application-Specific Instruction-Set Processor for the
                  Efficient Acceleration of CNNs},
  journal      = {{IEEE} Open J. Circuits Syst.},
  volume       = {2},
  pages        = {3--15},
  year         = {2021},
  url          = {https://doi.org/10.1109/OJCAS.2020.3037758},
  doi          = {10.1109/OJCAS.2020.3037758},
  timestamp    = {Thu, 29 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ojcands/BytynLA21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JosephBJCLGKP21,
  author       = {Jan Moritz Joseph and
                  Lennart Bamberg and
                  Geonhwa Jeong and
                  Ruei{-}Ting Chien and
                  Rainer Leupers and
                  Alberto Garc{\'{\i}}a{-}Ortiz and
                  Tushar Krishna and
                  Thilo Pionteck},
  title        = {Bridging the Frequency Gap in Heterogeneous 3D SoCs through Technology-Specific
                  NoC Router Architectures},
  booktitle    = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
                  Tokyo, Japan, January 18-21, 2021},
  pages        = {197--203},
  publisher    = {{ACM}},
  year         = {2021},
  url          = {https://doi.org/10.1145/3394885.3431421},
  doi          = {10.1145/3394885.3431421},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/JosephBJCLGKP21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/0001BNPL21,
  author       = {Lukas J{\"{u}}nger and
                  Carmine Bianco and
                  Kristof Niederholtmeyer and
                  Dietmar Petras and
                  Rainer Leupers},
  title        = {Optimizing Temporal Decoupling using Event Relevance},
  booktitle    = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
                  Tokyo, Japan, January 18-21, 2021},
  pages        = {331--337},
  publisher    = {{ACM}},
  year         = {2021},
  url          = {https://doi.org/10.1145/3394885.3431419},
  doi          = {10.1145/3394885.3431419},
  timestamp    = {Tue, 09 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/0001BNPL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PolianAABBDDD0G21,
  author       = {Ilia Polian and
                  Frank Altmann and
                  Tolga Arul and
                  Christian Boit and
                  Ralf Brederlow and
                  Lucas Davi and
                  Rolf Drechsler and
                  Nan Du and
                  Thomas Eisenbarth and
                  Tim G{\"{u}}neysu and
                  Sascha Hermann and
                  Matthias Hiller and
                  Rainer Leupers and
                  Farhad Merchant and
                  Thomas Mussenbrock and
                  Stefan Katzenbeisser and
                  Akash Kumar and
                  Wolfgang Kunz and
                  Thomas Mikolajick and
                  Vivek Pachauri and
                  Jean{-}Pierre Seifert and
                  Frank Sill Torres and
                  Jens Trommer},
  title        = {Nano Security: From Nano-Electronics to Secure Systems},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2021, Grenoble, France, February 1-5, 2021},
  pages        = {1334--1339},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.23919/DATE51398.2021.9474187},
  doi          = {10.23919/DATE51398.2021.9474187},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/PolianAABBDDD0G21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/CopicLA21,
  author       = {Milan Copic and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Francesco Leporati and
                  Salvatore Vitabile and
                  Amund Skavhaug},
  title        = {Runnable Configuration in Mixed Classic/Adaptive {AUTOSAR} Systems
                  by Leveraging Nondeterminism},
  booktitle    = {24th Euromicro Conference on Digital System Design, {DSD} 2021, Virtual
                  Event / Palermo, Sicily, Italy, September 1-3, 2021},
  pages        = {418--425},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/DSD53832.2021.00070},
  doi          = {10.1109/DSD53832.2021.00070},
  timestamp    = {Mon, 07 Nov 2022 07:58:07 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/CopicLA21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ReimannHSML21,
  author       = {Lennart M. Reimann and
                  Luca Hanel and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {QFlow: Quantitative Information Flow for Security-Aware Hardware Design
                  in Verilog},
  booktitle    = {39th {IEEE} International Conference on Computer Design, {ICCD} 2021,
                  Storrs, CT, USA, October 24-27, 2021},
  pages        = {603--607},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ICCD53106.2021.00097},
  doi          = {10.1109/ICCD53106.2021.00097},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccd/ReimannHSML21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/JosephSZLLPK21,
  author       = {Jan Moritz Joseph and
                  Ananda Samajdar and
                  Lingjun Zhu and
                  Rainer Leupers and
                  Sung Kyu Lim and
                  Thilo Pionteck and
                  Tushar Krishna},
  title        = {Architecture, Dataflow and Physical Design Implications of 3D-ICs
                  for DNN-Accelerators},
  booktitle    = {22nd International Symposium on Quality Electronic Design, {ISQED}
                  2021, Santa Clara, CA, USA, April 7-9, 2021},
  pages        = {60--66},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISQED51717.2021.9424349},
  doi          = {10.1109/ISQED51717.2021.9424349},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/JosephSZLLPK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SaxenaRNGNLM21,
  author       = {Vinay Saxena and
                  Ankitha Reddy and
                  Jonathan Neudorfer and
                  John L. Gustafson and
                  Sangeeth Nambiar and
                  Rainer Leupers and
                  Farhad Merchant},
  title        = {Brightening the Optical Flow through Posit Arithmetic},
  booktitle    = {22nd International Symposium on Quality Electronic Design, {ISQED}
                  2021, Santa Clara, CA, USA, April 7-9, 2021},
  pages        = {463--468},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISQED51717.2021.9424360},
  doi          = {10.1109/ISQED51717.2021.9424360},
  timestamp    = {Mon, 17 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/SaxenaRNGNLM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/JosephBPLB21,
  author       = {Jan Moritz Joseph and
                  Murat Sezgin Baloglu and
                  Yue Pan and
                  Rainer Leupers and
                  Lennart Bamberg},
  editor       = {Tushar Krishna and
                  John Kim and
                  Sergi Abadal and
                  Joshua San Miguel},
  title        = {{NEWROMAP:} mapping CNNs to NoC-interconnected self-contained data-flow
                  accelerators for edge-AI},
  booktitle    = {{NOCS} '21: International Symposium on Networks-on-Chip, Virtual Event,
                  October 14-15, 2021},
  pages        = {15--20},
  publisher    = {{ACM}},
  year         = {2021},
  url          = {https://doi.org/10.1145/3479876.3481591},
  doi          = {10.1145/3479876.3481591},
  timestamp    = {Mon, 18 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/nocs/JosephBPLB21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/0001BL21,
  author       = {Lukas J{\"{u}}nger and
                  Alexander Belke and
                  Rainer Leupers},
  editor       = {Gang Qu and
                  Jinjun Xiong and
                  Danella Zhao and
                  Venki Muthukumar and
                  Md Farhadur Reza and
                  Ramalingam Sridhar},
  title        = {Software-defined Temporal Decoupling in Virtual Platforms},
  booktitle    = {34th {IEEE} International System-on-Chip Conference, {SOCC} 2021,
                  Las Vegas, NV, USA, September 14-17, 2021},
  pages        = {40--45},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/SOCC52499.2021.9739242},
  doi          = {10.1109/SOCC52499.2021.9739242},
  timestamp    = {Wed, 30 Mar 2022 11:02:31 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/0001BL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/GaliciaBSSSCL21,
  author       = {Melvin Galicia and
                  Ali BanaGozar and
                  Karl J. X. Sturm and
                  Felix Staudigl and
                  Sander Stuijk and
                  Henk Corporaal and
                  Rainer Leupers},
  editor       = {Gang Qu and
                  Jinjun Xiong and
                  Danella Zhao and
                  Venki Muthukumar and
                  Md Farhadur Reza and
                  Ramalingam Sridhar},
  title        = {NeuroVP: {A} System-Level Virtual Platform for Integration of Neuromorphic
                  Accelerators},
  booktitle    = {34th {IEEE} International System-on-Chip Conference, {SOCC} 2021,
                  Las Vegas, NV, USA, September 14-17, 2021},
  pages        = {236--241},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/SOCC52499.2021.9739585},
  doi          = {10.1109/SOCC52499.2021.9739585},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/GaliciaBSSSCL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SisejkovicL21,
  author       = {Dominik Sisejkovic and
                  Rainer Leupers},
  title        = {Trustworthy Hardware Design with Logic Locking},
  booktitle    = {29th {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2021, Singapore, Singapore, October 4-7, 2021},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/VLSI-SoC53125.2021.9606998},
  doi          = {10.1109/VLSI-SOC53125.2021.9606998},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/SisejkovicL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SisejkovicRMML21,
  author       = {Dominik Sisejkovic and
                  Lennart M. Reimann and
                  Elmira Moussavi and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {Logic Locking at the Frontiers of Machine Learning: {A} Survey on
                  Developments and Opportunities},
  booktitle    = {29th {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2021, Singapore, Singapore, October 4-7, 2021},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/VLSI-SoC53125.2021.9606979},
  doi          = {10.1109/VLSI-SOC53125.2021.9606979},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/SisejkovicRMML21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MerchantSRYGL21,
  author       = {Farhad Merchant and
                  Dominik Sisejkovic and
                  Lennart M. Reimann and
                  Kirthihan Yasotharan and
                  Thomas Grass and
                  Rainer Leupers},
  title        = {{ANDROMEDA:} An {FPGA} Based {RISC-V} MPSoC Exploration Framework},
  booktitle    = {34th International Conference on {VLSI} Design and 20th International
                  Conference on Embedded Systems, {VLSID} 2021, Guwahati, India, February
                  20-24, 2021},
  pages        = {270--275},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/VLSID51830.2021.00051},
  doi          = {10.1109/VLSID51830.2021.00051},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsid/MerchantSRYGL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AlouaniKML21,
  author       = {Ihsen Alouani and
                  Anouar Ben Khalifa and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {An Investigation on Inherent Robustness of Posit Data Representation},
  booktitle    = {34th International Conference on {VLSI} Design and 20th International
                  Conference on Embedded Systems, {VLSID} 2021, Guwahati, India, February
                  20-24, 2021},
  pages        = {276--281},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/VLSID51830.2021.00052},
  doi          = {10.1109/VLSID51830.2021.00052},
  timestamp    = {Mon, 14 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/AlouaniKML21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2101-01416,
  author       = {Ihsen Alouani and
                  Anouar Ben Khalifa and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {An Investigation on Inherent Robustness of Posit Data Representation},
  journal      = {CoRR},
  volume       = {abs/2101.01416},
  year         = {2021},
  url          = {https://arxiv.org/abs/2101.01416},
  eprinttype    = {arXiv},
  eprint       = {2101.01416},
  timestamp    = {Thu, 21 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2101-01416.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2101-05591,
  author       = {Farhad Merchant and
                  Dominik Sisejkovic and
                  Lennart M. Reimann and
                  Kirthihan Yasotharan and
                  Thomas Grass and
                  Rainer Leupers},
  title        = {{ANDROMEDA:} An {FPGA} Based {RISC-V} MPSoC Exploration Framework},
  journal      = {CoRR},
  volume       = {abs/2101.05591},
  year         = {2021},
  url          = {https://arxiv.org/abs/2101.05591},
  eprinttype    = {arXiv},
  eprint       = {2101.05591},
  timestamp    = {Fri, 22 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2101-05591.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2101-06665,
  author       = {Vinay Saxena and
                  Ankitha Reddy and
                  Jonathan Neudorfer and
                  John L. Gustafson and
                  Sangeeth Nambiar and
                  Rainer Leupers and
                  Farhad Merchant},
  title        = {Brightening the Optical Flow through Posit Arithmetic},
  journal      = {CoRR},
  volume       = {abs/2101.06665},
  year         = {2021},
  url          = {https://arxiv.org/abs/2101.06665},
  eprinttype    = {arXiv},
  eprint       = {2101.06665},
  timestamp    = {Fri, 22 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2101-06665.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2107-01915,
  author       = {Dominik Sisejkovic and
                  Lennart M. Reimann and
                  Elmira Moussavi and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {Logic Locking at the Frontiers of Machine Learning: {A} Survey on
                  Developments and Opportunities},
  journal      = {CoRR},
  volume       = {abs/2107.01915},
  year         = {2021},
  url          = {https://arxiv.org/abs/2107.01915},
  eprinttype    = {arXiv},
  eprint       = {2107.01915},
  timestamp    = {Wed, 07 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2107-01915.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2107-08695,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Lennart M. Reimann and
                  Rainer Leupers},
  title        = {Deceptive Logic Locking for Hardware Integrity Protection against
                  Machine Learning Attacks},
  journal      = {CoRR},
  volume       = {abs/2107.08695},
  year         = {2021},
  url          = {https://arxiv.org/abs/2107.08695},
  eprinttype    = {arXiv},
  eprint       = {2107.08695},
  timestamp    = {Thu, 22 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2107-08695.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2109-02379,
  author       = {Lennart M. Reimann and
                  Luca Hanel and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {QFlow: Quantitative Information Flow for Security-Aware Hardware Design
                  in Verilog},
  journal      = {CoRR},
  volume       = {abs/2109.02379},
  year         = {2021},
  url          = {https://arxiv.org/abs/2109.02379},
  eprinttype    = {arXiv},
  eprint       = {2109.02379},
  timestamp    = {Mon, 20 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2109-02379.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2112-01087,
  author       = {Felix Staudigl and
                  Hazem Al Indari and
                  Daniel Sch{\"{o}}n and
                  Dominik Sisejkovic and
                  Farhad Merchant and
                  Jan Moritz Joseph and
                  Vikas Rana and
                  Stephan Menzel and
                  Rainer Leupers},
  title        = {NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories},
  journal      = {CoRR},
  volume       = {abs/2112.01087},
  year         = {2021},
  url          = {https://arxiv.org/abs/2112.01087},
  eprinttype    = {arXiv},
  eprint       = {2112.01087},
  timestamp    = {Tue, 07 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2112-01087.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2112-13157,
  author       = {Melvin Galicia and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {A Parallel SystemC Virtual Platform for Neuromorphic Architectures},
  journal      = {CoRR},
  volume       = {abs/2112.13157},
  year         = {2021},
  url          = {https://arxiv.org/abs/2112.13157},
  eprinttype    = {arXiv},
  eprint       = {2112.13157},
  timestamp    = {Tue, 04 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2112-13157.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/VrecaSGMBLB20,
  author       = {Jure Vreca and
                  Karl J. X. Sturm and
                  Ernest Gungl and
                  Farhad Merchant and
                  Paolo Bientinesi and
                  Rainer Leupers and
                  Zmago Brezocnik},
  title        = {Accelerating Deep Learning Inference in Constrained Embedded Devices
                  Using Hardware Loops and a Dot Product Unit},
  journal      = {{IEEE} Access},
  volume       = {8},
  pages        = {165913--165926},
  year         = {2020},
  url          = {https://doi.org/10.1109/ACCESS.2020.3022824},
  doi          = {10.1109/ACCESS.2020.3022824},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/access/VrecaSGMBLB20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/CopicLA20,
  author       = {Milan Copic and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Reducing idle time in event-triggered software execution via runnable
                  migration and DPM-Aware scheduling},
  journal      = {Integr.},
  volume       = {70},
  pages        = {10--20},
  year         = {2020},
  url          = {https://doi.org/10.1016/j.vlsi.2019.09.004},
  doi          = {10.1016/J.VLSI.2019.09.004},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/CopicLA20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/FuhrHLAE20,
  author       = {Gereon F{\"{u}}hr and
                  Ahmed Hallawa and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Juan Fernando Eusse},
  editor       = {Andr{\'{e}} Brinkmann and
                  Wolfgang Karl and
                  Stefan Lankes and
                  Sven Tomforde and
                  Thilo Pionteck and
                  Carsten Trinitis},
  title        = {3D Optimisation of Software Application Mappings on Heterogeneous
                  MPSoCs},
  booktitle    = {Architecture of Computing Systems - {ARCS} 2020 - 33rd International
                  Conference, Aachen, Germany, May 25-28, 2020, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {12155},
  pages        = {56--68},
  publisher    = {Springer},
  year         = {2020},
  url          = {https://doi.org/10.1007/978-3-030-52794-5\_5},
  doi          = {10.1007/978-3-030-52794-5\_5},
  timestamp    = {Thu, 23 Jun 2022 19:59:00 +0200},
  biburl       = {https://dblp.org/rec/conf/arcs/FuhrHLAE20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/SisejkovicMRLK20,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Lennart M. Reimann and
                  Rainer Leupers and
                  Sascha Kegrei{\ss}},
  editor       = {Andr{\'{e}} Brinkmann and
                  Wolfgang Karl and
                  Stefan Lankes and
                  Sven Tomforde and
                  Thilo Pionteck and
                  Carsten Trinitis},
  title        = {Scaling Logic Locking Schemes to Multi-module Hardware Designs},
  booktitle    = {Architecture of Computing Systems - {ARCS} 2020 - 33rd International
                  Conference, Aachen, Germany, May 25-28, 2020, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {12155},
  pages        = {138--152},
  publisher    = {Springer},
  year         = {2020},
  url          = {https://doi.org/10.1007/978-3-030-52794-5\_11},
  doi          = {10.1007/978-3-030-52794-5\_11},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/arcs/SisejkovicMRLK20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GuntoroPMDGLLN20,
  author       = {Andre Guntoro and
                  Cecilia De la Parra and
                  Farhad Merchant and
                  Florent de Dinechin and
                  John L. Gustafson and
                  Martin Langhammer and
                  Rainer Leupers and
                  Sangeeth Nambiar},
  title        = {Next Generation Arithmetic for Edge Computing},
  booktitle    = {2020 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
  pages        = {1357--1365},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.23919/DATE48585.2020.9116196},
  doi          = {10.23919/DATE48585.2020.9116196},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/GuntoroPMDGLLN20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/JungerBTL020,
  author       = {Lukas J{\"{u}}nger and
                  Jan Luca Malte B{\"{o}}lke and
                  Stephan Tobies and
                  Rainer Leupers and
                  Andreas Hoffmann},
  title        = {ARM-on-ARM: Leveraging Virtualization Extensions for Fast Virtual
                  Platforms},
  booktitle    = {2020 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
  pages        = {1508--1513},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.23919/DATE48585.2020.9116573},
  doi          = {10.23919/DATE48585.2020.9116573},
  timestamp    = {Wed, 21 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/JungerBTL020.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issre/CopicLA20,
  author       = {Milan Copic and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Marco Vieira and
                  Henrique Madeira and
                  Nuno Antunes and
                  Zheng Zheng},
  title        = {Modelling Machine Learning Components for Mapping and Scheduling of
                  {AUTOSAR} Runnables},
  booktitle    = {31st {IEEE} International Symposium on Software Reliability Engineering,
                  {ISSRE} 2020, Coimbra, Portugal, October 12-15, 2020},
  pages        = {127--137},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISSRE5003.2020.00021},
  doi          = {10.1109/ISSRE5003.2020.00021},
  timestamp    = {Tue, 17 Nov 2020 13:34:50 +0100},
  biburl       = {https://dblp.org/rec/conf/issre/CopicLA20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/JungerZKKL20,
  author       = {Lukas J{\"{u}}nger and
                  Niko Zurstra{\ss}en and
                  Tim Kogel and
                  Holger Keding and
                  Rainer Leupers},
  editor       = {Alex Orailoglu and
                  Matthias Jung and
                  Marc Reichenbach},
  title        = {{AMAIX:} {A} Generic Analytical Model for Deep Learning Accelerators},
  booktitle    = {Embedded Computer Systems: Architectures, Modeling, and Simulation
                  - 20th International Conference, {SAMOS} 2020, Samos, Greece, July
                  5-9, 2020, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {12471},
  pages        = {36--51},
  publisher    = {Springer},
  year         = {2020},
  url          = {https://doi.org/10.1007/978-3-030-60939-9\_3},
  doi          = {10.1007/978-3-030-60939-9\_3},
  timestamp    = {Wed, 21 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/JungerZKKL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/SisejkovicMRLGK20,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Lennart M. Reimann and
                  Rainer Leupers and
                  Massimiliano Giacometti and
                  Sascha Kegrei{\ss}},
  editor       = {Sander Stuijk and
                  Henk Corporaal},
  title        = {A secure hardware-software solution based on RISC-V, logic locking
                  and microkernel},
  booktitle    = {{SCOPES} '20: 23rd International Workshop on Software and Compilers
                  for Embedded Systems, St. Goar, Germany, May 25-26, 2020},
  pages        = {62--65},
  publisher    = {{ACM}},
  year         = {2020},
  url          = {https://doi.org/10.1145/3378678.3391886},
  doi          = {10.1145/3378678.3391886},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/scopes/SisejkovicMRLGK20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-00364,
  author       = {Riya Jain and
                  Niraj N. Sharma and
                  Farhad Merchant and
                  Sachin B. Patkar and
                  Rainer Leupers},
  title        = {{CLARINET:} {A} {RISC-V} Based Framework for Posit Arithmetic Empiricism},
  journal      = {CoRR},
  volume       = {abs/2006.00364},
  year         = {2020},
  url          = {https://arxiv.org/abs/2006.00364},
  eprinttype    = {arXiv},
  eprint       = {2006.00364},
  timestamp    = {Sun, 19 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2006-00364.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-12274,
  author       = {Andreas Bytyn and
                  Ren{\'{e}} Ahlsdorf and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Dataflow Aware Mapping of Convolutional Neural Networks Onto Many-Core
                  Platforms With Network-on-Chip Interconnect},
  journal      = {CoRR},
  volume       = {abs/2006.12274},
  year         = {2020},
  url          = {https://arxiv.org/abs/2006.12274},
  eprinttype    = {arXiv},
  eprint       = {2006.12274},
  timestamp    = {Tue, 23 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2006-12274.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2011-10389,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Lennart M. Reimann and
                  Harshit Srivastava and
                  Ahmed Hallawa and
                  Rainer Leupers},
  title        = {Challenging the Security of Logic Locking Schemes in the Era of Deep
                  Learning: {A} Neuroevolutionary Approach},
  journal      = {CoRR},
  volume       = {abs/2011.10389},
  year         = {2020},
  url          = {https://arxiv.org/abs/2011.10389},
  eprinttype    = {arXiv},
  eprint       = {2011.10389},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2011-10389.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2012-12563,
  author       = {Jan Moritz Joseph and
                  Ananda Samajdar and
                  Lingjun Zhu and
                  Rainer Leupers and
                  Sung Kyu Lim and
                  Thilo Pionteck and
                  Tushar Krishna},
  title        = {Architecture, Dataflow and Physical Design Implications of 3D-ICs
                  for DNN-Accelerators},
  journal      = {CoRR},
  volume       = {abs/2012.12563},
  year         = {2020},
  url          = {https://arxiv.org/abs/2012.12563},
  eprinttype    = {arXiv},
  eprint       = {2012.12563},
  timestamp    = {Tue, 10 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2012-12563.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esl/FuhrHPGLAE19,
  author       = {Gereon F{\"{u}}hr and
                  Seyit Halil Hamurcu and
                  Diego Pala and
                  Thomas Grass and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Juan Fernando Eusse},
  title        = {Automatic Energy-Minimized {HW/SW} Partitioning for FPGA-Accelerated
                  MPSoCs},
  journal      = {{IEEE} Embed. Syst. Lett.},
  volume       = {11},
  number       = {3},
  pages        = {93--96},
  year         = {2019},
  url          = {https://doi.org/10.1109/LES.2019.2901224},
  doi          = {10.1109/LES.2019.2901224},
  timestamp    = {Thu, 10 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/esl/FuhrHPGLAE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/FuhrHLAE19,
  author       = {Gereon F{\"{u}}hr and
                  Ahmed Hallawa and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Juan Fernando Eusse},
  title        = {Multi-objective optimisation of software application mappings on heterogeneous
                  MPSoCs: {TONPET} versus {R2-EMOA}},
  journal      = {Integr.},
  volume       = {69},
  pages        = {50--61},
  year         = {2019},
  url          = {https://doi.org/10.1016/j.vlsi.2019.09.005},
  doi          = {10.1016/J.VLSI.2019.09.005},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/FuhrHLAE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/StrobelFRL19,
  author       = {Manuel Strobel and
                  Gereon F{\"{u}}hr and
                  Martin Radetzki and
                  Rainer Leupers},
  title        = {Combined MPSoC Task Mapping and Memory Optimization for Low-Power},
  booktitle    = {2019 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
                  2019, Bangkok, Thailand, November 11-14, 2019},
  pages        = {121--124},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/APCCAS47518.2019.8953133},
  doi          = {10.1109/APCCAS47518.2019.8953133},
  timestamp    = {Wed, 05 Feb 2020 16:48:41 +0100},
  biburl       = {https://dblp.org/rec/conf/apccas/StrobelFRL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/CopicLA19,
  author       = {Milan Copic and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Toshiyuki Shibuya},
  title        = {Efficient sporadic task handling in parallel {AUTOSAR} applications
                  using runnable migration},
  booktitle    = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
                  {ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
  pages        = {603--608},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3287624.3287654},
  doi          = {10.1145/3287624.3287654},
  timestamp    = {Sun, 20 Jan 2019 16:08:16 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/CopicLA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OnnebrinkHLAS19,
  author       = {Gereon Onnebrink and
                  Ahmed Hallawa and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Awaid{-}Ud{-}Din Shaheen},
  editor       = {Toshiyuki Shibuya},
  title        = {A heuristic for multi objective software application mappings on heterogeneous
                  MPSoCs},
  booktitle    = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
                  {ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
  pages        = {609--614},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3287624.3287651},
  doi          = {10.1145/3287624.3287651},
  timestamp    = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/OnnebrinkHLAS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/SisejkovicMLAK19,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Sascha Kegreiss},
  title        = {Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries},
  booktitle    = {24th {IEEE} European Test Symposium, {ETS} 2019, Baden-Baden, Germany,
                  May 27-31, 2019},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ETS.2019.8791528},
  doi          = {10.1109/ETS.2019.8791528},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ets/SisejkovicMLAK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SisejkovicMLAK19,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Sascha Kegreiss},
  editor       = {Houman Homayoun and
                  Baris Taskin and
                  Tinoosh Mohsenin and
                  Weisheng Zhao},
  title        = {Control-Lock: Securing Processor Cores Against Software-Controlled
                  Hardware Trojans},
  booktitle    = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
                  2019, Tysons Corner, VA, USA, May 9-11, 2019},
  pages        = {27--32},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3299874.3317983},
  doi          = {10.1145/3299874.3317983},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/glvlsi/SisejkovicMLAK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccnc/BirkeAPMALA19,
  author       = {Sebastian Birke and
                  Dominik Auras and
                  Tobias Piwczyk and
                  Robin Mahlke and
                  Nikolas Alberti and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {{VLSI} Architectures for {ORVD} Trellis based {MIMO} Detection},
  booktitle    = {International Conference on Computing, Networking and Communications,
                  {ICNC} 2019, Honolulu, HI, USA, February 18-21, 2019},
  pages        = {983--989},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ICCNC.2019.8685585},
  doi          = {10.1109/ICCNC.2019.8685585},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/iccnc/BirkeAPMALA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BytynLA19,
  author       = {Andreas Bytyn and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {An Application-Specific {VLIW} Processor with Vector Instruction Set
                  for {CNN} Acceleration},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
                  Sapporo, Japan, May 26-29, 2019},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISCAS.2019.8702357},
  doi          = {10.1109/ISCAS.2019.8702357},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BytynLA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/JungerWLA19,
  author       = {Lukas J{\"{u}}nger and
                  Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Daniel Chillet},
  title        = {Fast SystemC Processor Models with Unicorn},
  booktitle    = {Proceedings of the Rapid Simulation and Performance Evaluation: Methods
                  and Tools, {RAPIDO} 2019, Valencia, Spain, January 21-23, 2019},
  pages        = {2:1--2:6},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3300189.3300191},
  doi          = {10.1145/3300189.3300191},
  timestamp    = {Wed, 21 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/rapido/JungerWLA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SisejkovicML19,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {Protecting the Integrity of Processor Cores with Logic Encryption},
  booktitle    = {32nd {IEEE} International System-on-Chip Conference, {SOCC} 2019,
                  Singapore, September 3-6, 2019},
  pages        = {424--425},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/SOCC46988.2019.1570564157},
  doi          = {10.1109/SOCC46988.2019.1570564157},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/SisejkovicML19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/SisejkovicMLAK19,
  author       = {Dominik Sisejkovic and
                  Farhad Merchant and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Volker Kiefer},
  title        = {A Critical Evaluation of the Paradigm Shift in the Design of Logic
                  Encryption Algorithms},
  booktitle    = {International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT}
                  2019, Hsinchu, Taiwan, April 22-25, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSI-DAT.2019.8741531},
  doi          = {10.1109/VLSI-DAT.2019.8741531},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/SisejkovicMLAK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MerchantVCRNNL19,
  author       = {Farhad Merchant and
                  Tarun Vatwani and
                  Anupam Chattopadhyay and
                  Soumyendu Raha and
                  S. K. Nandy and
                  Ranjani Narayan and
                  Rainer Leupers},
  title        = {A Systematic Approach for Acceleration of Matrix-Vector Operations
                  in {CGRA} through Algorithm-Architecture Co-Design},
  booktitle    = {32nd International Conference on {VLSI} Design and 18th International
                  Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
                  5-9, 2019},
  pages        = {64--69},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSID.2019.00030},
  doi          = {10.1109/VLSID.2019.00030},
  timestamp    = {Mon, 14 Nov 2022 15:28:06 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MerchantVCRNNL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MerchantVCRNNL19a,
  author       = {Farhad Merchant and
                  Tarun Vatwani and
                  Anupam Chattopadhyay and
                  Soumyendu Raha and
                  S. K. Nandy and
                  Ranjani Narayan and
                  Rainer Leupers},
  title        = {Applying Modified Householder Transform to Kalman Filter},
  booktitle    = {32nd International Conference on {VLSI} Design and 18th International
                  Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
                  5-9, 2019},
  pages        = {431--436},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSID.2019.00092},
  doi          = {10.1109/VLSID.2019.00092},
  timestamp    = {Mon, 14 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MerchantVCRNNL19a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1904-05106,
  author       = {Andreas Bytyn and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {An Application-Specific {VLIW} Processor with Vector Instruction Set
                  for {CNN} Acceleration},
  journal      = {CoRR},
  volume       = {abs/1904.05106},
  year         = {2019},
  url          = {http://arxiv.org/abs/1904.05106},
  eprinttype    = {arXiv},
  eprint       = {1904.05106},
  timestamp    = {Thu, 25 Apr 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1904-05106.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/BucsLA18,
  author       = {Robert Lajos B{\"{u}}cs and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Multi-Scale Multi-Domain Co-Simulation for Rapid {ADAS} Prototyping},
  booktitle    = {2018 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
                  2018, Chengdu, China, October 26-30, 2018},
  pages        = {532--535},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/APCCAS.2018.8605685},
  doi          = {10.1109/APCCAS.2018.8605685},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/BucsLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/WeinstockBWLA18,
  author       = {Jan Henrik Weinstock and
                  Robert Lajos B{\"{u}}cs and
                  Florian Walbroel and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Aviral Shrivastava and
                  Sudeep Pasricha},
  title        = {{AMVP} - a high performance virtual platform using parallel systemC
                  for multicore {ARM} architectures: work-in-progress},
  booktitle    = {Proceedings of the International Conference on Hardware/Software Codesign
                  and System Synthesis, {CODES+ISSS} 2018, part of {ESWEEK} 2018, Torino,
                  Italy, September 30 - October 5, 2018},
  pages        = {13},
  publisher    = {{IEEE} / {ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1109/CODESISSS.2018.8525899},
  doi          = {10.1109/CODESISSS.2018.8525899},
  timestamp    = {Wed, 16 Oct 2019 14:14:48 +0200},
  biburl       = {https://dblp.org/rec/conf/codes/WeinstockBWLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BucsFLAT018,
  author       = {Robert Lajos B{\"{u}}cs and
                  Maximilian Fricke and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Stephan Tobies and
                  Andreas Hoffmann},
  editor       = {Jan Madsen and
                  Ayse K. Coskun},
  title        = {{OHEX:} OS-aware hybridization techniques for accelerating MPSoC full-system
                  simulation},
  booktitle    = {2018 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
  pages        = {281--284},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.23919/DATE.2018.8342020},
  doi          = {10.23919/DATE.2018.8342020},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/date/BucsFLAT018.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChaurasiyaGSNNN18,
  author       = {Rohit Chaurasiya and
                  John L. Gustafson and
                  Rahul Shrestha and
                  Jonathan Neudorfer and
                  Sangeeth Nambiar and
                  Kaustav Niyogi and
                  Farhad Merchant and
                  Rainer Leupers},
  title        = {Parameterized Posit Arithmetic Hardware Generator},
  booktitle    = {36th {IEEE} International Conference on Computer Design, {ICCD} 2018,
                  Orlando, FL, USA, October 7-10, 2018},
  pages        = {334--341},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/ICCD.2018.00057},
  doi          = {10.1109/ICCD.2018.00057},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/ChaurasiyaGSNNN18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccnc/AurasBLA18,
  author       = {Dominik Auras and
                  Sebastian Birke and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Reducing the Computational Complexity of ORVD-Trellis Search Based
                  {MIMO} Detection},
  booktitle    = {2018 International Conference on Computing, Networking and Communications,
                  {ICNC} 2018, Maui, HI, USA, March 5-8, 2018},
  pages        = {315--321},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/ICCNC.2018.8390383},
  doi          = {10.1109/ICCNC.2018.8390383},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccnc/AurasBLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icves/BucsHLA18,
  author       = {Robert Lajos B{\"{u}}cs and
                  Marcel Heistermann and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Multi-Scale Code Generation for Simulation-Driven Rapid {ADAS} Prototyping:
                  the {SMELT} Approach},
  booktitle    = {2018 {IEEE} International Conference on Vehicular Electronics and
                  Safety, {ICVES} 2018, Madrid, Spain, September 12-14, 2018},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ICVES.2018.8519593},
  doi          = {10.1109/ICVES.2018.8519593},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/icves/BucsHLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/BirkeCWASLA18,
  author       = {Sebastian Birke and
                  Wei{-}Jhe Chen and
                  Gaojian Wang and
                  Dominik Auras and
                  Chung{-}An Shen and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {{VLSI} implementation of channel estimation for millimeter wave beamforming
                  training},
  booktitle    = {9th {IEEE} Latin American Symposium on Circuits {\&} Systems,
                  {LASCAS} 2018, Puerto Vallarta, Mexico, February 25-28, 2018},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/LASCAS.2018.8399977},
  doi          = {10.1109/LASCAS.2018.8399977},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/lascas/BirkeCWASLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/meco/BosschereL18,
  author       = {Koen De Bosschere and
                  Rainer Leupers},
  title        = {HiPEAC compilation architecture},
  booktitle    = {7th Mediterranean Conference on Embedded Computing, {MECO} 2018, Budva,
                  Montenegro, June 10-14, 2018},
  pages        = {13},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MECO.2018.8405949},
  doi          = {10.1109/MECO.2018.8405949},
  timestamp    = {Mon, 09 Aug 2021 14:54:01 +0200},
  biburl       = {https://dblp.org/rec/conf/meco/BosschereL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/OnnebrinkLA18,
  author       = {Gereon Onnebrink and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Daniel Chillet},
  title        = {{ESL} Black Box Power Estimation: Automatic Calibration for {IEEE}
                  {UPF} 3.0 Power Models},
  booktitle    = {Proceedings of the {RAPIDO} 2018 Workshop on Rapid Simulation and
                  Performance Evaluation: Methods and Tools, Manchester, UK, January
                  22-24, 2018},
  pages        = {1:1--1:6},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3180665.3180667},
  doi          = {10.1145/3180665.3180667},
  timestamp    = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/rapido/OnnebrinkLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SisejkovicLAM18,
  author       = {Dominik Sisejkovic and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Simon Metzner},
  editor       = {Trevor N. Mudge and
                  Dionisios N. Pnevmatikatos},
  title        = {A Unifying logic encryption security metric},
  booktitle    = {Proceedings of the 18th International Conference on Embedded Computer
                  Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece,
                  July 15-19, 2018},
  pages        = {179--186},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3229631.3229636},
  doi          = {10.1145/3229631.3229636},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/SisejkovicLAM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smartgreens/BucsLWWLA18,
  author       = {Robert Lajos B{\"{u}}cs and
                  Pramod Lakshman and
                  Jan Henrik Weinstock and
                  Florian Walbroel and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Brian Donnellan and
                  Cornel Klein and
                  Markus Helfert and
                  Oleg Gusikhin},
  title        = {A Multi-domain Co-simulation Ecosystem for Fully Virtual Rapid {ADAS}
                  Prototyping},
  booktitle    = {Smart Cities, Green Technologies and Intelligent Transport Systems
                  - 7th International Conference, SMARTGREENS, and 4th International
                  Conference, {VEHITS} 2018, Funchal, Madeira, Portugal, March 16-18,
                  2018, Revised Selected Papers},
  series       = {Communications in Computer and Information Science},
  volume       = {992},
  pages        = {181--201},
  publisher    = {Springer},
  year         = {2018},
  url          = {https://doi.org/10.1007/978-3-030-26633-2\_9},
  doi          = {10.1007/978-3-030-26633-2\_9},
  timestamp    = {Thu, 01 Aug 2019 14:54:06 +0200},
  biburl       = {https://dblp.org/rec/conf/smartgreens/BucsLWWLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vehits/BucsLWWLA18,
  author       = {Robert Lajos B{\"{u}}cs and
                  Pramod Lakshman and
                  Jan Henrik Weinstock and
                  Florian Walbroel and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Markus Helfert and
                  Oleg Gusikhin},
  title        = {Fully Virtual Rapid {ADAS} Prototyping via a Joined Multi-domain Co-simulation
                  Ecosystem},
  booktitle    = {Proceedings of the 4th International Conference on Vehicle Technology
                  and Intelligent Transport Systems, {VEHITS} 2018, Funchal, Madeira,
                  Portugal, March 16-18, 2018},
  pages        = {59--69},
  publisher    = {SciTePress},
  year         = {2018},
  url          = {https://doi.org/10.5220/0006665900590069},
  doi          = {10.5220/0006665900590069},
  timestamp    = {Mon, 30 Apr 2018 15:03:36 +0200},
  biburl       = {https://dblp.org/rec/conf/vehits/BucsLWWLA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1803-05320,
  author       = {Farhad Merchant and
                  Tarun Vatwani and
                  Anupam Chattopadhyay and
                  Soumyendu Raha and
                  S. K. Nandy and
                  Ranjani Narayan and
                  Rainer Leupers},
  title        = {Efficient Realization of Givens Rotation through Algorithm-Architecture
                  Co-design for Acceleration of {QR} Factorization},
  journal      = {CoRR},
  volume       = {abs/1803.05320},
  year         = {2018},
  url          = {http://arxiv.org/abs/1803.05320},
  eprinttype    = {arXiv},
  eprint       = {1803.05320},
  timestamp    = {Tue, 27 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1803-05320.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/AguilarERLASS17,
  author       = {Miguel Angel Aguilar and
                  Juan Fernando Eusse and
                  Projjol Ray and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Weihua Sheng and
                  Prashant Sharma},
  title        = {Towards Parallelism Extraction for Heterogeneous Multicore Android
                  Devices},
  journal      = {Int. J. Parallel Program.},
  volume       = {45},
  number       = {6},
  pages        = {1592--1624},
  year         = {2017},
  url          = {https://doi.org/10.1007/s10766-016-0479-5},
  doi          = {10.1007/S10766-016-0479-5},
  timestamp    = {Wed, 01 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijpp/AguilarERLASS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AguilarASLACF17,
  author       = {Miguel Angel Aguilar and
                  Abhishek Aggarwal and
                  Awaid Shaheen and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Liam Fitzpatrick},
  title        = {Multi-grained performance estimation for MPSoC compilers: work-in-progress},
  booktitle    = {Proceedings of the 2017 International Conference on Compilers, Architectures
                  and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
                  of Korea, October 15-20, 2017},
  pages        = {14:1--14:2},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {https://doi.org/10.1145/3125501.3125521},
  doi          = {10.1145/3125501.3125521},
  timestamp    = {Thu, 11 Mar 2021 17:04:51 +0100},
  biburl       = {https://dblp.org/rec/conf/cases/AguilarASLACF17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AguilarLAKF17,
  author       = {Miguel Angel Aguilar and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Nikolaos Kavvadias and
                  Liam Fitzpatrick},
  editor       = {David Atienza and
                  Giorgio Di Natale},
  title        = {Schedule-aware loop parallelization for embedded MPSoCs by exploiting
                  parallel slack},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
  pages        = {1237--1240},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.23919/DATE.2017.7927178},
  doi          = {10.23919/DATE.2017.7927178},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/date/AguilarLAKF17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/Auras-Rodriguez17,
  author       = {Mar{\'{\i}}a H. Auras{-}Rodr{\'{\i}}guez and
                  Anthony Zimmermann and
                  Gerd Ascheid and
                  Rainer Leupers},
  title        = {Using PEGs for Automatic Extraction of Memory Access Descriptions
                  to Support Data-Parallel Pattern Recognition},
  booktitle    = {Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming
                  and Run-Time Management Techniques for Many-core Architectures and
                  Design Tools and Architectures for Multicore Embedded Computing Platforms,
                  PARMA-DITAM@HiPEAC 2017, Stockholm, Sweden, January 25, 2017},
  pages        = {13--18},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {https://doi.org/10.1145/3029580.3029583},
  doi          = {10.1145/3029580.3029583},
  timestamp    = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/Auras-Rodriguez17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BytynSLA17,
  author       = {Andreas Bytyn and
                  Jannik Springer and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {{VLSI} implementation of {LS-SVM} training and classification using
                  entropy based subset-selection},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,
                  Baltimore, MD, USA, May 28-31, 2017},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISCAS.2017.8050590},
  doi          = {10.1109/ISCAS.2017.8050590},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BytynSLA17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itsc/BucsALA17,
  author       = {Robert Lajos B{\"{u}}cs and
                  Juan Sebastian Reyes Aristizabal and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Multi-level vehicle dynamics modeling and export for {ADAS} prototyping
                  in a 3D driving environment},
  booktitle    = {20th {IEEE} International Conference on Intelligent Transportation
                  Systems, {ITSC} 2017, Yokohama, Japan, October 16-19, 2017},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ITSC.2017.8317642},
  doi          = {10.1109/ITSC.2017.8317642},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/itsc/BucsALA17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/WeinstockLA17,
  author       = {Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Accelerating MPSoC Simulation Using Parallel SystemC and Processor
                  Sleep Models},
  booktitle    = {Proceedings of the 9th Workshop on Rapid Simulation and Performance
                  Evaluation: Methods and Tools, {RAPIDO} 2017, Stockholm, Sweden, January
                  23-25, 2017},
  pages        = {2},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {http://dl.acm.org/citation.cfm?id=3023975},
  timestamp    = {Tue, 06 Nov 2018 16:58:26 +0100},
  biburl       = {https://dblp.org/rec/conf/rapido/WeinstockLA17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/AguilarLAE17,
  author       = {Miguel Angel Aguilar and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Juan Fernando Eusse},
  editor       = {Yale N. Patt and
                  S. K. Nandy},
  title        = {Extraction of recursion level parallelism for embedded multicore systems},
  booktitle    = {2017 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July
                  17-20, 2017},
  pages        = {154--162},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/SAMOS.2017.8344623},
  doi          = {10.1109/SAMOS.2017.8344623},
  timestamp    = {Tue, 27 Apr 2021 15:13:55 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/AguilarLAE17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/OnnebrinkWKLAMS17,
  author       = {Gereon Onnebrink and
                  Florian Walbroel and
                  Jonathan Klimt and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Luis Gabriel Murillo and
                  Stefan Sch{\"{u}}rmans and
                  Xiaotao Chen and
                  YwhPyng Harn},
  editor       = {Yale N. Patt and
                  S. K. Nandy},
  title        = {DVFS-enabled power-performance trade-off in MPSoC {SW} application
                  mapping},
  booktitle    = {2017 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July
                  17-20, 2017},
  pages        = {196--202},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/SAMOS.2017.8344628},
  doi          = {10.1109/SAMOS.2017.8344628},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/OnnebrinkWKLAMS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/hwswco/LeupersAECS17,
  author       = {Rainer Leupers and
                  Miguel Angel Aguilar and
                  Juan Fernando Eusse and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Weihua Sheng},
  editor       = {Soonhoi Ha and
                  J{\"{u}}rgen Teich},
  title        = {{MAPS:} {A} Software Development Environment for Embedded Multicore
                  Applications},
  booktitle    = {Handbook of Hardware/Software Codesign},
  pages        = {917--949},
  publisher    = {Springer},
  year         = {2017},
  url          = {https://doi.org/10.1007/978-94-017-7267-9\_2},
  doi          = {10.1007/978-94-017-7267-9\_2},
  timestamp    = {Tue, 06 Aug 2019 10:05:03 +0200},
  biburl       = {https://dblp.org/rec/reference/hwswco/LeupersAECS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/GoensCOL16,
  author       = {Andres Goens and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Maximilian Odendahl and
                  Rainer Leupers},
  title        = {An optimal allocation of memory buffers for complex multicore platforms},
  journal      = {J. Syst. Archit.},
  volume       = {66-67},
  pages        = {69--83},
  year         = {2016},
  url          = {https://doi.org/10.1016/j.sysarc.2016.05.002},
  doi          = {10.1016/J.SYSARC.2016.05.002},
  timestamp    = {Mon, 24 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/GoensCOL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/PaolucciBMRSTBB16,
  author       = {Pier Stanislao Paolucci and
                  Andrea Biagioni and
                  Luis Gabriel Murillo and
                  Fr{\'{e}}d{\'{e}}ric Rousseau and
                  Lars Schor and
                  Laura Tosoratto and
                  Iuliana Bacivarov and
                  Robert Lajos B{\"{u}}cs and
                  Cl{\'{e}}ment Deschamps and
                  Ashraf El Antably and
                  Roberto Ammendola and
                  Nicolas Fournel and
                  Ottorino Frezza and
                  Rainer Leupers and
                  Francesca Lo Cicero and
                  Alessandro Lonardo and
                  Michele Martinelli and
                  Elena Pastorelli and
                  Devendra Rai and
                  Davide Rossetti and
                  Francesco Simula},
  title        = {Dynamic many-process applications on many-tile embedded systems and
                  {HPC} clusters: The {EURETILE} programming environment and execution
                  platforms},
  journal      = {J. Syst. Archit.},
  volume       = {69},
  pages        = {29--53},
  year         = {2016},
  url          = {https://doi.org/10.1016/j.sysarc.2015.11.008},
  doi          = {10.1016/J.SYSARC.2015.11.008},
  timestamp    = {Mon, 04 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/PaolucciBMRSTBB16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/GuntherLA16,
  author       = {Daniel G{\"{u}}nther and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {A Scalable, Multimode {SVD} Precoding {ASIC} Based on the Cyclic Jacobi
                  Method},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {63-I},
  number       = {8},
  pages        = {1283--1294},
  year         = {2016},
  url          = {https://doi.org/10.1109/TCSI.2016.2561904},
  doi          = {10.1109/TCSI.2016.2561904},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/GuntherLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MurilloBLA16,
  author       = {Luis Gabriel Murillo and
                  Robert Lajos B{\"{u}}cs and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {MPSoC Software Debugging on Virtual Platforms via Execution Control
                  with Event Graphs},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {16},
  number       = {1},
  pages        = {7:1--7:25},
  year         = {2016},
  url          = {http://dl.acm.org/citation.cfm?id=2950052},
  timestamp    = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/MurilloBLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SchurmansOLAC16,
  author       = {Stefan Sch{\"{u}}rmans and
                  Gereon Onnebrink and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Xiaotao Chen},
  title        = {Frequency-Aware {ESL} Power Estimation for {ARM} Cortex-A9 Using a
                  Black Box Processor Model},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {16},
  number       = {1},
  pages        = {26:1--26:26},
  year         = {2016},
  url          = {http://dl.acm.org/citation.cfm?id=2987375},
  timestamp    = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/SchurmansOLAC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WeinstockMLA16,
  author       = {Jan Henrik Weinstock and
                  Luis Gabriel Murillo and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Parallel SystemC Simulation for {ESL} Design},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {16},
  number       = {1},
  pages        = {27:1--27:25},
  year         = {2016},
  url          = {http://dl.acm.org/citation.cfm?id=2987374},
  timestamp    = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/WeinstockMLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/GuntherLA16,
  author       = {Daniel G{\"{u}}nther and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Efficiency Enablers of Lightweight {SDR} for {MIMO} Baseband Processing},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {24},
  number       = {2},
  pages        = {567--577},
  year         = {2016},
  url          = {https://doi.org/10.1109/TVLSI.2015.2416244},
  doi          = {10.1109/TVLSI.2015.2416244},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/GuntherLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/MarcuBGAWLWGNCB16,
  author       = {Marius Marcu and
                  Oana Boncalo and
                  Madalin Ghenea and
                  Alexandru Amaricai and
                  Jan Weinstock and
                  Rainer Leupers and
                  Zheng Wang and
                  Giorgis Georgakoudis and
                  Dimitrios S. Nikolopoulos and
                  Cosmin Cernazanu{-}Glavan and
                  Lucian Bara and
                  Marian Ionascu},
  editor       = {Frank Hannig and
                  Jo{\~{a}}o M. P. Cardoso and
                  Thilo Pionteck and
                  Dietmar Fey and
                  Wolfgang Schr{\"{o}}der{-}Preikschat and
                  J{\"{u}}rgen Teich},
  title        = {Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting},
  booktitle    = {Architecture of Computing Systems - {ARCS} 2016 - 29th International
                  Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {9637},
  pages        = {277--289},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-30695-7\_21},
  doi          = {10.1007/978-3-319-30695-7\_21},
  timestamp    = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/arcs/MarcuBGAWLWGNCB16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AguilarLAM16,
  author       = {Miguel Angel Aguilar and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Luis Gabriel Murillo},
  title        = {Automatic parallelization and accelerator offloading for embedded
                  applications on heterogeneous MPSoCs},
  booktitle    = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
                  2016, Austin, TX, USA, June 5-9, 2016},
  pages        = {49:1--49:6},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2897937.2897991},
  doi          = {10.1145/2897937.2897991},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/AguilarLAM16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WeinstockLAPH16,
  author       = {Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Dietmar Petras and
                  Andreas Hoffmann},
  editor       = {Luca Fanucci and
                  J{\"{u}}rgen Teich},
  title        = {SystemC-link: Parallel SystemC simulation using time-decoupled segments},
  booktitle    = {2016 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
  pages        = {493--498},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://ieeexplore.ieee.org/document/7459360/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/WeinstockLAPH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Leupers16,
  author       = {Rainer Leupers},
  editor       = {Luca Fanucci and
                  J{\"{u}}rgen Teich},
  title        = {Technology Transfer in computing systems: The {TETRACOM} approach},
  booktitle    = {2016 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
  pages        = {834--837},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://ieeexplore.ieee.org/document/7459423/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/Leupers16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GuntherHLA16,
  author       = {Daniel G{\"{u}}nther and
                  Tomas Henriksson and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Luca Fanucci and
                  J{\"{u}}rgen Teich},
  title        = {Mantissa-masking for energy-efficient floating-point {LTE} uplink
                  {MIMO} baseband processing},
  booktitle    = {2016 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
  pages        = {1028--1029},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://ieeexplore.ieee.org/document/7459460/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/GuntherHLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/OnnebrinkSWLACH16,
  author       = {Gereon Onnebrink and
                  Stefan Sch{\"{u}}rmans and
                  Florian Walbroel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Xiaotao Chen and
                  YwhPyng Harn},
  title        = {Black box power estimation for digital signal processors using virtual
                  platforms},
  booktitle    = {Proceedings of the 2016 Workshop on Rapid Simulation and Performance
                  Evaluation - Methods and Tools, RAPIDO@HiPEAC 2016, Prague, Czech
                  Republic, January 18, 2016},
  pages        = {6:1--6:6},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2852339.2852345},
  doi          = {10.1145/2852339.2852345},
  timestamp    = {Tue, 06 Nov 2018 16:58:21 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/OnnebrinkSWLACH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/AurasBPLA16,
  author       = {Dominik Auras and
                  Sebastian Birke and
                  Tobias Piwczyk and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {A flexible {MCMC} detector {ASIC}},
  booktitle    = {International SoC Design Conference, {ISOCC} 2016, Jeju, South Korea,
                  October 23-26, 2016},
  pages        = {285--286},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISOCC.2016.7799789},
  doi          = {10.1109/ISOCC.2016.7799789},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isocc/AurasBPLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/AurasLA16,
  author       = {Dominik Auras and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {ORVD-Trellis based {MIMO} detection},
  booktitle    = {14th {IEEE} International New Circuits and Systems Conference, {NEWCAS}
                  2016, Vancouver, BC, Canada, June 26-29, 2016},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/NEWCAS.2016.7604748},
  doi          = {10.1109/NEWCAS.2016.7604748},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/newcas/AurasLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/EusseFLA16,
  author       = {Juan Fernando Eusse and
                  Francisco Fernandez and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Walid A. Najjar and
                  Andreas Gerstlauer},
  title        = {Concurrent memory subsystem and application optimization for {ASIP}
                  design},
  booktitle    = {International Conference on Embedded Computer Systems: Architectures,
                  Modeling and Simulation, {SAMOS} 2016, Agios Konstantinos, Samos Island,
                  Greece, July 17-21, 2016},
  pages        = {1--10},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SAMOS.2016.7818325},
  doi          = {10.1109/SAMOS.2016.7818325},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/EusseFLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/BlancoRAL16,
  author       = {Maria H. Rodriguez Blanco and
                  Georg Reinke and
                  Gerd Ascheid and
                  Rainer Leupers},
  editor       = {Walid A. Najjar and
                  Andreas Gerstlauer},
  title        = {Automatic recognition of computational kernels for platform-dependent
                  code optimizations},
  booktitle    = {International Conference on Embedded Computer Systems: Architectures,
                  Modeling and Simulation, {SAMOS} 2016, Agios Konstantinos, Samos Island,
                  Greece, July 17-21, 2016},
  pages        = {11--20},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SAMOS.2016.7818326},
  doi          = {10.1109/SAMOS.2016.7818326},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/BlancoRAL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/OnnebrinkLAS16,
  author       = {Gereon Onnebrink and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Stefan Sch{\"{u}}rmans},
  editor       = {Walid A. Najjar and
                  Andreas Gerstlauer},
  title        = {Black box {ESL} power estimation for loosely-timed {TLM} models},
  booktitle    = {International Conference on Embedded Computer Systems: Architectures,
                  Modeling and Simulation, {SAMOS} 2016, Agios Konstantinos, Samos Island,
                  Greece, July 17-21, 2016},
  pages        = {366--371},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SAMOS.2016.7818374},
  doi          = {10.1109/SAMOS.2016.7818374},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/OnnebrinkLAS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/GiraldoWL15,
  author       = {Juan Fernando Eusse Giraldo and
                  Christopher Williams and
                  Rainer Leupers},
  title        = {CoEx: {A} Novel Profiling-Based Algorithm/Architecture Co-Exploration
                  for {ASIP} Design},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {8},
  number       = {3},
  pages        = {17:1--17:16},
  year         = {2015},
  url          = {https://doi.org/10.1145/2629563},
  doi          = {10.1145/2629563},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/GiraldoWL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChenMHCAL15,
  author       = {Xiaolin Chen and
                  Andreas Minwegen and
                  Bilal Syed Hussain and
                  Anupam Chattopadhyay and
                  Gerd Ascheid and
                  Rainer Leupers},
  title        = {Flexible, Efficient Multimode {MIMO} Detection by Using Reconfigurable
                  {ASIP}},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {23},
  number       = {10},
  pages        = {2173--2186},
  year         = {2015},
  url          = {https://doi.org/10.1109/TVLSI.2014.2361206},
  doi          = {10.1109/TVLSI.2014.2361206},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ChenMHCAL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/AguilarL15,
  author       = {Miguel Angel Aguilar and
                  Rainer Leupers},
  title        = {Unified Identification of Multiple Forms of Parallelism in Embedded
                  Applications},
  booktitle    = {2015 International Conference on Parallel Architectures and Compilation,
                  {PACT} 2015, San Francisco, CA, USA, October 18-21, 2015},
  pages        = {482--483},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/PACT.2015.53},
  doi          = {10.1109/PACT.2015.53},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/IEEEpact/AguilarL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MurilloBHLA15,
  author       = {Luis Gabriel Murillo and
                  Robert Lajos B{\"{u}}cs and
                  Daniel Hincapie and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {{SWAT:} Assertion-based debugging of concurrency issues at system
                  level},
  booktitle    = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2015, Chiba, Japan, January 19-22, 2015},
  pages        = {600--605},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ASPDAC.2015.7059074},
  doi          = {10.1109/ASPDAC.2015.7059074},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/MurilloBHLA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bdas/TarakjiHG0L15,
  author       = {Ayman Tarakji and
                  Marwan Hassani and
                  Lyubomir Georgiev and
                  Thomas Seidl and
                  Rainer Leupers},
  editor       = {Stanislaw Kozielski and
                  Dariusz Mrozek and
                  Pawel Kasprowski and
                  Bozena Malysiak{-}Mrozek and
                  Daniel Kostrzewa},
  title        = {Parallel Density-Based Stream Clustering Using a Multi-user {GPU}
                  Scheduler},
  booktitle    = {Beyond Databases, Architectures and Structures - 11th International
                  Conference, {BDAS} 2015, Ustro{\'{n}}, Poland, May 26-29, 2015,
                  Proceedings},
  series       = {Communications in Computer and Information Science},
  volume       = {521},
  pages        = {343--360},
  publisher    = {Springer},
  year         = {2015},
  url          = {https://doi.org/10.1007/978-3-319-18422-7\_31},
  doi          = {10.1007/978-3-319-18422-7\_31},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/bdas/TarakjiHG0L15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CastrillonTSSJA15,
  author       = {Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Lothar Thiele and
                  Lars Schor and
                  Weihua Sheng and
                  Ben H. H. Juurlink and
                  Mauricio Alvarez{-}Mesa and
                  Angela Pohl and
                  Ralph Jessenberger and
                  Victor Reyes and
                  Rainer Leupers},
  editor       = {Wolfgang Nebel and
                  David Atienza},
  title        = {Multi/many-core programming: where are we standing?},
  booktitle    = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
                  Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
                  9-13, 2015},
  pages        = {1708--1717},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {http://dl.acm.org/citation.cfm?id=2757208},
  timestamp    = {Fri, 29 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/CastrillonTSSJA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/BucsMKDLARWH15,
  author       = {Robert Lajos B{\"{u}}cs and
                  Luis Gabriel Murillo and
                  Ekaterina Korotcenko and
                  Gaurav Dugge and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Andreas Ropers and
                  Markus Wedler and
                  Andreas Hoffmann},
  title        = {Virtual hardware-in-the-loop co-simulation for multi-domain automotive
                  systems via the functional mock-up interface},
  booktitle    = {2015 Forum on Specification and Design Languages, {FDL} 2015, Barcelona,
                  Spain, September 14-16, 2015},
  pages        = {49--56},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/FDL.2015.7306355},
  doi          = {10.1109/FDL.2015.7306355},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/BucsMKDLARWH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/AguilarELAO15,
  author       = {Miguel Angel Aguilar and
                  Juan Fernando Eusse and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Maximilian Odendahl},
  title        = {Extraction of Kahn Process Networks from While Loops in Embedded Software},
  booktitle    = {17th {IEEE} International Conference on High Performance Computing
                  and Communications, {HPCC} 2015, 7th {IEEE} International Symposium
                  on Cyberspace Safety and Security, {CSS} 2015, and 12th {IEEE} International
                  Conference on Embedded Software and Systems, {ICESS} 2015, New York,
                  NY, USA, August 24-26, 2015},
  pages        = {1078--1085},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/HPCC-CSS-ICESS.2015.158},
  doi          = {10.1109/HPCC-CSS-ICESS.2015.158},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/hpcc/AguilarELAO15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/i2mtc/Cernazanu-Glavan15,
  author       = {Cosmin Cernazanu{-}Glavan and
                  Marius Marcu and
                  Alexandru Amaricai and
                  Stefan Fedeac and
                  Madalin Ghenea and
                  Zheng Wang and
                  Anupam Chattopadhyay and
                  Jan Weinstock and
                  Rainer Leupers},
  title        = {Direct FPGA-based power profiling for a {RISC} processor},
  booktitle    = {2015 {IEEE} International Instrumentation and Measurement Technology
                  Conference {(I2MTC)} Proceedings, Pisa, Italy, May 11-14, 2015},
  pages        = {1578--1583},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/I2MTC.2015.7151514},
  doi          = {10.1109/I2MTC.2015.7151514},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/i2mtc/Cernazanu-Glavan15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/OdendahlGLAH15,
  author       = {Maximilian Odendahl and
                  Andres Goens and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Tomas Henriksson},
  title        = {Buffer Allocation Based On-Chip Memory Optimization for Many-Core
                  Platforms},
  booktitle    = {2015 {IEEE} International Parallel and Distributed Processing Symposium
                  Workshop, {IPDPS} 2015, Hyderabad, India, May 25-29, 2015},
  pages        = {1119--1124},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/IPDPSW.2015.67},
  doi          = {10.1109/IPDPSW.2015.67},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipps/OdendahlGLAH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/TarakjiBL15,
  author       = {Ayman Tarakji and
                  Lukas B{\"{o}}rger and
                  Rainer Leupers},
  editor       = {David R. Kaeli and
                  John Cavazos},
  title        = {A comparative investigation of device-specific mechanisms for exploiting
                  {HPC} accelerators},
  booktitle    = {Proceedings of the 8th Workshop on General Purpose Processing using
                  GPUs, GPGPU@PPoPP 2015, San Francisco, CA, USA, February 7, 2015},
  pages        = {1--12},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2716282.2716293},
  doi          = {10.1145/2716282.2716293},
  timestamp    = {Sun, 12 Jun 2022 19:46:08 +0200},
  biburl       = {https://dblp.org/rec/conf/ppopp/TarakjiBL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/RakossyANALC15,
  author       = {Zolt{\'{a}}n Endre R{\'{a}}kossy and
                  Axel Acosta{-}Aponte and
                  Tobias G. Noll and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Anupam Chattopadhyay},
  editor       = {Michael H{\"{u}}bner and
                  Maya B. Gokhale and
                  Ren{\'{e}} Cumplido},
  title        = {Design and synthesis of reconfigurable control-flow structures for
                  {CGRA}},
  booktitle    = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
                  2015, Riviera Maya, Mexico, December 7-9, 2015},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ReConFig.2015.7393298},
  doi          = {10.1109/RECONFIG.2015.7393298},
  timestamp    = {Tue, 22 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/RakossyANALC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/AguilarERLASS15,
  author       = {Miguel Angel Aguilar and
                  Juan Fernando Eusse and
                  Projjol Ray and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Weihua Sheng and
                  Prashant Sharma},
  editor       = {Dimitrios Soudris and
                  Luigi Carro},
  title        = {Parallelism extraction in embedded software for android devices},
  booktitle    = {2015 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
                  2015},
  pages        = {9--17},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SAMOS.2015.7363654},
  doi          = {10.1109/SAMOS.2015.7363654},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/AguilarERLASS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/MurilloBLA15,
  author       = {Luis Gabriel Murillo and
                  Robert Lajos B{\"{u}}cs and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Dimitrios Soudris and
                  Luigi Carro},
  title        = {Deterministic event-based control of Virtual Platforms for MPSoC software
                  debugging},
  booktitle    = {2015 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
                  2015},
  pages        = {348--353},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SAMOS.2015.7363697},
  doi          = {10.1109/SAMOS.2015.7363697},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/MurilloBLA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SchurmansOLAC15,
  author       = {Stefan Sch{\"{u}}rmans and
                  Gereon Onnebrink and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Xiaotao Chen},
  editor       = {Dimitrios Soudris and
                  Luigi Carro},
  title        = {{ESL} power estimation using virtual platforms with black box processor
                  models},
  booktitle    = {2015 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
                  2015},
  pages        = {354--359},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SAMOS.2015.7363698},
  doi          = {10.1109/SAMOS.2015.7363698},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/SchurmansOLAC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/WeinstockLA15,
  author       = {Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Dimitrios Soudris and
                  Luigi Carro},
  title        = {Parallel SystemC simulation for {ESL} design using flexible time decoupling},
  booktitle    = {2015 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
                  2015},
  pages        = {378--383},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SAMOS.2015.7363702},
  doi          = {10.1109/SAMOS.2015.7363702},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/WeinstockLA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/AguilarLAK15,
  author       = {Miguel Angel Aguilar and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Nikolaos Kavvadias},
  editor       = {Henk Corporaal and
                  Sander Stuijk},
  title        = {A Toolflow for Parallelization of Embedded Software in Multicore {DSP}
                  Platforms},
  booktitle    = {Proceedings of the 18th International Workshop on Software and Compilers
                  for Embedded Systems, {SCOPES} 2015, Sankt Goar, Germany, June 1-3,
                  2015},
  pages        = {76--79},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2764967.2771936},
  doi          = {10.1145/2764967.2771936},
  timestamp    = {Tue, 06 Nov 2018 16:58:57 +0100},
  biburl       = {https://dblp.org/rec/conf/scopes/AguilarLAK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/EusseMMLA15,
  author       = {Juan Fernando Eusse and
                  Luis Gabriel Murillo and
                  Christopher McGirr and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Henk Corporaal and
                  Sander Stuijk},
  title        = {Application-Specific Architecture Exploration Based on Processor-Agnostic
                  Performance Estimation},
  booktitle    = {Proceedings of the 18th International Workshop on Software and Compilers
                  for Embedded Systems, {SCOPES} 2015, Sankt Goar, Germany, June 1-3,
                  2015},
  pages        = {84--87},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2764967.2771932},
  doi          = {10.1145/2764967.2771932},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/scopes/EusseMMLA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/WeinstockLA15,
  author       = {Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Henk Corporaal and
                  Sander Stuijk},
  title        = {Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC
                  Simulator},
  booktitle    = {Proceedings of the 18th International Workshop on Software and Compilers
                  for Embedded Systems, {SCOPES} 2015, Sankt Goar, Germany, June 1-3,
                  2015},
  pages        = {129--132},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2764967.2771929},
  doi          = {10.1145/2764967.2771929},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/scopes/WeinstockLA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/trustcom/TarakjiGAL15,
  author       = {Ayman Tarakji and
                  Alexander Gladis and
                  Tarek Anwar and
                  Rainer Leupers},
  title        = {Enhanced {GPU} Resource Utilization through Fairness-aware Task Scheduling},
  booktitle    = {2015 {IEEE} TrustCom/BigDataSE/ISPA, Helsinki, Finland, August 20-22,
                  2015, Volume 3},
  pages        = {45--52},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/Trustcom.2015.611},
  doi          = {10.1109/TRUSTCOM.2015.611},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/trustcom/TarakjiGAL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/RakossySALC15,
  author       = {Zolt{\'{a}}n Endre R{\'{a}}kossy and
                  Dominik Stengele and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Anupam Chattopadhyay},
  title        = {Exploiting scalable {CGRA} mapping of {LU} for energy efficiency using
                  the Layers architecture},
  booktitle    = {2015 {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
  pages        = {337--342},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSI-SoC.2015.7314440},
  doi          = {10.1109/VLSI-SOC.2015.7314440},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/RakossySALC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/ShengSOBVLA14,
  author       = {Weihua Sheng and
                  Stefan Sch{\"{u}}rmans and
                  Maximilian Odendahl and
                  Mark Bertsch and
                  Vitaliy Volevach and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {A compiler infrastructure for embedded heterogeneous MPSoCs},
  journal      = {Parallel Comput.},
  volume       = {40},
  number       = {2},
  pages        = {51--68},
  year         = {2014},
  url          = {https://doi.org/10.1016/j.parco.2013.11.007},
  doi          = {10.1016/J.PARCO.2013.11.007},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/pc/ShengSOBVLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SchumacherWLATL14,
  author       = {Christoph Schumacher and
                  Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Laura Tosoratto and
                  Alessandro Lonardo and
                  Dietmar Petras and
                  Andreas Hoffmann},
  title        = {legaSCi: Legacy SystemC Model Integration into Parallel Simulators},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {13},
  number       = {5s},
  pages        = {165:1--165:24},
  year         = {2014},
  url          = {https://doi.org/10.1145/2678018},
  doi          = {10.1145/2678018},
  timestamp    = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/SchumacherWLATL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/EusseLASLS14,
  author       = {Juan Fernando Eusse and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Patrick Sudowe and
                  Bastian Leibe and
                  Tamon Sadasue},
  editor       = {Gerhard P. Fettweis and
                  Wolfgang Nebel},
  title        = {A flexible {ASIP} architecture for connected components labeling in
                  embedded vision applications},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2014, Dresden, Germany, March 24-28, 2014},
  pages        = {1--6},
  publisher    = {European Design and Automation Association},
  year         = {2014},
  url          = {https://doi.org/10.7873/DATE.2014.367},
  doi          = {10.7873/DATE.2014.367},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/EusseLASLS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersWLRSFCJ14,
  author       = {Rainer Leupers and
                  Norbert Wehn and
                  Marco Roodzant and
                  Johannes Stahl and
                  Luca Fanucci and
                  Albert Cohen and
                  Bernd Janson},
  editor       = {Gerhard P. Fettweis and
                  Wolfgang Nebel},
  title        = {Technology transfer towards Horizon 2020},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2014, Dresden, Germany, March 24-28, 2014},
  pages        = {1},
  publisher    = {European Design and Automation Association},
  year         = {2014},
  url          = {https://doi.org/10.7873/DATE.2014.049},
  doi          = {10.7873/DATE.2014.049},
  timestamp    = {Tue, 21 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/LeupersWLRSFCJ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MurilloWCLA14,
  author       = {Luis Gabriel Murillo and
                  Simon Wawroschek and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Gerhard P. Fettweis and
                  Wolfgang Nebel},
  title        = {Automatic detection of concurrency bugs through event ordering constraints},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2014, Dresden, Germany, March 24-28, 2014},
  pages        = {1--6},
  publisher    = {European Design and Automation Association},
  year         = {2014},
  url          = {https://doi.org/10.7873/DATE.2014.295},
  doi          = {10.7873/DATE.2014.295},
  timestamp    = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/MurilloWCLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/OdendahlGLARVH14,
  author       = {Maximilian Odendahl and
                  Andres Goens and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Benjamin Ries and
                  Berthold V{\"{o}}cking and
                  Tomas Henriksson},
  editor       = {Gerhard P. Fettweis and
                  Wolfgang Nebel},
  title        = {Optimized buffer allocation in multicore platforms},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2014, Dresden, Germany, March 24-28, 2014},
  pages        = {1--6},
  publisher    = {European Design and Automation Association},
  year         = {2014},
  url          = {https://doi.org/10.7873/DATE.2014.337},
  doi          = {10.7873/DATE.2014.337},
  timestamp    = {Tue, 23 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/OdendahlGLARVH14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WeinstockSLAT14,
  author       = {Jan Henrik Weinstock and
                  Christoph Schumacher and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Laura Tosoratto},
  editor       = {Gerhard P. Fettweis and
                  Wolfgang Nebel},
  title        = {Time-decoupled parallel SystemC simulation},
  booktitle    = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
                  {DATE} 2014, Dresden, Germany, March 24-28, 2014},
  pages        = {1--4},
  publisher    = {European Design and Automation Association},
  year         = {2014},
  url          = {https://doi.org/10.7873/DATE.2014.204},
  doi          = {10.7873/DATE.2014.204},
  timestamp    = {Tue, 23 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/WeinstockSLAT14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AurasRLA14,
  author       = {Dominik Auras and
                  Dominik Rieth and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Joseph R. Cavallaro and
                  Tong Zhang and
                  Alex K. Jones and
                  Hai (Helen) Li},
  title        = {{VLSI} implementation of linear {MIMO} detection with boosted communications
                  performance: extended abstract},
  booktitle    = {Great Lakes Symposium on {VLSI} 2014, {GLSVLSI} '14, Houston, TX,
                  {USA} - May 21 - 23, 2014},
  pages        = {71--72},
  publisher    = {{ACM}},
  year         = {2014},
  url          = {https://doi.org/10.1145/2591513.2591551},
  doi          = {10.1145/2591513.2591551},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/AurasRLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/AurasLA14,
  author       = {Dominik Auras and
                  Rainer Leupers and
                  Gerd H. Ascheid},
  title        = {A novel reduced-complexity soft-input soft-output {MMSE} {MIMO} detector:
                  Algorithm and efficient {VLSI} architecture},
  booktitle    = {{IEEE} International Conference on Communications, {ICC} 2014, Sydney,
                  Australia, June 10-14, 2014},
  pages        = {4722--4728},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ICC.2014.6884067},
  doi          = {10.1109/ICC.2014.6884067},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/icc/AurasLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipccc/RiesUOL14,
  author       = {Benjamin Ries and
                  Walter Unger and
                  Maximilian Odendahl and
                  Rainer Leupers},
  title        = {A heuristic for logical data buffer allocation in multicore platforms},
  booktitle    = {{IEEE} 33rd International Performance Computing and Communications
                  Conference, {IPCCC} 2014, Austin, TX, USA, December 5-7, 2014},
  pages        = {1--2},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/PCCC.2014.7017040},
  doi          = {10.1109/PCCC.2014.7017040},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipccc/RiesUOL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AurasLA14,
  author       = {Dominik Auras and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Efficient {VLSI} architectures for matrix inversion in soft-input
                  soft-output {MMSE} {MIMO} detectors},
  booktitle    = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
                  Melbourne, Victoria, Australia, June 1-5, 2014},
  pages        = {1018--1021},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISCAS.2014.6865311},
  doi          = {10.1109/ISCAS.2014.6865311},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AurasLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispa/SchorBMPRABFLRTTVW14,
  author       = {Lars Schor and
                  Iuliana Bacivarov and
                  Luis Gabriel Murillo and
                  Pier Stanislao Paolucci and
                  Fr{\'{e}}d{\'{e}}ric Rousseau and
                  Ashraf El Antably and
                  Robert Buecs and
                  Nicolas Fournel and
                  Rainer Leupers and
                  Devendra Rai and
                  Lothar Thiele and
                  Laura Tosoratto and
                  Piero Vicini and
                  Jan Weinstock},
  title        = {{EURETILE} Design Flow: Dynamic and Fault Tolerant Mapping of Multiple
                  Applications Onto Many-Tile Systems},
  booktitle    = {{IEEE} International Symposium on Parallel and Distributed Processing
                  with Applications, {ISPA} 2014, Milan, Italy, August 26-28, 2014},
  pages        = {182--189},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISPA.2014.32},
  doi          = {10.1109/ISPA.2014.32},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispa/SchorBMPRABFLRTTVW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/GuntherBLA14,
  author       = {Daniel G{\"{u}}nther and
                  Andreas Bytyn and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Jari Nurmi and
                  Peeter Ellervee and
                  Dragomir Milojevic and
                  Ondrej Daniel and
                  Tommi Paakki},
  title        = {Energy-efficiency of floating-point and fixed-point {SIMD} cores for
                  {MIMO} processing systems},
  booktitle    = {2014 International Symposium on System-on-Chip, SoC 2014, Tampere,
                  Finland, October 28-29, 2014},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISSOC.2014.6972429},
  doi          = {10.1109/ISSOC.2014.6972429},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/GuntherBLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/AurasLA14,
  author       = {Dominik Auras and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {A Novel Class of Linear {MIMO} Detectors with Boosted Communications
                  Performance: Algorithm and {VLSI} Architecture},
  booktitle    = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
                  FL, USA, July 9-11, 2014},
  pages        = {41--47},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISVLSI.2014.16},
  doi          = {10.1109/ISVLSI.2014.16},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/AurasLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/GiraldoWMLA14,
  author       = {Juan Fernando Eusse Giraldo and
                  Christopher Williams and
                  Luis Gabriel Murillo and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Pre-architectural performance estimation for {ASIP} design based on
                  abstract processor models},
  booktitle    = {XIVth International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos,
                  Greece, July 14-17, 2014},
  pages        = {133--140},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/SAMOS.2014.6893204},
  doi          = {10.1109/SAMOS.2014.6893204},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/GiraldoWMLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/SchurmansZLAC14,
  author       = {Stefan Sch{\"{u}}rmans and
                  Diandian Zhang and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Xiaotao Chen},
  editor       = {Henk Corporaal and
                  Sander Stuijk},
  title        = {Improving {ESL} power models using switching activity information
                  from timed functional models},
  booktitle    = {17th International Workshop on Software and Compilers for Embedded
                  Systems, {SCOPES} '14, Sankt Goar, Germany, June 10-11, 2014},
  pages        = {89--97},
  publisher    = {{ACM}},
  year         = {2014},
  url          = {https://doi.org/10.1145/2609248.2609250},
  doi          = {10.1145/2609248.2609250},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/scopes/SchurmansZLAC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/AurasDLA14,
  author       = {Dominik Auras and
                  Uwe Deidersen and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Lorena Garcia},
  title        = {{VLSI} design of a parallel MCMC-based {MIMO} detector with multiplier-free
                  Gibbs samplers},
  booktitle    = {22nd International Conference on Very Large Scale Integration, VLSI-SoC,
                  Playa del Carmen, Mexico, October 6-8, 2014},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/VLSI-SoC.2014.7004160},
  doi          = {10.1109/VLSI-SOC.2014.7004160},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/AurasDLA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/AurasDLA14a,
  author       = {Dominik Auras and
                  Uwe Deidersen and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Luc Claesen and
                  Mar{\'{\i}}a Teresa Sanz{-}Pascual and
                  Ricardo Reis and
                  Arturo Sarmiento{-}Reyes},
  title        = {A Parallel MCMC-Based {MIMO} Detector: {VLSI} Design and Algorithm},
  booktitle    = {VLSI-SoC: Internet of Things Foundations - 22nd {IFIP} {WG} 10.5/IEEE
                  International Conference on Very Large Scale Integration, VLSI-SoC
                  2014, Playa del Carmen, Mexico, October 6-8, 2014, Revised and Extended
                  Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {464},
  pages        = {149--169},
  publisher    = {Springer},
  year         = {2014},
  url          = {https://doi.org/10.1007/978-3-319-25279-7\_9},
  doi          = {10.1007/978-3-319-25279-7\_9},
  timestamp    = {Tue, 22 Oct 2019 15:21:19 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/AurasDLA14a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ShengSOLA13,
  author       = {Weihua Sheng and
                  Stefan Sch{\"{u}}rmans and
                  Maximilian Odendahl and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Automatic Calibration of Streaming Applications for Software Mapping
                  Exploration},
  journal      = {{IEEE} Des. Test},
  volume       = {30},
  number       = {3},
  pages        = {49--58},
  year         = {2013},
  url          = {https://doi.org/10.1109/MDT.2012.2204852},
  doi          = {10.1109/MDT.2012.2204852},
  timestamp    = {Fri, 13 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/dt/ShengSOLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijertcs/ZhangLCKALV13,
  author       = {Diandian Zhang and
                  Li Lu and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Bart Vanthournout},
  title        = {Efficient Implementation of Application-Aware Spinlock Control in
                  MPSoCs},
  journal      = {Int. J. Embed. Real Time Commun. Syst.},
  volume       = {4},
  number       = {1},
  pages        = {64--84},
  year         = {2013},
  url          = {https://doi.org/10.4018/jertcs.2013010104},
  doi          = {10.4018/JERTCS.2013010104},
  timestamp    = {Sun, 06 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijertcs/ZhangLCKALV13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tii/CastrillonLA13,
  author       = {Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {{MAPS:} Mapping Concurrent Dataflow Applications to Heterogeneous
                  MPSoCs},
  journal      = {{IEEE} Trans. Ind. Informatics},
  volume       = {9},
  number       = {1},
  pages        = {527--545},
  year         = {2013},
  url          = {https://doi.org/10.1109/TII.2011.2173941},
  doi          = {10.1109/TII.2011.2173941},
  timestamp    = {Thu, 21 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tii/CastrillonLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/applepies/DonatiSFECPTBOL13,
  author       = {Massimiliano Donati and
                  Sergio Saponara and
                  Luca Fanucci and
                  Walter Errico and
                  Annamaria Colonna and
                  Giuseppe Piscopiello and
                  Giovanni Tuccio and
                  Franco Bigongiari and
                  Maximilian Odendahl and
                  Rainer Leupers and
                  Antonio Spada and
                  Vincenzo Pii and
                  Elena Cordiviola and
                  Francesco Nuzzolo and
                  Frederic Reiter},
  editor       = {Alessandro De Gloria},
  title        = {A New Space Digital Signal Processor Design},
  booktitle    = {Applications in Electronics Pervading Industry, Environment and Society
                  - {APPLEPIES} 2013, Rome, Italy, March 7-8, 2013},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {289},
  pages        = {51--60},
  publisher    = {Springer},
  year         = {2013},
  url          = {https://doi.org/10.1007/978-3-319-04370-8\_5},
  doi          = {10.1007/978-3-319-04370-8\_5},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/applepies/DonatiSFECPTBOL13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SchurmansZALACW13,
  author       = {Stefan Sch{\"{u}}rmans and
                  Diandian Zhang and
                  Dominik Auras and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Xiaotao Chen and
                  Lun Wang},
  title        = {Creation of {ESL} power models for communication architectures using
                  automatic calibration},
  booktitle    = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
                  TX, USA, May 29 - June 07, 2013},
  pages        = {58:1--58:58},
  publisher    = {{ACM}},
  year         = {2013},
  url          = {https://doi.org/10.1145/2463209.2488804},
  doi          = {10.1145/2463209.2488804},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/SchurmansZALACW13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/ShengVLA13,
  author       = {Weihua Sheng and
                  Vitaliy Volevach and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Embedded Real-Time Application Prototyping Using a Hybrid Multiprocessing
                  Platform},
  booktitle    = {10th {IEEE} International Conference on High Performance Computing
                  and Communications {\&} 2013 {IEEE} International Conference on
                  Embedded and Ubiquitous Computing, {HPCC/EUC} 2013, Zhangjiajie, China,
                  November 13-15, 2013},
  pages        = {1745--1750},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/HPCC.and.EUC.2013.249},
  doi          = {10.1109/HPCC.AND.EUC.2013.249},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/hpcc/ShengVLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/SchumacherWLATLPG13,
  author       = {Christoph Schumacher and
                  Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Laura Tosoratto and
                  Alessandro Lonardo and
                  Dietmar Petras and
                  Thorsten Gr{\"{o}}tker},
  title        = {legaSCi: Legacy SystemC Model Integration into Parallel Systemc Simulators},
  booktitle    = {2013 {IEEE} International Symposium on Parallel {\&} Distributed
                  Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24,
                  2013},
  pages        = {2188--2193},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/IPDPSW.2013.34},
  doi          = {10.1109/IPDPSW.2013.34},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipps/SchumacherWLATLPG13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/OdendahlCVLA13,
  author       = {Maximilian Odendahl and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Vitaliy Volevach and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Jari Nurmi and
                  Peeter Ellervee and
                  Leandro Soares Indrusiak and
                  Olli Vainio and
                  Sarang Thombre and
                  Jussi Raasakka},
  title        = {Split-cost communication model for improved MPSoC application mapping},
  booktitle    = {2013 International Symposium on System on Chip, ISSoC 2013, Tampere,
                  Finland, October 23-24, 2013},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISSoC.2013.6675280},
  doi          = {10.1109/ISSOC.2013.6675280},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/OdendahlCVLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iswcs/GuentherLA13,
  author       = {Daniel G{\"{u}}nther and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Mapping of {MIMO} Receiver Algorithms onto Application-Specific Multi-Core
                  Platforms},
  booktitle    = {{ISWCS} 2013, The Tenth International Symposium on Wireless Communication
                  Systems, Ilmenau, Germany, August 27-30, 2013},
  pages        = {1--5},
  publisher    = {VDE-Verlag / {IEEE}},
  year         = {2013},
  url          = {https://ieeexplore.ieee.org/document/6629868/},
  timestamp    = {Wed, 11 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iswcs/GuentherLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/ShengSOBVLA13,
  author       = {Weihua Sheng and
                  Stefan Sch{\"{u}}rmans and
                  Maximilian Odendahl and
                  Mark Bertsch and
                  Vitaliy Volevach and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Pavan Balaji and
                  Minyi Guo and
                  Zhiyi Huang},
  title        = {A compiler infrastructure for embedded heterogeneous MPSoCs},
  booktitle    = {Proceedings of the 2013 {PPOPP} International Workshop on Programming
                  Models and Applications for Multicores and Manycores, {PMAM} 2013,
                  Shenzhen, China, February 23, 2013},
  pages        = {1--10},
  publisher    = {{ACM}},
  year         = {2013},
  url          = {https://doi.org/10.1145/2442992.2442993},
  doi          = {10.1145/2442992.2442993},
  timestamp    = {Sun, 12 Jun 2022 19:46:08 +0200},
  biburl       = {https://dblp.org/rec/conf/ppopp/ShengSOBVLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/EusseWL13,
  author       = {Juan Fernando Eusse and
                  Christopher Williams and
                  Rainer Leupers},
  title        = {CoEx: {A} novel profiling-based algorithm/architecture co-exploration
                  for {ASIP} design},
  booktitle    = {2013 8th International Workshop on Reconfigurable and Communication-Centric
                  Systems-on-Chip (ReCoSoC), Darmstadt, Germany, July 10-12, 2013},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ReCoSoC.2013.6581520},
  doi          = {10.1109/RECOSOC.2013.6581520},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/recosoc/EusseWL13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rivp/SaponaraDFOLE13,
  author       = {Sergio Saponara and
                  Massimiliano Donati and
                  Luca Fanucci and
                  Maximilian Odendahl and
                  Rainer Leupers and
                  Walter Errico},
  editor       = {Nasser Kehtarnavaz and
                  Matthias F. Carlsohn},
  title        = {{DSPACE} hardware architecture for on-board real-time image/video
                  processing in European space missions},
  booktitle    = {Real-Time Image and Video Processing 2013, Burlingame, CA, USA, February
                  6-7, 2013},
  series       = {{SPIE} Proceedings},
  volume       = {8656},
  pages        = {86560D},
  publisher    = {{SPIE}},
  year         = {2013},
  url          = {https://doi.org/10.1117/12.2002096},
  doi          = {10.1117/12.2002096},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rivp/SaponaraDFOLE13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/sps/LeupersSC13,
  author       = {Rainer Leupers and
                  Weihua Sheng and
                  Jer{\'{o}}nimo Castrill{\'{o}}n},
  editor       = {Shuvra S. Bhattacharyya and
                  Ed F. Deprettere and
                  Rainer Leupers and
                  Jarmo Takala},
  title        = {Software Compilation Techniques for MPSoCs},
  booktitle    = {Handbook of Signal Processing Systems},
  pages        = {1215--1257},
  publisher    = {Springer},
  year         = {2013},
  url          = {https://doi.org/10.1007/978-1-4614-6859-2\_37},
  doi          = {10.1007/978-1-4614-6859-2\_37},
  timestamp    = {Wed, 14 Jun 2017 20:39:06 +0200},
  biburl       = {https://dblp.org/rec/reference/sps/LeupersSC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:reference/sps/2013,
  editor       = {Shuvra S. Bhattacharyya and
                  Ed F. Deprettere and
                  Rainer Leupers and
                  Jarmo Takala},
  title        = {Handbook of Signal Processing Systems},
  publisher    = {Springer},
  year         = {2013},
  url          = {https://doi.org/10.1007/978-1-4614-6859-2},
  doi          = {10.1007/978-1-4614-6859-2},
  isbn         = {978-1-4614-6858-5},
  timestamp    = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/reference/sps/2013.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1305-1459,
  author       = {Pier Stanislao Paolucci and
                  Iuliana Bacivarov and
                  Gert Goossens and
                  Rainer Leupers and
                  Fr{\'{e}}d{\'{e}}ric Rousseau and
                  Christoph Schumacher and
                  Lothar Thiele and
                  Piero Vicini},
  title        = {{EURETILE} 2010-2012 summary: first three years of activity of the
                  European Reference Tiled Experiment},
  journal      = {CoRR},
  volume       = {abs/1305.1459},
  year         = {2013},
  url          = {http://arxiv.org/abs/1305.1459},
  eprinttype    = {arXiv},
  eprint       = {1305.1459},
  timestamp    = {Mon, 04 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1305-1459.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MurilloEJYLA12,
  author       = {Luis Gabriel Murillo and
                  Juan Fernando Eusse and
                  Jovana Jovic and
                  Sergey Yakoushkin and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Patrick Groeneveld and
                  Donatella Sciuto and
                  Soha Hassoun},
  title        = {Synchronization for hybrid MPSoC full-system simulation},
  booktitle    = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
                  Francisco, CA, USA, June 3-7, 2012},
  pages        = {121--126},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2228360.2228383},
  doi          = {10.1145/2228360.2228383},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/MurilloEJYLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/CastrillonTLA12,
  author       = {Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Andreas Tretter and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Patrick Groeneveld and
                  Donatella Sciuto and
                  Soha Hassoun},
  title        = {Communication-aware mapping of {KPN} applications onto heterogeneous
                  MPSoCs},
  booktitle    = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
                  Francisco, CA, USA, June 3-7, 2012},
  pages        = {1266--1271},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2228360.2228597},
  doi          = {10.1145/2228360.2228597},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/CastrillonTLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/JovicYMELA12,
  author       = {Jovana Jovic and
                  Sergey Yakoushkin and
                  Luis Gabriel Murillo and
                  Juan Fernando Eusse and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Wolfgang Rosenstiel and
                  Lothar Thiele},
  title        = {Hybrid simulation for extensible processor cores},
  booktitle    = {2012 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
  pages        = {288--291},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/DATE.2012.6176480},
  doi          = {10.1109/DATE.2012.6176480},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/JovicYMELA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersMPHSKV12,
  author       = {Rainer Leupers and
                  Grant Martin and
                  Roman Plyaskin and
                  Andreas Herkersdorf and
                  Frank Schirrmeister and
                  Tim Kogel and
                  Martin Vaupel},
  editor       = {Wolfgang Rosenstiel and
                  Lothar Thiele},
  title        = {Virtual platforms: Breaking new grounds},
  booktitle    = {2012 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
  pages        = {685--690},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/DATE.2012.6176558},
  doi          = {10.1109/DATE.2012.6176558},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/LeupersMPHSKV12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/WeinstockSLA12,
  author       = {Jan Henrik Weinstock and
                  Christoph Schumacher and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Jan Haase},
  title        = {SCandal: SystemC Analysis for Nondeterminism Anomalies},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {69--88},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_5},
  doi          = {10.1007/978-3-319-01418-0\_5},
  timestamp    = {Sun, 02 Oct 2022 16:01:15 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/WeinstockSLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/SchumacherWLA12,
  author       = {Christoph Schumacher and
                  Jan Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Scandal: Systemc analysis for nondeterminism anomalies},
  booktitle    = {Proceeding of the 2012 Forum on Specification and Design Languages,
                  Vienna, Austria, September 18-20, 2012},
  pages        = {112--119},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://ieeexplore.ieee.org/document/6336995/},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/SchumacherWLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/SchumacherWLA12,
  author       = {Christoph Schumacher and
                  Jan Henrik Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Cause and effect of nondeterministic behavior in sequential and parallel
                  SystemC simulators},
  booktitle    = {2012 {IEEE} International High Level Design Validation and Test Workshop,
                  {HLDVT} 2012, Huntington Beach, CA, USA, November 9-10, 2012},
  pages        = {124--131},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/HLDVT.2012.6418254},
  doi          = {10.1109/HLDVT.2012.6418254},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hldvt/SchumacherWLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/ZhangLCKALV12,
  author       = {Diandian Zhang and
                  Li Lu and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Bart Vanthournout},
  title        = {Application-aware spinlock control using a hardware scheduler in MPSoC
                  platforms},
  booktitle    = {2012 International Symposium on System on Chip, ISSoC 2012, Tampere,
                  Finland, October 10-12, 2012},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSoC.2012.6376352},
  doi          = {10.1109/ISSOC.2012.6376352},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/ZhangLCKALV12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/ShengWSLKWA12,
  author       = {Weihua Sheng and
                  Artur Wiebe and
                  Anastasia Stulova and
                  Rainer Leupers and
                  Bart Kienhuis and
                  Johan Walters and
                  Gerd Ascheid},
  title        = {{FIFO} Exploration in Mapping Streaming Applications onto the {TI}
                  {OMAP3530} Platform: Case Study and Optimizations},
  booktitle    = {{IEEE} 6th International Symposium on Embedded Multicore/Manycore
                  SoCs, MCSoC 2012, Fukushima, Japan, September 20-22, 2012},
  pages        = {51--58},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/MCSoC.2012.15},
  doi          = {10.1109/MCSOC.2012.15},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mcsoc/ShengWSLKWA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/StulovaLA12,
  author       = {Anastasia Stulova and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Throughput driven transformations of Synchronous Data Flows for mapping
                  to heterogeneous MPSoCs},
  booktitle    = {2012 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} XII, Samos, Greece, July 16-19,
                  2012},
  pages        = {144--151},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/SAMOS.2012.6404168},
  doi          = {10.1109/SAMOS.2012.6404168},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/StulovaLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/BorlenghiAWKALM12,
  author       = {Filippo Borlenghi and
                  Dominik Auras and
                  Ernst Martin Witte and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {An FPGA-accelerated testbed for hardware component development in
                  {MIMO} wireless communication systems},
  booktitle    = {2012 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} XII, Samos, Greece, July 16-19,
                  2012},
  pages        = {278--285},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/SAMOS.2012.6404187},
  doi          = {10.1109/SAMOS.2012.6404187},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/BorlenghiAWKALM12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/ScharwachterKLAM11,
  author       = {Hanno Scharw{\"{a}}chter and
                  David Kammler and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {A retargetable framework for compiler/architecture co-development},
  journal      = {Des. Autom. Embed. Syst.},
  volume       = {15},
  number       = {3-4},
  pages        = {311--342},
  year         = {2011},
  url          = {https://doi.org/10.1007/s10617-011-9080-8},
  doi          = {10.1007/S10617-011-9080-8},
  timestamp    = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dafes/ScharwachterKLAM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijertcs/ZhangZCKVAL11,
  author       = {Diandian Zhang and
                  Han Zhang and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Torsten Kempf and
                  Bart Vanthournout and
                  Gerd Ascheid and
                  Rainer Leupers},
  title        = {Optimized Communication Architecture of MPSoCs with a Hardware Scheduler:
                  {A} System-Level Analysis},
  journal      = {Int. J. Embed. Real Time Commun. Syst.},
  volume       = {2},
  number       = {3},
  pages        = {1--20},
  year         = {2011},
  url          = {https://doi.org/10.4018/jertcs.2011070101},
  doi          = {10.4018/JERTCS.2011070101},
  timestamp    = {Sun, 06 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijertcs/ZhangZCKVAL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijertcs/KraemerLPPH11,
  author       = {Stefan Kraemer and
                  Rainer Leupers and
                  Dietmar Petras and
                  Thomas Philipp and
                  Andreas Hoffmann},
  title        = {Checkpointing SystemC-Based Virtual Platforms},
  journal      = {Int. J. Embed. Real Time Commun. Syst.},
  volume       = {2},
  number       = {4},
  pages        = {21--37},
  year         = {2011},
  url          = {https://doi.org/10.4018/jertcs.2011100102},
  doi          = {10.4018/JERTCS.2011100102},
  timestamp    = {Sun, 06 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijertcs/KraemerLPPH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/spe/YounLPLSL11,
  author       = {Jonghee M. Youn and
                  Jongwon Lee and
                  Yunheung Paek and
                  Jongeun Lee and
                  Hanno Scharw{\"{a}}chter and
                  Rainer Leupers},
  title        = {Fast graph-based instruction selection for multi-output instructions},
  journal      = {Softw. Pract. Exp.},
  volume       = {41},
  number       = {6},
  pages        = {717--736},
  year         = {2011},
  url          = {https://doi.org/10.1002/spe.1034},
  doi          = {10.1002/SPE.1034},
  timestamp    = {Thu, 09 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/spe/YounLPLSL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersEMSTC11,
  author       = {Rainer Leupers and
                  Lieven Eeckhout and
                  Grant Martin and
                  Frank Schirrmeister and
                  Nigel P. Topham and
                  Xiaotao Chen},
  title        = {Virtual Manycore platforms: Moving towards 100+ processor cores},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
                  March 14-18, 2011},
  pages        = {715--720},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/DATE.2011.5763121},
  doi          = {10.1109/DATE.2011.5763121},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/LeupersEMSTC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/ShengSOLA11,
  author       = {Weihua Sheng and
                  Stefan Sch{\"{u}}rmans and
                  Maximilian Odendahl and
                  Rainer Leupers and
                  Gerd Ascheid},
  title        = {Automatic calibration of streaming applications for software mapping
                  exploration},
  booktitle    = {2011 International Symposium on System on Chip, SoC 2011, Tampere,
                  Finland, October 31 - November 2, 2011},
  pages        = {136--142},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISSOC.2011.6089217},
  doi          = {10.1109/ISSOC.2011.6089217},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/ShengSOLA11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CastrillonSL11,
  author       = {Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Weihua Sheng and
                  Rainer Leupers},
  editor       = {Luigi Carro and
                  Andy D. Pimentel},
  title        = {Trends in embedded software synthesis},
  booktitle    = {2011 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} XI, Samos, Greece, July 18-21, 2011},
  pages        = {347--354},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/SAMOS.2011.6045483},
  doi          = {10.1109/SAMOS.2011.6045483},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/CastrillonSL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/EngelLAFB11,
  author       = {Felix Engel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Max Ferger and
                  Marcel Beemster},
  editor       = {Henk Corporaal and
                  Sander Stuijk},
  title        = {Enhanced structural analysis for {C} code reconstruction from {IR}
                  code},
  booktitle    = {14th International Workshop on Software and Compilers for Embedded
                  Systems, {SCOPES} '11, St. Goar, Germany, June 27-28, 2011},
  pages        = {21--27},
  publisher    = {{ACM}},
  year         = {2011},
  url          = {https://doi.org/10.1145/1988932.1988936},
  doi          = {10.1145/1988932.1988936},
  timestamp    = {Wed, 18 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/scopes/EngelLAFB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijertcs/KammlerWCBALM10,
  author       = {David Kammler and
                  Ernst Martin Witte and
                  Anupam Chattopadhyay and
                  Bastian Bauwens and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Automatic Generation of Memory Interfaces for ASIPs},
  journal      = {Int. J. Embed. Real Time Commun. Syst.},
  volume       = {1},
  number       = {3},
  pages        = {1--23},
  year         = {2010},
  url          = {https://doi.org/10.4018/jertcs.2010070101},
  doi          = {10.4018/JERTCS.2010070101},
  timestamp    = {Sun, 06 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijertcs/KammlerWCBALM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/KempfWALM10,
  author       = {Torsten Kempf and
                  Stefan Wallentowitz and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Analytical and Simulation-based Design Space Exploration of Software
                  Defined Radios},
  journal      = {Int. J. Parallel Program.},
  volume       = {38},
  number       = {3-4},
  pages        = {303--321},
  year         = {2010},
  url          = {https://doi.org/10.1007/s10766-009-0127-4},
  doi          = {10.1007/S10766-009-0127-4},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ijpp/KempfWALM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/WitteBALM10,
  author       = {Ernst Martin Witte and
                  Filippo Borlenghi and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {A Scalable {VLSI} Architecture for Soft-Input Soft-Output Single Tree-Search
                  Sphere Decoding},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {57-II},
  number       = {9},
  pages        = {706--710},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCSII.2010.2056014},
  doi          = {10.1109/TCSII.2010.2056014},
  timestamp    = {Wed, 27 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/WitteBALM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeupersC10,
  author       = {Rainer Leupers and
                  Jer{\'{o}}nimo Castrill{\'{o}}n},
  title        = {MPSoC programming using the {MAPS} compiler},
  booktitle    = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
                  {ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
  pages        = {897--902},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ASPDAC.2010.5419677},
  doi          = {10.1109/ASPDAC.2010.5419677},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/LeupersC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/SchumacherLPH10,
  author       = {Christoph Schumacher and
                  Rainer Leupers and
                  Dietmar Petras and
                  Andreas Hoffmann},
  editor       = {Tony Givargis and
                  Adam Donlin},
  title        = {parSC: synchronous parallel systemc simulation on multi-core host
                  architectures},
  booktitle    = {Proceedings of the 8th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2010, part of ESWeek '10
                  Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010},
  pages        = {241--246},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1878961.1879005},
  doi          = {10.1145/1878961.1879005},
  timestamp    = {Mon, 26 Nov 2018 12:14:45 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/SchumacherLPH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CastrillonVSSCLAM10,
  author       = {Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Ricardo Velasquez and
                  Anastasia Stulova and
                  Weihua Sheng and
                  Jianjiang Ceng and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Giovanni De Micheli and
                  Bashir M. Al{-}Hashimi and
                  Wolfgang M{\"{u}}ller and
                  Enrico Macii},
  title        = {Trace-based {KPN} composability analysis for mapping simultaneous
                  applications to MPSoC platforms},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
                  March 8-12, 2010},
  pages        = {753--758},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/DATE.2010.5456950},
  doi          = {10.1109/DATE.2010.5456950},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/date/CastrillonVSSCLAM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersTNKWI10,
  author       = {Rainer Leupers and
                  Lothar Thiele and
                  Xiaoning Nie and
                  Bart Kienhuis and
                  Matthias Weiss and
                  Tsuyoshi Isshiki},
  editor       = {Giovanni De Micheli and
                  Bashir M. Al{-}Hashimi and
                  Wolfgang M{\"{u}}ller and
                  Enrico Macii},
  title        = {Cool MPSoC programming},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
                  March 8-12, 2010},
  pages        = {1488--1493},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/DATE.2010.5457047},
  doi          = {10.1109/DATE.2010.5457047},
  timestamp    = {Tue, 23 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/LeupersTNKWI10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/SchurmansWKAWL10,
  author       = {Stefan Sch{\"{u}}rmans and
                  Elias Weing{\"{a}}rtner and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Klaus Wehrle and
                  Rainer Leupers},
  title        = {Towards Network Centric Development of Embedded Systems},
  booktitle    = {Proceedings of {IEEE} International Conference on Communications,
                  {ICC} 2010, Cape Town, South Africa, 23-27 May 2010},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ICC.2010.5502185},
  doi          = {10.1109/ICC.2010.5502185},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/icc/SchurmansWKAWL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/ZhangZCKALV10,
  author       = {Diandian Zhang and
                  Han Zhang and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Bart Vanthournout},
  title        = {Optimized communication architecture of MPSoCs with a hardware scheduler:
                  {A} system view},
  booktitle    = {2010 International Symposium on System on Chip, SoC 2010, Tampere,
                  September 29-30, 2010},
  pages        = {163--168},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISSOC.2010.5625556},
  doi          = {10.1109/ISSOC.2010.5625556},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/ZhangZCKALV10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SilvanoFCAPZBCC10,
  author       = {Cristina Silvano and
                  William Fornaciari and
                  Stefano Crespi{-}Reghizzi and
                  Giovanni Agosta and
                  Gianluca Palermo and
                  Vittorio Zaccaria and
                  Patrick Bellasi and
                  Fabrizio Castro and
                  Simone Corbetta and
                  Andrea Di Biagio and
                  Ettore Speziale and
                  Michele Tartara and
                  Diego Melpignano and
                  J. M. Zins and
                  David Siorpaes and
                  Heiko H{\"{u}}bert and
                  Benno Stabernack and
                  Jens Brandenburg and
                  Martin Palkovic and
                  Praveen Raghavan and
                  Chantal Ykman{-}Couvreur and
                  Alexandros Bartzas and
                  Sotirios Xydis and
                  Dimitrios Soudris and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Junaid Ansari and
                  Petri M{\"{a}}h{\"{o}}nen and
                  Bart Vanthournout},
  editor       = {Nikolaos S. Voros and
                  Amar Mukherjee and
                  Nicolas Sklavos and
                  Konstantinos Masselos and
                  Michael H{\"{u}}bner},
  title        = {2PARMA: Parallel Paradigms and Run-time Management Techniques for
                  Many-Core Architectures},
  booktitle    = {{VLSI} 2010 Annual Symposium - Selected papers},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {105},
  pages        = {65--79},
  publisher    = {Springer},
  year         = {2010},
  url          = {https://doi.org/10.1007/978-94-007-1488-5\_5},
  doi          = {10.1007/978-94-007-1488-5\_5},
  timestamp    = {Thu, 20 Jan 2022 09:49:09 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/SilvanoFCAPZBCC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SilvanoFCAPZBCCBSTSHSBPRYBXSKALMAMV10,
  author       = {Cristina Silvano and
                  William Fornaciari and
                  Stefano Crespi{-}Reghizzi and
                  Giovanni Agosta and
                  Gianluca Palermo and
                  Vittorio Zaccaria and
                  Patrick Bellasi and
                  Fabrizio Castro and
                  Simone Corbetta and
                  Andrea Di Biagio and
                  Ettore Speziale and
                  Michele Tartara and
                  David Siorpaes and
                  Heiko H{\"{u}}bert and
                  Benno Stabernack and
                  Jens Brandenburg and
                  Martin Palkovic and
                  Praveen Raghavan and
                  Chantal Ykman{-}Couvreur and
                  Alexandros Bartzas and
                  Sotirios Xydis and
                  Dimitrios Soudris and
                  Torsten Kempf and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Junaid Ansari and
                  Petri M{\"{a}}h{\"{o}}nen and
                  Bart Vanthournout},
  title        = {2PARMA: Parallel Paradigms and Run-Time Management Techniques for
                  Many-Core Architectures},
  booktitle    = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7
                  July 2010, Lixouri Kefalonia, Greece},
  pages        = {494--499},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISVLSI.2010.93},
  doi          = {10.1109/ISVLSI.2010.93},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/SilvanoFCAPZBCCBSTSHSBPRYBXSKALMAMV10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/Leupers10,
  author       = {Rainer Leupers},
  editor       = {Ed F. Deprettere and
                  Todor P. Stefanov},
  title        = {System level MPSoC design: a bright future for compiler technology?},
  booktitle    = {13th International Workshop on Software and Compilers for Embedded
                  Systems, {SCOPES} '10, St. Goar, Germany, June 29-30, 2010},
  pages        = {9},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1811212.1811225},
  doi          = {10.1145/1811212.1811225},
  timestamp    = {Fri, 03 May 2019 12:48:52 +0200},
  biburl       = {https://dblp.org/rec/conf/scopes/Leupers10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/daglib/p/LeupersSC10,
  author       = {Rainer Leupers and
                  Weihua Sheng and
                  Jer{\'{o}}nimo Castrill{\'{o}}n},
  editor       = {Shuvra S. Bhattacharyya and
                  Ed F. Deprettere and
                  Rainer Leupers and
                  Jarmo Takala},
  title        = {Software Compilation Techniques for MPSoCs},
  booktitle    = {Handbook of Signal Processing Systems},
  pages        = {639--678},
  publisher    = {Springer},
  year         = {2010},
  url          = {https://doi.org/10.1007/978-1-4419-6345-1\_23},
  doi          = {10.1007/978-1-4419-6345-1\_23},
  timestamp    = {Wed, 14 Jun 2017 20:28:58 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/p/LeupersSC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0028080,
  editor       = {Shuvra S. Bhattacharyya and
                  Ed F. Deprettere and
                  Rainer Leupers and
                  Jarmo Takala},
  title        = {Handbook of Signal Processing Systems},
  publisher    = {Springer},
  year         = {2010},
  url          = {https://doi.org/10.1007/978-1-4419-6345-1},
  doi          = {10.1007/978-1-4419-6345-1},
  isbn         = {978-1-4419-6344-4},
  timestamp    = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/0028080.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/ChattopadhyaySZLAM09,
  author       = {Anupam Chattopadhyay and
                  Arnab Sinha and
                  Diandian Zhang and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {Integrated verification approach during ADL-driven processor design},
  journal      = {Microelectron. J.},
  volume       = {40},
  number       = {7},
  pages        = {1111--1123},
  year         = {2009},
  url          = {https://doi.org/10.1016/j.mejo.2008.05.009},
  doi          = {10.1016/J.MEJO.2008.05.009},
  timestamp    = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mj/ChattopadhyaySZLAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/HohenauerELAM09,
  author       = {Manuel Hohenauer and
                  Felix Engel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {A {SIMD} optimization framework for retargetable compilers},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {6},
  number       = {1},
  pages        = {2:1--2:27},
  year         = {2009},
  url          = {https://doi.org/10.1145/1509864.1509866},
  doi          = {10.1145/1509864.1509866},
  timestamp    = {Wed, 17 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/HohenauerELAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/CengSCSLAM09,
  author       = {Jianjiang Ceng and
                  Weihua Sheng and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Anastasia Stulova and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Wolfgang Rosenstiel and
                  Kazutoshi Wakabayashi},
  title        = {A high-level virtual platform for early MPSoC software development},
  booktitle    = {Proceedings of the 7th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2009, Grenoble, France,
                  October 11-16, 2009},
  pages        = {11--20},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1629435.1629438},
  doi          = {10.1145/1629435.1629438},
  timestamp    = {Mon, 26 Nov 2018 12:14:45 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/CengSCSLAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/GaoHCLAM09,
  author       = {Lei Gao and
                  Jia Huang and
                  Jianjiang Ceng and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Wolfgang Rosenstiel and
                  Kazutoshi Wakabayashi},
  title        = {TotalProf: a fast and accurate retargetable source code profiler},
  booktitle    = {Proceedings of the 7th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2009, Grenoble, France,
                  October 11-16, 2009},
  pages        = {305--314},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1629435.1629477},
  doi          = {10.1145/1629435.1629477},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/GaoHCLAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersVBHDN09,
  author       = {Rainer Leupers and
                  Andras Vajda and
                  Marco Bekooij and
                  Soonhoi Ha and
                  Rainer D{\"{o}}mer and
                  Achim Nohl},
  editor       = {Luca Benini and
                  Giovanni De Micheli and
                  Bashir M. Al{-}Hashimi and
                  Wolfgang M{\"{u}}ller},
  title        = {Programming MPSoC platforms: Road works ahead!},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
                  April 20-24, 2009},
  pages        = {1584--1589},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {http://dl.acm.org/citation.cfm?id=1875000},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/date/LeupersVBHDN09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/CastrillonZKVLA09,
  author       = {Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Diandian Zhang and
                  Torsten Kempf and
                  Bart Vanthournout and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Jaijeet S. Roychowdhury},
  title        = {Task management in MPSoCs: An {ASIP} approach},
  booktitle    = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
                  San Jose, CA, USA, November 2-5, 2009},
  pages        = {587--594},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1687399.1687508},
  doi          = {10.1145/1687399.1687508},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/CastrillonZKVLA09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/KammlerBWALMC09,
  author       = {David Kammler and
                  Bastian Bauwens and
                  Ernst Martin Witte and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Anupam Chattopadhyay},
  title        = {Automatic generation of memory interfaces},
  booktitle    = {2008 {IEEE} International Symposium on System-on-Chip, {SOC} 2009,
                  Tampere, Finland, October 6-7, 2008},
  pages        = {77--82},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/SOCC.2009.5335674},
  doi          = {10.1109/SOCC.2009.5335674},
  timestamp    = {Mon, 06 Apr 2020 12:19:37 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/KammlerBWALMC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/KraemerLPP09,
  author       = {Stefan Kraemer and
                  Rainer Leupers and
                  Dietmar Petras and
                  Thomas Philipp},
  title        = {A checkpoint/restore framework for systemc-based virtual platforms},
  booktitle    = {2008 {IEEE} International Symposium on System-on-Chip, {SOC} 2009,
                  Tampere, Finland, October 6-7, 2008},
  pages        = {161--167},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/SOCC.2009.5335656},
  doi          = {10.1109/SOCC.2009.5335656},
  timestamp    = {Mon, 06 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/KraemerLPP09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/KaruriLAM09,
  author       = {Kingshuk Karuri and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Koen Bertels and
                  Nikitas J. Dimopoulos and
                  Cristina Silvano and
                  Stephan Wong},
  title        = {A Generic Design Flow for Application Specific Processor Customization
                  through Instruction-Set Extensions (ISEs)},
  booktitle    = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
                  9th International Workshop, {SAMOS} 2009, Samos, Greece, July 20-23,
                  2009. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {5657},
  pages        = {204--214},
  publisher    = {Springer},
  year         = {2009},
  url          = {https://doi.org/10.1007/978-3-642-03138-0\_22},
  doi          = {10.1007/978-3-642-03138-0\_22},
  timestamp    = {Tue, 14 May 2019 10:00:45 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/KaruriLAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ssiri/KammlerGALM09,
  author       = {David Kammler and
                  Junqing Guan and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {A Fast and Flexible Platform for Fault Injection and Evaluation in
                  Verilog-Based Simulations},
  booktitle    = {Third {IEEE} International Conference on Secure Software Integration
                  and Reliability Improvement, {SSIRI} 2009, Shanghai, China, July 8-10,
                  2009},
  pages        = {309--314},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/SSIRI.2009.38},
  doi          = {10.1109/SSIRI.2009.38},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ssiri/KammlerGALM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KempfWALM09,
  author       = {Torsten Kempf and
                  Stefan Wallentowitz and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {A Workbench for Analytical and Simulation Based Design Space Exploration
                  of Software Defined Radios},
  booktitle    = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction,
                  The 22nd International Conference on {VLSI} Design, New Delhi, India,
                  5-9 January 2009},
  pages        = {281--286},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/VLSI.Design.2009.24},
  doi          = {10.1109/VLSI.DESIGN.2009.24},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/KempfWALM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0910-3427,
  author       = {Ernst Martin Witte and
                  Filippo Borlenghi and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {A Scalable {VLSI} Architecture for Soft-Input Soft-Output Depth-First
                  Sphere Decoding},
  journal      = {CoRR},
  volume       = {abs/0910.3427},
  year         = {2009},
  url          = {http://arxiv.org/abs/0910.3427},
  eprinttype    = {arXiv},
  eprint       = {0910.3427},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-0910-3427.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/KammlerZSSLAALMM09,
  author       = {David Kammler and
                  Diandian Zhang and
                  Peter Schwabe and
                  Hanno Scharw{\"{a}}chter and
                  Markus Langenberg and
                  Dominik Auras and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Rudolf Mathar and
                  Heinrich Meyr},
  title        = {Designing an {ASIP} for Cryptographic Pairings over Barreto-Naehrig
                  Curves},
  journal      = {{IACR} Cryptol. ePrint Arch.},
  pages        = {56},
  year         = {2009},
  url          = {http://eprint.iacr.org/2009/056},
  timestamp    = {Mon, 11 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iacr/KammlerZSSLAALMM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/WieferinkKZLM08,
  author       = {Andreas Wieferink and
                  Tim Kogel and
                  Olaf Zerres and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {SoC multiprocessor debugging and synchronisation using generic dynamic-connect
                  debugger frontends},
  journal      = {Int. J. Embed. Syst.},
  volume       = {3},
  number       = {3},
  pages        = {109--118},
  year         = {2008},
  url          = {https://doi.org/10.1504/IJES.2008.020292},
  doi          = {10.1504/IJES.2008.020292},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijes/WieferinkKZLM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/KogelDKWLM08,
  author       = {Tim Kogel and
                  Malte Doerper and
                  Torsten Kempf and
                  Andreas Wieferink and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Virtual architecture mapping: a SystemC based methodology for architectural
                  exploration of System-on-Chips},
  journal      = {Int. J. Embed. Syst.},
  volume       = {3},
  number       = {3},
  pages        = {150--159},
  year         = {2008},
  url          = {https://doi.org/10.1504/IJES.2008.020296},
  doi          = {10.1504/IJES.2008.020296},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijes/KogelDKWLM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcp/ZhangCKWALM08,
  author       = {Diandian Zhang and
                  Anupam Chattopadhyay and
                  David Kammler and
                  Ernst Martin Witte and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Power-efficient Instruction Encoding Optimization for Various Architecture
                  Classes},
  journal      = {J. Comput.},
  volume       = {3},
  number       = {3},
  pages        = {25--38},
  year         = {2008},
  url          = {https://doi.org/10.4304/jcp.3.3.25-38},
  doi          = {10.4304/JCP.3.3.25-38},
  timestamp    = {Tue, 15 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcp/ZhangCKWALM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChattopadhyayICRKKLAM08,
  author       = {Anupam Chattopadhyay and
                  Harold Ishebabi and
                  Xiaolin Chen and
                  Zoltan Endre Rakosi and
                  Kingshuk Karuri and
                  David Kammler and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {Prefabrication and postfabrication architecture exploration for partially
                  reconfigurable {VLIW} processors},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {7},
  number       = {4},
  pages        = {40:1--40:31},
  year         = {2008},
  url          = {https://doi.org/10.1145/1376804.1376808},
  doi          = {10.1145/1376804.1376808},
  timestamp    = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/ChattopadhyayICRKKLAM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KaruriCCKHLMA08,
  author       = {Kingshuk Karuri and
                  Anupam Chattopadhyay and
                  Xiaolin Chen and
                  David Kammler and
                  Ling Hao and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Gerd Ascheid},
  title        = {A Design Flow for Architecture Exploration and Implementation of Partially
                  Reconfigurable Processors},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {16},
  number       = {10},
  pages        = {1281--1294},
  year         = {2008},
  url          = {https://doi.org/10.1109/TVLSI.2008.2002685},
  doi          = {10.1109/TVLSI.2008.2002685},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/KaruriCCKHLMA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GaoKKLAM08,
  author       = {Lei Gao and
                  Kingshuk Karuri and
                  Stefan Kraemer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Limor Fix},
  title        = {Multiprocessor performance estimation using hybrid simulation},
  booktitle    = {Proceedings of the 45th Design Automation Conference, {DAC} 2008,
                  Anaheim, CA, USA, June 8-13, 2008},
  pages        = {325--330},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391469.1391552},
  doi          = {10.1145/1391469.1391552},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/GaoKKLAM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/CengCSSLAMIK08,
  author       = {Jianjiang Ceng and
                  Jer{\'{o}}nimo Castrill{\'{o}}n and
                  Weihua Sheng and
                  Hanno Scharw{\"{a}}chter and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Tsuyoshi Isshiki and
                  Hiroaki Kunieda},
  editor       = {Limor Fix},
  title        = {{MAPS:} an integrated framework for MPSoC application parallelization},
  booktitle    = {Proceedings of the 45th Design Automation Conference, {DAC} 2008,
                  Anaheim, CA, USA, June 8-13, 2008},
  pages        = {754--759},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391469.1391663},
  doi          = {10.1145/1391469.1391663},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/CengCSSLAMIK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChattopadhyayCILAM08,
  author       = {Anupam Chattopadhyay and
                  Xiaolin Chen and
                  Harold Ishebabi and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Donatella Sciuto},
  title        = {High-level Modelling and Exploration of Coarse-grained Re-configurable
                  Architectures},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
                  March 10-14, 2008},
  pages        = {1334--1339},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1109/DATE.2008.4484864},
  doi          = {10.1109/DATE.2008.4484864},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ChattopadhyayCILAM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HohenauerELAMBS08,
  author       = {Manuel Hohenauer and
                  Felix Engel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Gerrit Bette and
                  Balpreet Singh},
  editor       = {Donatella Sciuto},
  title        = {Retargetable Code Optimization for Predicated Execution},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
                  March 10-14, 2008},
  pages        = {1492--1497},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1109/DATE.2008.4484885},
  doi          = {10.1109/DATE.2008.4484885},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/HohenauerELAMBS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersAVAV08,
  author       = {Rainer Leupers and
                  Gerd Ascheid and
                  Wilfried Verachtert and
                  Tom Ashby and
                  Arnout Vandecappelle},
  editor       = {Donatella Sciuto},
  title        = {System-Level Design and Application Mapping for Wireless and Multimedia
                  MPSoC Architectures},
  booktitle    = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
                  March 10-14, 2008},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1109/DATE.2008.4484638},
  doi          = {10.1109/DATE.2008.4484638},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/LeupersAVAV08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0017773,
  author       = {Oliver Schliebusch and
                  Heinrich Meyr and
                  Rainer Leupers},
  title        = {Optimized {ASIP} synthesis from architecture description language
                  models},
  publisher    = {Kluwer},
  year         = {2007},
  url          = {https://d-nb.info/981616836},
  isbn         = {978-1-4020-5685-7},
  timestamp    = {Sat, 17 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/0017773.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ScharwachterKWHKCLAM07,
  author       = {Hanno Scharw{\"{a}}chter and
                  David Kammler and
                  Andreas Wieferink and
                  Manuel Hohenauer and
                  Kingshuk Karuri and
                  Jianjiang Ceng and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {{ASIP} architecture exploration for efficient IPSec encryption: {A}
                  case study},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {6},
  number       = {2},
  pages        = {12},
  year         = {2007},
  url          = {https://doi.org/10.1145/1234675.1234679},
  doi          = {10.1145/1234675.1234679},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/ScharwachterKWHKCLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GaoKLAM07,
  author       = {Lei Gao and
                  Stefan Kraemer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Taewhan Kim and
                  Pascal Sainrat and
                  Steven S. Lumetta and
                  Nacho Navarro},
  title        = {A fast and generic hybrid simulation approach using {C} virtual machine},
  booktitle    = {Proceedings of the 2007 International Conference on Compilers, Architecture,
                  and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
                  September 30 - October 3, 2007},
  pages        = {3--12},
  publisher    = {{ACM}},
  year         = {2007},
  url          = {https://doi.org/10.1145/1289881.1289885},
  doi          = {10.1145/1289881.1289885},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/cases/GaoKLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/KraemerGWLAM07,
  author       = {Stefan Kraemer and
                  Lei Gao and
                  Jan Weinstock and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Soonhoi Ha and
                  Kiyoung Choi and
                  Nikil D. Dutt and
                  J{\"{u}}rgen Teich},
  title        = {HySim: a fast simulation framework for embedded software development},
  booktitle    = {Proceedings of the 5th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2007, Salzburg, Austria,
                  September 30 - October 3, 2007},
  pages        = {75--80},
  publisher    = {{ACM}},
  year         = {2007},
  url          = {https://doi.org/10.1145/1289816.1289837},
  doi          = {10.1145/1289816.1289837},
  timestamp    = {Sat, 05 Sep 2020 18:08:48 +0200},
  biburl       = {https://dblp.org/rec/conf/codes/KraemerGWLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ScharwachterYLPAM07,
  author       = {Hanno Scharw{\"{a}}chter and
                  Jonghee M. Youn and
                  Rainer Leupers and
                  Yunheung Paek and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Soonhoi Ha and
                  Kiyoung Choi and
                  Nikil D. Dutt and
                  J{\"{u}}rgen Teich},
  title        = {A code-generator generator for multi-output instructions},
  booktitle    = {Proceedings of the 5th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2007, Salzburg, Austria,
                  September 30 - October 3, 2007},
  pages        = {131--136},
  publisher    = {{ACM}},
  year         = {2007},
  url          = {https://doi.org/10.1145/1289816.1289851},
  doi          = {10.1145/1289816.1289851},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/ScharwachterYLPAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChattopadhyayAKKLAM07,
  author       = {Anupam Chattopadhyay and
                  W. Ahmed and
                  Kingshuk Karuri and
                  David Kammler and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Rudy Lauwereins and
                  Jan Madsen},
  title        = {Design space exploration of partially re-configurable embedded processors},
  booktitle    = {2007 Design, Automation and Test in Europe Conference and Exposition,
                  {DATE} 2007, Nice, France, April 16-20, 2007},
  pages        = {319--324},
  publisher    = {{EDA} Consortium, San Jose, CA, {USA}},
  year         = {2007},
  url          = {https://doi.org/10.1109/DATE.2007.364611},
  doi          = {10.1109/DATE.2007.364611},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ChattopadhyayAKKLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KraemerLAM07,
  author       = {Stefan Kraemer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Rudy Lauwereins and
                  Jan Madsen},
  title        = {Interactive presentation: SoftSIMD - exploiting subword parallelism
                  using source code transformations},
  booktitle    = {2007 Design, Automation and Test in Europe Conference and Exposition,
                  {DATE} 2007, Nice, France, April 16-20, 2007},
  pages        = {1349--1354},
  publisher    = {{EDA} Consortium, San Jose, CA, {USA}},
  year         = {2007},
  url          = {https://dl.acm.org/citation.cfm?id=1266660},
  timestamp    = {Wed, 28 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/KraemerLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KaruriCHLAM07,
  author       = {Kingshuk Karuri and
                  Anupam Chattopadhyay and
                  Manuel Hohenauer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Georges G. E. Gielen},
  title        = {Increasing data-bandwidth to instruction-set extensions through register
                  clustering},
  booktitle    = {2007 International Conference on Computer-Aided Design, {ICCAD} 2007,
                  San Jose, CA, USA, November 5-8, 2007},
  pages        = {166--171},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/ICCAD.2007.4397261},
  doi          = {10.1109/ICCAD.2007.4397261},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/KaruriCHLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChattopadhyayRKKLAM07,
  author       = {Anupam Chattopadhyay and
                  Zoltan Endre Rakosi and
                  Kingshuk Karuri and
                  David Kammler and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable
                  {VLIW} Processors},
  booktitle    = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
                  2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
  pages        = {189--194},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/RSP.2007.32},
  doi          = {10.1109/RSP.2007.32},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rsp/ChattopadhyayRKKLAM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0017076,
  author       = {Tim Kogel and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Integrated system-level modeling of network-on-chip enabled multi-processor
                  platforms},
  publisher    = {Kluwer},
  year         = {2006},
  url          = {https://d-nb.info/979630134},
  isbn         = {978-1-4020-4825-8},
  timestamp    = {Sat, 17 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/0017076.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/OttoniOAL06,
  author       = {Desiree Ottoni and
                  Guilherme Ottoni and
                  Guido Araujo and
                  Rainer Leupers},
  title        = {Offset assignment using simultaneous variable coalescing},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {5},
  number       = {4},
  pages        = {864--883},
  year         = {2006},
  url          = {https://doi.org/10.1145/1196636.1196641},
  doi          = {10.1145/1196636.1196641},
  timestamp    = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/OttoniOAL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/CengSHLAMB06,
  author       = {Jianjiang Ceng and
                  Weihua Sheng and
                  Manuel Hohenauer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Gunnar Braun},
  title        = {Modeling Instruction Semantics in {ADL} Processor Descriptions for
                  {C} Compiler Retargeting},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {43},
  number       = {2-3},
  pages        = {235--246},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-7273-3},
  doi          = {10.1007/S11265-006-7273-3},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/CengSHLAMB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/HohenauerSLAMS06,
  author       = {Manuel Hohenauer and
                  Christoph Schumacher and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Hans van Someren},
  editor       = {Reinaldo A. Bergamaschi and
                  Kiyoung Choi},
  title        = {Retargetable code optimization with {SIMD} instructions},
  booktitle    = {Proceedings of the 4th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2006, Seoul, Korea, October
                  22-25, 2006},
  pages        = {148--153},
  publisher    = {{ACM}},
  year         = {2006},
  url          = {https://doi.org/10.1145/1176254.1176291},
  doi          = {10.1145/1176254.1176291},
  timestamp    = {Tue, 01 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/codes/HohenauerSLAMS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/PaolucciJLTV06,
  author       = {Pier Stanislao Paolucci and
                  Ahmed Amine Jerraya and
                  Rainer Leupers and
                  Lothar Thiele and
                  Piero Vicini},
  editor       = {Reinaldo A. Bergamaschi and
                  Kiyoung Choi},
  title        = {{SHAPES:} : a tiled scalable software hardware architecture platform
                  for embedded systems},
  booktitle    = {Proceedings of the 4th International Conference on Hardware/Software
                  Codesign and System Synthesis, {CODES+ISSS} 2006, Seoul, Korea, October
                  22-25, 2006},
  pages        = {167--172},
  publisher    = {{ACM}},
  year         = {2006},
  url          = {https://doi.org/10.1145/1176254.1176297},
  doi          = {10.1145/1176254.1176297},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/PaolucciJLTV06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KaruriLAMK06,
  author       = {Kingshuk Karuri and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Monu Kedia},
  editor       = {Georges G. E. Gielen},
  title        = {Design and implementation of a modular and portable {IEEE} 754 compliant
                  floating-point unit},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe:
                  Designers' Forum, {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {221--226},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243906},
  doi          = {10.1109/DATE.2006.243906},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/KaruriLAMK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FanucciCSKWSALM06,
  author       = {Luca Fanucci and
                  Michele Cassiano and
                  Sergio Saponara and
                  David Kammler and
                  Ernst Martin Witte and
                  Oliver Schliebusch and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  editor       = {Georges G. E. Gielen},
  title        = {{ASIP} design and synthesis for non linear filtering in image processing},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe:
                  Designers' Forum, {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {233--238},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243908},
  doi          = {10.1109/DATE.2006.243908},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/FanucciCSKWSALM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KempfKWALM06,
  author       = {Torsten Kempf and
                  Kingshuk Karuri and
                  Stefan Wallentowitz and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  editor       = {Georges G. E. Gielen},
  title        = {A {SW} performance estimation framework for early system-level-design
                  using fine-grained instrumentation},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {468--473},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243830},
  doi          = {10.1109/DATE.2006.243830},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/KempfKWALM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersKKP06,
  author       = {Rainer Leupers and
                  Kingshuk Karuri and
                  Stefan Kraemer and
                  Manas Pandey},
  editor       = {Georges G. E. Gielen},
  title        = {A design flow for configurable embedded processors based on optimized
                  instruction set extension synthesis},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {581--586},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243972},
  doi          = {10.1109/DATE.2006.243972},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/LeupersKKP06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChattopadhyayGKWSILAM06,
  author       = {Anupam Chattopadhyay and
                  B. Geukes and
                  David Kammler and
                  Ernst Martin Witte and
                  Oliver Schliebusch and
                  Harold Ishebabi and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Georges G. E. Gielen},
  title        = {Automatic ADL-based operand isolation for embedded processors},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {600--605},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243993},
  doi          = {10.1109/DATE.2006.243993},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ChattopadhyayGKWSILAM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ScharwachterHLAM06,
  author       = {Hanno Scharw{\"{a}}chter and
                  Manuel Hohenauer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Georges G. E. Gielen},
  title        = {An interprocedural code optimization technique for network processors
                  using hardware multi-threading support},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {919--924},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243808},
  doi          = {10.1109/DATE.2006.243808},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/ScharwachterHLAM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AngioliniCLFFB06,
  author       = {Federico Angiolini and
                  Jianjiang Ceng and
                  Rainer Leupers and
                  Federico Ferrari and
                  Cesare Ferri and
                  Luca Benini},
  editor       = {Georges G. E. Gielen},
  title        = {An integrated open framework for heterogeneous MPSoC design space
                  exploration},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {1145--1150},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.244000},
  doi          = {10.1109/DATE.2006.244000},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/AngioliniCLFFB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/KaruriHLAM06,
  author       = {Kingshuk Karuri and
                  Christian Huben and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {Memory Access Micro-Profiling for {ASIP} Design},
  booktitle    = {Third {IEEE} International Workshop on Electronic Design, Test and
                  Applications {(DELTA} 2006), 17-19 January 2006, Kuala Lumpur, Malaysia},
  pages        = {255--262},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/DELTA.2006.63},
  doi          = {10.1109/DELTA.2006.63},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/delta/KaruriHLAM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChattopadhyaySZLAM06,
  author       = {Anupam Chattopadhyay and
                  Arnab Sinha and
                  Diandian Zhang and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  title        = {Integrated Verification Approach during ADL-Driven Processor Design},
  booktitle    = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
                  2006), 14-16 June 2006, Chania, Crete, Greece},
  pages        = {110--118},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/RSP.2006.21},
  doi          = {10.1109/RSP.2006.21},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rsp/ChattopadhyaySZLAM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MozumdarKCKSMAL05,
  author       = {Mohammad Mostafizur Rahman Mozumdar and
                  Kingshuk Karuri and
                  Anupam Chattopadhyay and
                  Stefan Kraemer and
                  Hanno Scharw{\"{a}}chter and
                  Heinrich Meyr and
                  Gerd Ascheid and
                  Rainer Leupers},
  title        = {Instruction Set Customization of Application Specific Processors for
                  Network Processing: {A} Case Study},
  booktitle    = {16th {IEEE} International Conference on Application-Specific Systems,
                  Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
                  Greece},
  pages        = {154--160},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ASAP.2005.41},
  doi          = {10.1109/ASAP.2005.41},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asap/MozumdarKCKSMAL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SchliebuschCKALMK05,
  author       = {Oliver Schliebusch and
                  Anupam Chattopadhyay and
                  David Kammler and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Tim Kogel},
  editor       = {Tingao Tang},
  title        = {A framework for automated and optimized {ASIP} implementation supporting
                  multiple hardware description languages},
  booktitle    = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
                  {ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
  pages        = {280--285},
  publisher    = {{ACM} Press},
  year         = {2005},
  url          = {https://doi.org/10.1145/1120725.1120850},
  doi          = {10.1145/1120725.1120850},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/SchliebuschCKALMK05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/WieferinkLAMMNK05,
  author       = {Andreas Wieferink and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Tom Michiels and
                  Achim Nohl and
                  Tim Kogel},
  editor       = {Petru Eles and
                  Axel Jantsch and
                  Reinaldo A. Bergamaschi},
  title        = {Retargetable generation of {TLM} bus interfaces for MP-SoC platforms},
  booktitle    = {Proceedings of the 3rd {IEEE/ACM/IFIP} International Conference on
                  Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2005,
                  Jersey City, NJ, USA, September 19-21, 2005},
  pages        = {249--254},
  publisher    = {{ACM}},
  year         = {2005},
  url          = {https://doi.org/10.1145/1084834.1084898},
  doi          = {10.1145/1084834.1084898},
  timestamp    = {Mon, 26 Nov 2018 12:14:45 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/WieferinkLAMMNK05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KaruriFKLAM05,
  author       = {Kingshuk Karuri and
                  Mohammad Abdullah Al Faruque and
                  Stefan Kraemer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {William H. Joyner Jr. and
                  Grant Martin and
                  Andrew B. Kahng},
  title        = {Fine-grained application source code profiling for {ASIP} design},
  booktitle    = {Proceedings of the 42nd Design Automation Conference, {DAC} 2005,
                  San Diego, CA, USA, June 13-17, 2005},
  pages        = {329--334},
  publisher    = {{ACM}},
  year         = {2005},
  url          = {https://doi.org/10.1145/1065579.1065666},
  doi          = {10.1145/1065579.1065666},
  timestamp    = {Thu, 25 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/KaruriFKLAM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KempfDLAMKV05,
  author       = {Torsten Kempf and
                  Malte Doerper and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Tim Kogel and
                  Bart Vanthournout},
  title        = {A Modular Simulation Framework for Spatial and Temporal Task Mapping
                  onto Multi-Processor SoC Platforms},
  booktitle    = {2005 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2005), 7-11 March 2005, Munich, Germany},
  pages        = {876--881},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/DATE.2005.21},
  doi          = {10.1109/DATE.2005.21},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/KempfDLAMKV05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CengHLAMB05,
  author       = {Jianjiang Ceng and
                  Manuel Hohenauer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Gunnar Braun},
  title        = {C Compiler Retargeting Based on Instruction Semantics Models},
  booktitle    = {2005 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2005), 7-11 March 2005, Munich, Germany},
  pages        = {1150--1155},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/DATE.2005.88},
  doi          = {10.1109/DATE.2005.88},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/CengHLAMB05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchliebuschCWKALM05,
  author       = {Oliver Schliebusch and
                  Anupam Chattopadhyay and
                  Ernst Martin Witte and
                  David Kammler and
                  Gerd Ascheid and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Optimization Techniques for ADL-Driven {RTL} Processor Synthesis},
  booktitle    = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
                  2005), 8-10 June 2005, Montreal, Canada},
  pages        = {165--171},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RSP.2005.36},
  doi          = {10.1109/RSP.2005.36},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rsp/SchliebuschCWKALM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/necs2005/LeupersA05,
  author       = {Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Dimitrios Hristu{-}Varsakelis and
                  William S. Levine},
  title        = {Digital Signal Processors},
  booktitle    = {Handbook of Networked and Embedded Control Systems},
  pages        = {279--294},
  publisher    = {Birkh{\"{a}}user},
  year         = {2005},
  timestamp    = {Thu, 21 Jul 2005 14:19:27 +0200},
  biburl       = {https://dblp.org/rec/books/sp/necs2005/LeupersA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BraunNHSLM04,
  author       = {Gunnar Braun and
                  Achim Nohl and
                  Andreas Hoffmann and
                  Oliver Schliebusch and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {A universal technique for fast and flexible instruction-set architecture
                  simulation},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {23},
  number       = {12},
  pages        = {1625--1639},
  year         = {2004},
  url          = {https://doi.org/10.1109/TCAD.2004.836734},
  doi          = {10.1109/TCAD.2004.836734},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/BraunNHSLM04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LorenzMDFL04,
  author       = {Markus Lorenz and
                  Peter Marwedel and
                  Thorsten Dr{\"{a}}ger and
                  Gerhard P. Fettweis and
                  Rainer Leupers},
  editor       = {Masaharu Imai},
  title        = {Compiler based exploration of {DSP} energy savings by {SIMD} operations},
  booktitle    = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
                  Electronic Design and Solution Fair 2004, Yokohama, Japan, January
                  27-30, 2004},
  pages        = {838--841},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.71},
  doi          = {10.1109/ASPDAC.2004.71},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/LorenzMDFL04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BraunNSCHSLM04,
  author       = {Gunnar Braun and
                  Achim Nohl and
                  Weihua Sheng and
                  Jianjiang Ceng and
                  Manuel Hohenauer and
                  Hanno Scharw{\"{a}}chter and
                  Rainer Leupers and
                  Heinrich Meyr},
  editor       = {Sharad Malik and
                  Limor Fix and
                  Andrew B. Kahng},
  title        = {A novel approach for flexible and consistent ADL-driven {ASIP} design},
  booktitle    = {Proceedings of the 41th Design Automation Conference, {DAC} 2004,
                  San Diego, CA, USA, June 7-11, 2004},
  pages        = {717--722},
  publisher    = {{ACM}},
  year         = {2004},
  url          = {https://doi.org/10.1145/996566.996763},
  doi          = {10.1145/996566.996763},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/BraunNSCHSLM04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SchliebuschCLAMSBN04,
  author       = {Oliver Schliebusch and
                  Anupam Chattopadhyay and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Mario Steinert and
                  Gunnar Braun and
                  Achim Nohl},
  title        = {{RTL} Processor Synthesis for Architecture Exploration and Implementation},
  booktitle    = {2004 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2004), 16-20 February 2004, Paris, France},
  pages        = {156--160},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/DATE.2004.1269223},
  doi          = {10.1109/DATE.2004.1269223},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/SchliebuschCLAMSBN04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WieferinkKLAMBN04,
  author       = {Andreas Wieferink and
                  Tim Kogel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Gunnar Braun and
                  Achim Nohl},
  title        = {A System Level Processor/Communication Co-Exploration Methodology
                  for Multi-Processor System-on-Chip Platform},
  booktitle    = {2004 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2004), 16-20 February 2004, Paris, France},
  pages        = {1256--1263},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/DATE.2004.1269068},
  doi          = {10.1109/DATE.2004.1269068},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/WieferinkKLAMBN04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HohenauerSKWKLAMBS04,
  author       = {Manuel Hohenauer and
                  Hanno Scharw{\"{a}}chter and
                  Kingshuk Karuri and
                  Oliver Wahlen and
                  Tim Kogel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Gunnar Braun and
                  Hans van Someren},
  title        = {A Methodology and Tool Suite for {C} Compiler Generation from {ADL}
                  Processor Models},
  booktitle    = {2004 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2004), 16-20 February 2004, Paris, France},
  pages        = {1276--1283},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.org/10.1109/DATE.2004.1269071},
  doi          = {10.1109/DATE.2004.1269071},
  timestamp    = {Tue, 01 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/HohenauerSKWKLAMBS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/KogelDKWLAM04,
  author       = {Tim Kogel and
                  Malte Doerper and
                  Torsten Kempf and
                  Andreas Wieferink and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Andy D. Pimentel and
                  Stamatis Vassiliadis},
  title        = {Virtual Architecture Mapping: {A} SystemC Based Methodology for Architectural
                  Exploration of System-on-Chip Designs},
  booktitle    = {Computer Systems: Architectures, Modeling, and Simulation, Third and
                  Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos,
                  Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3133},
  pages        = {138--148},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-27776-7\_15},
  doi          = {10.1007/978-3-540-27776-7\_15},
  timestamp    = {Tue, 14 May 2019 10:00:45 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/KogelDKWLAM04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/WieferinkDKLAM04,
  author       = {Andreas Wieferink and
                  Malte Doerper and
                  Tim Kogel and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Andy D. Pimentel and
                  Stamatis Vassiliadis},
  title        = {Early {ISS} Integration into Network-on-Chip Designs},
  booktitle    = {Computer Systems: Architectures, Modeling, and Simulation, Third and
                  Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos,
                  Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3133},
  pages        = {443--452},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-27776-7\_46},
  doi          = {10.1007/978-3-540-27776-7\_46},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/WieferinkDKLAM04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/CengSHLAMB04,
  author       = {Jianjiang Ceng and
                  Weihua Sheng and
                  Manuel Hohenauer and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Gunnar Braun},
  editor       = {Andy D. Pimentel and
                  Stamatis Vassiliadis},
  title        = {Modeling Instruction Semantics in {ADL} Processor Descriptions for
                  {C} Compiler Retargeting},
  booktitle    = {Computer Systems: Architectures, Modeling, and Simulation, Third and
                  Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos,
                  Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3133},
  pages        = {463--473},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-27776-7\_48},
  doi          = {10.1007/978-3-540-27776-7\_48},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/CengSHLAMB04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/ScharwachterKWHKCLAM04,
  author       = {Hanno Scharw{\"{a}}chter and
                  David Kammler and
                  Andreas Wieferink and
                  Manuel Hohenauer and
                  Kingshuk Karuri and
                  Jianjiang Ceng and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr},
  editor       = {Henk Schepers},
  title        = {{ASIP} Architecture Exploration for Efficient Ipsec Encryption: {A}
                  Case Study},
  booktitle    = {Software and Compilers for Embedded Systems, 8th International Workshop,
                  {SCOPES} 2004, Amsterdam, The Netherlands, September 2-3, 2004, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3199},
  pages        = {33--46},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-30113-4\_4},
  doi          = {10.1007/978-3-540-30113-4\_4},
  timestamp    = {Tue, 14 May 2019 10:00:53 +0200},
  biburl       = {https://dblp.org/rec/conf/scopes/ScharwachterKWHKCLAM04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/WahlenHLM03,
  author       = {Oliver Wahlen and
                  Manuel Hohenauer and
                  Rainer Leupers and
                  Heinrich Meyr},
  title        = {Instruction Scheduler Generation for Retargetable Compilation},
  journal      = {{IEEE} Des. Test Comput.},
  volume       = {20},
  number       = {1},
  pages        = {34--41},
  year         = {2003},
  url          = {https://doi.org/10.1109/MDT.2003.1173051},
  doi          = {10.1109/MDT.2003.1173051},
  timestamp    = {Sun, 17 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dt/WahlenHLM03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cc/Leupers03,
  author       = {Rainer Leupers},
  editor       = {G{\"{o}}rel Hedin},
  title        = {Offset Assignment Showdown: Evaluation of {DSP} Address Code Optimization
                  Algorithms},
  booktitle    = {Compiler Construction, 12th International Conference, {CC} 2003, Held
                  as Part of the Joint European Conferences on Theory and Practice of
                  Software, {ETAPS} 2003, Warsaw, Poland, April 7-11, 2003, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2622},
  pages        = {290--302},
  publisher    = {Springer},
  year         = {2003},
  url          = {https://doi.org/10.1007/3-540-36579-6\_21},
  doi          = {10.1007/3-540-36579-6\_21},
  timestamp    = {Tue, 14 May 2019 10:00:48 +0200},
  biburl       = {https://dblp.org/rec/conf/cc/Leupers03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/KogelDWLAMG03,
  author       = {Tim Kogel and
                  Malte Doerper and
                  Andreas Wieferink and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Serge Goossens},
  editor       = {Rajesh Gupta and
                  Yukihiro Nakamura and
                  Alex Orailoglu and
                  Pai H. Chou},
  title        = {A modular simulation framework for architectural exploration of on-chip
                  interconnection networks},
  booktitle    = {Proceedings of the 1st {IEEE/ACM/IFIP} International Conference on
                  Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2003,
                  Newport Beach, CA, USA, October 1-3, 2003},
  pages        = {7--12},
  publisher    = {{ACM}},
  year         = {2003},
  url          = {https://doi.org/10.1145/944645.944648},
  doi          = {10.1145/944645.944648},
  timestamp    = {Mon, 26 Nov 2018 12:14:45 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/KogelDWLAMG03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/NohlGBALSM03,
  author       = {Achim Nohl and
                  Volker Greive and
                  Gunnar Braun and
                  Andreas Hoffmann and
                  Rainer Leupers and
                  Oliver Schliebusch and
                  Heinrich Meyr},
  title        = {Instruction encoding synthesis for architecture exploration using
                  hierarchical processor models},
  booktitle    = {Proceedings of the 40th Design Automation Conference, {DAC} 2003,
                  Anaheim, CA, USA, June 2-6, 2003},
  pages        = {262--267},
  publisher    = {{ACM}},
  year         = {2003},
  url          = {https://doi.org/10.1145/775832.775898},
  doi          = {10.1145/775832.775898},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/NohlGBALSM03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BraunWSLMN03,
  author       = {Gunnar Braun and
                  Andreas Wieferink and
                  Oliver Schliebusch and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Achim Nohl},
  title        = {Processor/Memory Co-Exploration on Multiple Abstraction Levels},
  booktitle    = {2003 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2003), 3-7 March 2003, Munich, Germany},
  pages        = {10966--10973},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10036},
  doi          = {10.1109/DATE.2003.10036},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/BraunWSLMN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/WahlenHBLAMN03,
  author       = {Oliver Wahlen and
                  Manuel Hohenauer and
                  Gunnar Braun and
                  Rainer Leupers and
                  Gerd Ascheid and
                  Heinrich Meyr and
                  Xiaoning Nie},
  editor       = {Andreas Krall},
  title        = {Extraction of Efficient Instruction Schedulers from Cycle-True Processor
                  Models},
  booktitle    = {Software and Compilers for Embedded Systems, 7th International Workshop,
                  {SCOPES} 2003, Vienna, Austria, September 24-26, 2003, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2826},
  pages        = {167--181},
  publisher    = {Springer},
  year         = {2003},
  url          = {https://doi.org/10.1007/978-3-540-39920-9\_12},
  doi          = {10.1007/978-3-540-39920-9\_12},
  timestamp    = {Tue, 14 May 2019 10:00:53 +0200},
  biburl       = {https://dblp.org/rec/conf/scopes/WahlenHBLAMN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/OttoniOAL03,
  author       = {Desiree Ottoni and
                  Guilherme Ottoni and
                  Guido Araujo and
                  Rainer Leupers},
  editor       = {Andreas Krall},
  title        = {Improving Offset Assignment through Simultaneous Variable Coalescing},
  booktitle    = {Software and Compilers for Embedded Systems, 7th International Workshop,
                  {SCOPES} 2003, Vienna, Austria, September 24-26, 2003, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2826},
  pages        = {285--297},
  publisher    = {Springer},
  year         = {2003},
  url          = {https://doi.org/10.1007/978-3-540-39920-9\_20},
  doi          = {10.1007/978-3-540-39920-9\_20},
  timestamp    = {Wed, 24 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/scopes/OttoniOAL03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0012541,
  author       = {Andreas Hoffmann and
                  Heinrich Meyr and
                  Rainer Leupers},
  title        = {Architecture exploration for embedded processors with {LISA}},
  publisher    = {Kluwer},
  year         = {2002},
  isbn         = {978-1-4020-7338-0},
  timestamp    = {Mon, 08 Jan 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/books/daglib/0012541.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Leupers02,
  author       = {Rainer Leupers},
  title        = {Compiler Design Issues for Embedded Processors},
  journal      = {{IEEE} Des. Test Comput.},
  volume       = {19},
  number       = {4},
  pages        = {51--58},
  year         = {2002},
  url          = {https://doi.org/10.1109/MDT.2002.1018133},
  doi          = {10.1109/MDT.2002.1018133},
  timestamp    = {Sun, 17 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dt/Leupers02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/NohlBSLMH02,
  author       = {Achim Nohl and
                  Gunnar Braun and
                  Oliver Schliebusch and
                  Rainer Leupers and
                  Heinrich Meyr and
                  Andreas Hoffmann},
  title        = {A universal technique for fast and flexible instruction-set architecture
                  simulation},
  booktitle    = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
                  New Orleans, LA, USA, June 10-14, 2002},
  pages        = {22--27},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/513918.513927},
  doi          = {10.1145/513918.513927},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/NohlBSLMH02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/WahlenGNHLM02,
  author       = {Oliver Wahlen and
                  Tilman Gl{\"{o}}kler and
                  Achim Nohl and
                  Andreas Hoffmann and
                  Rainer Leupers and
                  Heinrich Meyr},
  editor       = {Peter Marwedel and
                  Srinivas Devadas},
  title        = {Application specific compiler/architecture codesign: a case study},
  booktitle    = {Proceedings of the 2002 Joint Conference on Languages, Compilers,
                  and Tools for Embedded Systems {\&} Software and Compilers for
                  Embedded Systems (LCTES'02-SCOPES'02), Berlin, Germany, 19-21 June
                  2002},
  pages        = {185--193},
  publisher    = {{ACM}},
  year         = {2002},
  url          = {https://doi.org/10.1145/513829.513861},
  doi          = {10.1145/513829.513861},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/lctrts/WahlenGNHLM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0005693,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  title        = {Retargetable compiler technology for embedded systems - tools and
                  applications},
  publisher    = {Kluwer},
  year         = {2001},
  isbn         = {978-0-7923-7578-4},
  timestamp    = {Fri, 15 Apr 2011 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/0005693.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WagnerL01,
  author       = {Jens Wagner and
                  Rainer Leupers},
  title        = {C compiler design for a network processor},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {20},
  number       = {11},
  pages        = {1302--1308},
  year         = {2001},
  url          = {https://doi.org/10.1109/43.959859},
  doi          = {10.1109/43.959859},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/WagnerL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LorenzKBLM01,
  author       = {Markus Lorenz and
                  David Koffmann and
                  Steven Bashford and
                  Rainer Leupers and
                  Peter Marwedel},
  editor       = {Satoshi Goto},
  title        = {Optimized address assignment for DSPs with {SIMD} memory accesses},
  booktitle    = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
                  Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
  pages        = {415--420},
  publisher    = {{ACM}},
  year         = {2001},
  url          = {https://doi.org/10.1145/370155.370430},
  doi          = {10.1145/370155.370430},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/LorenzKBLM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/LeupersK01,
  author       = {Rainer Leupers and
                  Daniel Kotte},
  title        = {Variable partitioning for dual memory bank DSPs},
  booktitle    = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
                  {ICASSP} 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt
                  Lake City, Utah, USA, Proceedings},
  pages        = {1121--1124},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ICASSP.2001.941118},
  doi          = {10.1109/ICASSP.2001.941118},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icassp/LeupersK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LorenzLMDF01,
  author       = {Markus Lorenz and
                  Rainer Leupers and
                  Peter Marwedel and
                  Thorsten Dr{\"{a}}ger and
                  Gerhard P. Fettweis},
  title        = {Low-Energy {DSP} Code Generation Using a Genetic Algorithm},
  booktitle    = {19th International Conference on Computer Design {(ICCD} 2001), {VLSI}
                  in Computers and Processors, 23-26 September 2001, Austin, TX, USA,
                  Proceedings},
  pages        = {431--437},
  publisher    = {{IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ICCD.2001.955062},
  doi          = {10.1109/ICCD.2001.955062},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/LorenzLMDF01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/WagnerL01,
  author       = {Jens Wagner and
                  Rainer Leupers},
  editor       = {Seongsoo Hong and
                  Santosh Pande},
  title        = {C Compiler Design for an Industrial Network Processor},
  booktitle    = {Proceedings of The Workshop on Languages, Compilers, and Tools for
                  Embedded Systems {(LCTES} 2001), June 22-23, 2001 / The Workshop on
                  Optimization of Middleware and Distributed Systems {(OM} 2001), June
                  18, 2001, Snowbird, Utah, {USA}},
  pages        = {155--164},
  publisher    = {{ACM}},
  year         = {2001},
  url          = {https://doi.org/10.1145/384197.384218},
  doi          = {10.1145/384197.384218},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/lctrts/WagnerL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/WagnerL01,
  author       = {Jens Wagner and
                  Rainer Leupers},
  editor       = {Rastislav Bod{\'{\i}}k and
                  Vugranam C. Sreedhar},
  title        = {C Compiler Design for an Industrial Network Processor},
  booktitle    = {Proceedings of the 2001 {ACM} {SIGPLAN} Workshop on Optimization of
                  Middleware and Distributed Systems, {OM} '01, Snow Bird, Utah, {USA}},
  pages        = {155--164},
  publisher    = {{ACM}},
  year         = {2001},
  url          = {https://doi.org/10.1145/384198.384218},
  doi          = {10.1145/384198.384218},
  timestamp    = {Wed, 12 Jan 2022 14:24:31 +0100},
  biburl       = {https://dblp.org/rec/conf/pldi/WagnerL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0003359,
  author       = {Rainer Leupers},
  title        = {Code optimization techniques for embedded processors - methods, algorithms,
                  and tools},
  publisher    = {Kluwer},
  year         = {2000},
  isbn         = {978-0-7923-7989-8},
  timestamp    = {Mon, 18 Apr 2011 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/0003359.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LeupersB00,
  author       = {Rainer Leupers and
                  Steven Bashford},
  title        = {Graph-based code selection techniques for embedded processors},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {5},
  number       = {4},
  pages        = {794--814},
  year         = {2000},
  url          = {https://doi.org/10.1145/362652.362661},
  doi          = {10.1145/362652.362661},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/LeupersB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/Leupers00,
  author       = {Rainer Leupers},
  title        = {Instruction Scheduling for Clustered {VLIW} DSPs},
  booktitle    = {Proceedings of the 2000 International Conference on Parallel Architectures
                  and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania,
                  USA, October 15-19, 2000},
  pages        = {291--300},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/PACT.2000.888353},
  doi          = {10.1109/PACT.2000.888353},
  timestamp    = {Tue, 31 May 2022 13:36:12 +0200},
  biburl       = {https://dblp.org/rec/conf/IEEEpact/Leupers00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Leupers00,
  author       = {Rainer Leupers},
  title        = {Register allocation for common subexpressions in {DSP} data paths},
  booktitle    = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
                  Conference 2000, Yokohama, Japan},
  pages        = {235--240},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/368434.368618},
  doi          = {10.1145/368434.368618},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/Leupers00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Leupers00,
  author       = {Rainer Leupers},
  editor       = {Ivo Bolsens},
  title        = {Code Selection for Media Processors with {SIMD} Instructions},
  booktitle    = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March
                  2000, Paris, France},
  pages        = {4--8},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1109/DATE.2000.840007},
  doi          = {10.1109/DATE.2000.840007},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/Leupers00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Leupers00,
  author       = {Rainer Leupers},
  editor       = {Fadi J. Kurdahi and
                  Rom{\'{a}}n Hermida},
  title        = {Code Generation for Embedded Processors},
  booktitle    = {Proceedings of the 13th International Symposium on System Synthesis,
                  ISSS'00, Madrid, Spain, September 20-22, 2000},
  pages        = {173--179},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISSS.2000.874046},
  doi          = {10.1109/ISSS.2000.874046},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Leupers00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/BashfordL99,
  author       = {Steven Bashford and
                  Rainer Leupers},
  title        = {Phase-Coupled Mapping of Data Flow Graphs to Irregular Data Paths},
  journal      = {Des. Autom. Embed. Syst.},
  volume       = {4},
  number       = {2-3},
  pages        = {119--165},
  year         = {1999},
  url          = {https://doi.org/10.1023/A:1008966522714},
  doi          = {10.1023/A:1008966522714},
  timestamp    = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dafes/BashfordL99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeupersEL99,
  author       = {Rainer Leupers and
                  Johann Elste and
                  Birger Landwehr},
  title        = {Generation of Interpretive and Compiled Instruction Set Simulators},
  booktitle    = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation,
                  Wanchai, Hong Kong, China, January 18-21, 1999},
  pages        = {339--342},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ASPDAC.1999.760028},
  doi          = {10.1109/ASPDAC.1999.760028},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/LeupersEL99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BashfordL99,
  author       = {Steven Bashford and
                  Rainer Leupers},
  editor       = {Mary Jane Irwin},
  title        = {Constraint Driven Code Selection for Fixed-Point DSPs},
  booktitle    = {Proceedings of the 36th Conference on Design Automation, New Orleans,
                  LA, USA, June 21-25, 1999},
  pages        = {817--822},
  publisher    = {{ACM} Press},
  year         = {1999},
  url          = {https://doi.org/10.1145/309847.310076},
  doi          = {10.1145/309847.310076},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/BashfordL99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Leupers99,
  author       = {Rainer Leupers},
  title        = {Exploiting Conditional Instructions in Code Generation for Embedded
                  {VLIW} Processors},
  booktitle    = {1999 Design, Automation and Test in Europe {(DATE} '99), 9-12 March
                  1999, Munich, Germany},
  pages        = {105},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1999},
  url          = {https://doi.org/10.1109/DATE.1999.761104},
  doi          = {10.1109/DATE.1999.761104},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/Leupers99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LeupersM99,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  editor       = {Jacob K. White and
                  Ellen Sentovich},
  title        = {Function inlining under code size constraints for embedded processors},
  booktitle    = {Proceedings of the 1999 {IEEE/ACM} International Conference on Computer-Aided
                  Design, 1999, San Jose, California, USA, November 7-11, 1999},
  pages        = {253--256},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ICCAD.1999.810657},
  doi          = {10.1109/ICCAD.1999.810657},
  timestamp    = {Mon, 08 May 2023 21:43:38 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/LeupersM99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BasuLM99,
  author       = {Anupam Basu and
                  Rainer Leupers and
                  Peter Marwedel},
  title        = {Array Index Allocation under Register Constraints in {DSP} Programs},
  booktitle    = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
                  10-13 January 1999, Goa, India},
  pages        = {330--335},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/ICVD.1999.745175},
  doi          = {10.1109/ICVD.1999.745175},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/BasuLM99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/LeupersM98,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  title        = {Retargetable Code Generation Based on Structural Processor Description},
  journal      = {Des. Autom. Embed. Syst.},
  volume       = {3},
  number       = {1},
  pages        = {75--108},
  year         = {1998},
  url          = {https://doi.org/10.1023/A:1008807631619},
  doi          = {10.1023/A:1008807631619},
  timestamp    = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dafes/LeupersM98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeupersBM98,
  author       = {Rainer Leupers and
                  Anupam Basu and
                  Peter Marwedel},
  title        = {Optimized Array Index Computation in {DSP} Programs},
  booktitle    = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
                  Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
                  1998},
  pages        = {87--92},
  publisher    = {{IEEE}},
  year         = {1998},
  url          = {https://doi.org/10.1109/ASPDAC.1998.669411},
  doi          = {10.1109/ASPDAC.1998.669411},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/LeupersBM98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BasuLM98,
  author       = {Anupam Basu and
                  Rainer Leupers and
                  Peter Marwedel},
  editor       = {Patrick M. Dewilde and
                  Franz J. Rammig and
                  Gerry Musgrave},
  title        = {Register-Constrained Address Computation in {DSP} Programs},
  booktitle    = {1998 Design, Automation and Test in Europe {(DATE} '98), February
                  23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
  pages        = {929--930},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/DATE.1998.655974},
  doi          = {10.1109/DATE.1998.655974},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/BasuLM98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeupersD98,
  author       = {Rainer Leupers and
                  Fabian David},
  editor       = {Francky Catthoor},
  title        = {A Uniform Optimization Technique for Offset Assignment Problems},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {3--8},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730589},
  doi          = {10.1109/ISSS.1998.730589},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeupersD98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/Leupers98,
  author       = {Rainer Leupers},
  editor       = {Francky Catthoor},
  title        = {HDL-Based Modeling of Embedded Processor Behavior for Retargetable
                  Compilation},
  booktitle    = {Proceedings of the 11th International Symposium on System Synthesis,
                  {ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
  pages        = {51},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ISSS.1998.730596},
  doi          = {10.1109/ISSS.1998.730596},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/Leupers98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0092254,
  author       = {Rainer Leupers},
  title        = {Retargetable code generation for digital signal processors},
  publisher    = {Kluwer},
  year         = {1997},
  isbn         = {978-0-7923-9958-2},
  timestamp    = {Tue, 26 Apr 2011 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/0092254.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeupersM97,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  title        = {Time-constrained code compaction for DSPs},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {5},
  number       = {1},
  pages        = {112--122},
  year         = {1997},
  url          = {https://doi.org/10.1109/92.555991},
  doi          = {10.1109/92.555991},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LeupersM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersM97,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  title        = {Retargetable generation of code selectors from {HDL} processor models},
  booktitle    = {European Design and Test Conference, ED{\&}TC '97, Paris, France,
                  17-20 March 1997},
  pages        = {140--144},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/EDTC.1997.582348},
  doi          = {10.1109/EDTC.1997.582348},
  timestamp    = {Fri, 20 May 2022 15:59:03 +0200},
  biburl       = {https://dblp.org/rec/conf/date/LeupersM97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/LeupersM96,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  editor       = {Graham Symonds and
                  Wolfgang Nebel},
  title        = {Instruction selection for embedded DSPs with complex instructions},
  booktitle    = {Proceedings of the conference on European design automation, {EURO-DAC}
                  '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996},
  pages        = {200--205},
  publisher    = {{IEEE} Computer Society Press},
  year         = {1996},
  url          = {https://doi.org/10.1109/EURDAC.1996.558205},
  doi          = {10.1109/EURDAC.1996.558205},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/eurodac/LeupersM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LeupersM96,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  editor       = {Rob A. Rutenbar and
                  Ralph H. J. M. Otten},
  title        = {Algorithms for address assignment in {DSP} code generation},
  booktitle    = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
                  Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
  pages        = {109--112},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1996},
  url          = {https://doi.org/10.1109/ICCAD.1996.569409},
  doi          = {10.1109/ICCAD.1996.569409},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/LeupersM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LeupersM96,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  title        = {Instruction-Set Modeling for {ASIP} Code Generation},
  booktitle    = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
                  3-6 January 1996, Bangalore, India},
  pages        = {77--80},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ICVD.1996.489460},
  doi          = {10.1109/ICVD.1996.489460},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/LeupersM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LeupersM95,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  editor       = {Lubomir Bic and
                  Paraskevas Evripidou and
                  A. P. Wim B{\"{o}}hm and
                  Jean{-}Luc Gaudiot},
  title        = {Using compilers for heterogeneous system design},
  booktitle    = {Proceedings of the {IFIP} {WG10.3} working conference on Parallel
                  architectures and compilation techniques, {PACT} '95, Limassol, Cyprus,
                  June 27-29, 1995},
  pages        = {273--276},
  publisher    = {{IFIP} Working Group on Algol / {ACM}},
  year         = {1995},
  url          = {http://dl.acm.org/citation.cfm?id=224939},
  timestamp    = {Thu, 07 Apr 2016 15:27:42 +0200},
  biburl       = {https://dblp.org/rec/conf/IEEEpact/LeupersM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersM95,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  title        = {A BDD-based frontend for retargetable compilers},
  booktitle    = {1995 European Design and Test Conference, ED{\&}TC 1995, Paris,
                  France, March 6-9, 1995},
  pages        = {239--243},
  publisher    = {{IEEE} Computer Society},
  year         = {1995},
  url          = {https://doi.org/10.1109/EDTC.1995.470389},
  doi          = {10.1109/EDTC.1995.470389},
  timestamp    = {Fri, 20 May 2022 15:41:46 +0200},
  biburl       = {https://dblp.org/rec/conf/date/LeupersM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeupersM95,
  author       = {Rainer Leupers and
                  Peter Marwedel},
  editor       = {Pierre G. Paulin and
                  Farhad Mavaddat},
  title        = {Time-constrained code compaction for DSPs},
  booktitle    = {Proceedings of the 8th International Symposium on System Synthesis
                  {(ISSS} 1995), September 13-15, 1995, Cannes, France},
  pages        = {54--59},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224486.224498},
  doi          = {10.1145/224486.224498},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isss/LeupersM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/MarwedelL94,
  author       = {Peter Marwedel and
                  Rainer Leupers},
  editor       = {Jean Mermet},
  title        = {Instruction set extraction from programmable structures},
  booktitle    = {Proceedings EURO-DAC'94, European Design Automation Conference, Grenoble,
                  France, September 19-22, 1994},
  pages        = {156--161},
  publisher    = {{IEEE} Computer Society},
  year         = {1994},
  url          = {http://dl.acm.org/citation.cfm?id=198233},
  timestamp    = {Wed, 29 Mar 2017 16:45:25 +0200},
  biburl       = {https://dblp.org/rec/conf/eurodac/MarwedelL94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifipPACT/LeupersSM94,
  author       = {Rainer Leupers and
                  Wolfgang Schenk and
                  Peter Marwedel},
  editor       = {Michel Cosnard and
                  Guang R. Gao and
                  Gabriel M. Silberman},
  title        = {Microcode Generation for Flexible Parallel Target Architectures},
  booktitle    = {Parallel Architectures and Compilation Techniques, Proceedings of
                  the {IFIP} {WG10.3} Working Conference on Parallel Architectures and
                  Compilation Techniques, PACT'94, Montr{\'{e}}al, Canada, 24-26
                  August, 1994},
  series       = {{IFIP} Transactions},
  volume       = {{A-50}},
  pages        = {247--256},
  publisher    = {North-Holland},
  year         = {1994},
  url          = {http://dl.acm.org/citation.cfm?id=713818},
  timestamp    = {Thu, 25 Sep 2014 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ifipPACT/LeupersSM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/LeupersSM94,
  author       = {Rainer Leupers and
                  Wolfgang Schenk and
                  Peter Marwedel},
  editor       = {Pierre G. Paulin},
  title        = {Retargetable assembly code generation by bootstrapping},
  booktitle    = {Proceedings of the 7th International Symposium on High Level Synthesis,
                  HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
  pages        = {88--93},
  publisher    = {{ACM}},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISHLS.1994.302336},
  doi          = {10.1109/ISHLS.1994.302336},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isss/LeupersSM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LadageL93,
  author       = {Lorenz Ladage and
                  Rainer Leupers},
  editor       = {Alfred E. Dunlop},
  title        = {Resistance Extraction using a Routing Algorithm},
  booktitle    = {Proceedings of the 30th Design Automation Conference. Dallas, Texas,
                  USA, June 14-18, 1993},
  pages        = {38--42},
  publisher    = {{ACM} Press},
  year         = {1993},
  url          = {https://doi.org/10.1145/157485.164559},
  doi          = {10.1145/157485.164559},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/LadageL93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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