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ORCIDBibTeX records: Habib Mehrez
@article{DBLP:journals/mam/FarooqBBMKG23,
author = {Umer Farooq and
Imran Baig and
Muhammad Khurram Bhatti and
Habib Mehrez and
Arun Kumar and
Manoj Gupta},
title = {Prototyping using multi-FPGA platform: {A} novel and complete flow},
journal = {Microprocess. Microsystems},
volume = {96},
pages = {104751},
year = {2023},
url = {https://doi.org/10.1016/j.micpro.2022.104751},
doi = {10.1016/J.MICPRO.2022.104751},
timestamp = {Fri, 08 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/FarooqBBMKG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/FarooqM21,
author = {Umer Farooq and
Habib Mehrez},
title = {Pre-Silicon Verification Using Multi-FPGA Platforms: {A} Review},
journal = {J. Electron. Test.},
volume = {37},
number = {1},
pages = {7--24},
year = {2021},
url = {https://doi.org/10.1007/s10836-021-05929-1},
doi = {10.1007/S10836-021-05929-1},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/FarooqM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/FarooqMB18,
author = {Umer Farooq and
Habib Mehrez and
Muhammad Khurram Bhatti},
title = {Inter-FPGA interconnect topologies exploration for multi-FPGA systems},
journal = {Des. Autom. Embed. Syst.},
volume = {22},
number = {1-2},
pages = {117--140},
year = {2018},
url = {https://doi.org/10.1007/s10617-018-9207-2},
doi = {10.1007/S10617-018-9207-2},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dafes/FarooqMB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/FarooqCARM18,
author = {Umer Farooq and
Roselyne Chotin{-}Avot and
Muhammad Moazam Azeem and
Maminionja Ravoson and
Habib Mehrez},
title = {Novel architectural space exploration environment for multi-FPGA based
prototyping systems},
journal = {Microprocess. Microsystems},
volume = {56},
pages = {169--183},
year = {2018},
url = {https://doi.org/10.1016/j.micpro.2017.12.006},
doi = {10.1016/J.MICPRO.2017.12.006},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/FarooqCARM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/elektrik/ChtourouMAPAM17,
author = {Sonda Chtourou and
Zied Marrakchi and
Emna Amouri and
Vinod Pangracious and
Mohamed Abid and
Habib Mehrez},
title = {Performance analysis and optimization of cluster-based mesh {FPGA}
architectures: design methodology and {CAD} tool support},
journal = {Turkish J. Electr. Eng. Comput. Sci.},
volume = {25},
pages = {2044--2054},
year = {2017},
url = {https://doi.org/10.3906/elk-1506-51},
doi = {10.3906/ELK-1506-51},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/elektrik/ChtourouMAPAM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/AbdellatifCM17,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {{AES-GCM} and {AEGIS:} Efficient and High Speed Hardware Implementations},
journal = {J. Signal Process. Syst.},
volume = {88},
number = {1},
pages = {1--12},
year = {2017},
url = {https://doi.org/10.1007/s11265-016-1104-y},
doi = {10.1007/S11265-016-1104-Y},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/AbdellatifCM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/ChtourouAMAM17,
author = {Sonda Chtourou and
Mohamed Abid and
Zied Marrakchi and
Emna Amouri and
Habib Mehrez},
title = {On Exploiting Partitioning-Based Placement Approach for Performances
Improvement of 3D {FPGA}},
booktitle = {2017 International Conference on High Performance Computing {\&}
Simulation, {HPCS} 2017, Genoa, Italy, July 17-21, 2017},
pages = {572--579},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/HPCS.2017.91},
doi = {10.1109/HPCS.2017.91},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/ieeehpcs/ChtourouAMAM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/FarooqMB17,
author = {Umer Farooq and
Habib Mehrez and
Muhammad Khurram Bhatti},
title = {Comparison of direct and switch-based inter-FPGA routing interconnect
for multi-FPGA systems},
booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
2017, Cancun, Mexico, December 4-6, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/RECONFIG.2017.8279782},
doi = {10.1109/RECONFIG.2017.8279782},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/FarooqMB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/ChtourouMAPAM16,
author = {Sonda Chtourou and
Zied Marrakchi and
Emna Amouri and
Vinod Pangracious and
Mohamed Abid and
Habib Mehrez},
title = {Improvement of cluster-based Mesh {FPGA} architecture using novel
hierarchical interconnect topology and long routing wires},
journal = {Microprocess. Microsystems},
volume = {40},
pages = {16--26},
year = {2016},
url = {https://doi.org/10.1016/j.micpro.2015.11.011},
doi = {10.1016/J.MICPRO.2015.11.011},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/ChtourouMAPAM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FarooqCACRKM16,
author = {Umer Farooq and
Roselyne Chotin{-}Avot and
Muhammad Moazam Azeem and
Zouha Cherif and
Maminionja Ravoson and
Saqib Khan and
Habib Mehrez},
editor = {Paris Kitsos},
title = {Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping
Exploration},
booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol,
Cyprus, August 31 - September 2, 2016},
pages = {641--645},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/DSD.2016.93},
doi = {10.1109/DSD.2016.93},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FarooqCACRKM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/AbdellatifCM16,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
editor = {Martin Palkovic and
Giovanni Agosta and
Alessandro Barenghi and
Israel Koren and
Gerardo Pelosi},
title = {AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs},
booktitle = {Proceedings of the Third Workshop on Cryptography and Security in
Computing Systems, CS2@HiPEAC, Prague, Czech Republic, January 20,
2016},
pages = {37--40},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2858930.2858937},
doi = {10.1145/2858930.2858937},
timestamp = {Tue, 06 Nov 2018 16:58:21 +0100},
biburl = {https://dblp.org/rec/conf/hipeac/AbdellatifCM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/ChtourouAMAM16,
author = {Sonda Chtourou and
Mohamed Abid and
Zied Marrakchi and
Emna Amouri and
Habib Mehrez},
title = {Design of advanced 2D and 3D FPGAs: Architecture-level exploration
and algorithm-level optimization},
booktitle = {11th International Design {\&} Test Symposium, {IDT} 2016, Hammamet,
Tunisia, December 18-20, 2016},
pages = {31--36},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/IDT.2016.7843010},
doi = {10.1109/IDT.2016.7843010},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/idt/ChtourouAMAM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/AzeemCFRM16,
author = {Muhammad Moazam Azeem and
Roselyne Chotin{-}Avot and
Umer Farooq and
Maminionja Ravoson and
Habib Mehrez},
title = {Multiple FPGAs based prototyping and debugging with complete design
flow},
booktitle = {11th International Design {\&} Test Symposium, {IDT} 2016, Hammamet,
Tunisia, December 18-20, 2016},
pages = {171--176},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/IDT.2016.7843035},
doi = {10.1109/IDT.2016.7843035},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/idt/AzeemCFRM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/ChtourouAMAM16,
author = {Sonda Chtourou and
Mohamed Abid and
Zied Marrakchi and
Emna Amouri and
Habib Mehrez},
title = {The effect of interconnect depopulation on {FPGA} performances in
terms of power, area and delay},
booktitle = {International Conference on High Performance Computing {\&} Simulation,
{HPCS} 2016, Innsbruck, Austria, July 18-22, 2016},
pages = {104--111},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/HPCSim.2016.7568322},
doi = {10.1109/HPCSIM.2016.7568322},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/ieeehpcs/ChtourouAMAM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/ChtourouMAPMA16,
author = {Sonda Chtourou and
Zied Marrakchi and
Emna Amouri and
Vinod Pangracious and
Habib Mehrez and
Mohamed Abid},
title = {Exploration of Mesh-Based {FPGA} Architecture: Comparison of 2D and
3D Technologies in Terms of Power, Area and Performance},
booktitle = {24th Euromicro International Conference on Parallel, Distributed,
and Network-Based Processing, {PDP} 2016, Heraklion, Crete, Greece,
February 17-19, 2016},
pages = {635--642},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/PDP.2016.77},
doi = {10.1109/PDP.2016.77},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdp/ChtourouMAPMA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FarooqCARTM16,
author = {Umer Farooq and
Roselyne Chotin{-}Avot and
Muhammad Moazam Azeem and
Maminionja Ravoson and
Mariem Turki and
Habib Mehrez},
title = {Inter-FPGA routing environment for performance exploration of multi-FPGA
systems},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {107--113},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990317},
doi = {10.1145/2990299.2990317},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FarooqCARTM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/lnee/PangraciousMM15,
author = {Vinod Pangracious and
Zied Marrakchi and
Habib Mehrez},
title = {Three-Dimensional Design Methodologies for Tree-based {FPGA} Architecture},
series = {Lecture Notes in Electrical Engineering},
volume = {350},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-19174-4},
doi = {10.1007/978-3-319-19174-4},
isbn = {978-3-319-19173-7},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/lnee/PangraciousMM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/TurkiMMA15,
author = {Mariem Turki and
Zied Marrakchi and
Habib Mehrez and
Mohamed Abid},
title = {Signal multiplexing approach to improve inter-FPGA bandwidth of prototyping
platform},
journal = {Des. Autom. Embed. Syst.},
volume = {19},
number = {3},
pages = {223--242},
year = {2015},
url = {https://doi.org/10.1007/s10617-014-9155-4},
doi = {10.1007/S10617-014-9155-4},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dafes/TurkiMMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/BelhadjBMAMM15,
author = {Nidhameddine Belhadj and
Nejmeddine Bahri and
Zied Marrakchi and
Mohamed Ali Ben Ayed and
Nouri Masmoudi and
Habib Mehrez},
title = {{H.264/AVC} high definition intra coding implementation on multiprocessor
system on chip technology architecture},
journal = {{IET} Comput. Digit. Tech.},
volume = {9},
number = {5},
pages = {259--267},
year = {2015},
url = {https://doi.org/10.1049/iet-cdt.2014.0151},
doi = {10.1049/IET-CDT.2014.0151},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/BelhadjBMAMM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/PangraciousMM15,
author = {Vinod Pangracious and
Zied Marrakchi and
Habib Mehrez},
title = {Design and Optimization of a Horizontally Partitioned, High-Speed,
3D Tree-Based {FPGA}},
journal = {{IEEE} Micro},
volume = {35},
number = {6},
pages = {48--59},
year = {2015},
url = {https://doi.org/10.1109/MM.2014.57},
doi = {10.1109/MM.2014.57},
timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/PangraciousMM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/ChtourouMPAMA15,
author = {Sonda Chtourou and
Zied Marrakchi and
Vinod Pangracious and
Emna Amouri and
Habib Mehrez and
Mohamed Abid},
editor = {Kentaro Sano and
Dimitrios Soudris and
Michael H{\"{u}}bner and
Pedro C. Diniz},
title = {Mesh of Clusters {FPGA} Architectures: Exploration Methodology and
Interconnect Optimization},
booktitle = {Applied Reconfigurable Computing - 11th International Symposium, {ARC}
2015, Bochum, Germany, April 13-17, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9040},
pages = {411--418},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-16214-0\_37},
doi = {10.1007/978-3-319-16214-0\_37},
timestamp = {Wed, 28 Apr 2021 16:06:56 +0200},
biburl = {https://dblp.org/rec/conf/arc/ChtourouMPAMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijertcs/BelhadjMAMM14,
author = {Nidhameddine Belhadj and
Zied Marrakchi and
Mohamed Ali Ben Ayed and
Nouri Masmoudi and
Habib Mehrez},
title = {MPSoC Architecture for Macro Blocks Line Partitioning of {H.264/AVC}
Encoder},
journal = {Int. J. Embed. Real Time Commun. Syst.},
volume = {5},
number = {2},
pages = {43--60},
year = {2014},
url = {https://doi.org/10.4018/ijertcs.2014040104},
doi = {10.4018/IJERTCS.2014040104},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijertcs/BelhadjMAMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/AbdellatifCM14,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Low cost solutions for secure remote reconfiguration of FPGAs},
journal = {Int. J. Embed. Syst.},
volume = {6},
number = {2/3},
pages = {257--265},
year = {2014},
url = {https://doi.org/10.1504/IJES.2014.063824},
doi = {10.1504/IJES.2014.063824},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/AbdellatifCM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/KilicMM14,
author = {Alp Kili{\c{c}} and
Zied Marrakchi and
Habib Mehrez},
title = {A Top-Down Optimization Methodology for Mutually Exclusive Applications},
journal = {Int. J. Reconfigurable Comput.},
volume = {2014},
pages = {827613:1--827613:18},
year = {2014},
url = {https://doi.org/10.1155/2014/827613},
doi = {10.1155/2014/827613},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/KilicMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/AbdellatifCM14,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Authenticated encryption on FPGAs from the static part to the reconfigurable
part},
journal = {Microprocess. Microsystems},
volume = {38},
number = {6},
pages = {526--538},
year = {2014},
url = {https://doi.org/10.1016/j.micpro.2014.03.006},
doi = {10.1016/J.MICPRO.2014.03.006},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/AbdellatifCM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/PangraciousAMM14,
author = {Vinod Pangracious and
Emna Amouri and
Zied Marrakchi and
Habib Mehrez},
title = {Architecture level optimization of 3-dimensional tree-based {FPGA}},
journal = {Microelectron. J.},
volume = {45},
number = {4},
pages = {355--366},
year = {2014},
url = {https://doi.org/10.1016/j.mejo.2013.12.011},
doi = {10.1016/J.MEJO.2013.12.011},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/PangraciousAMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/OuattaraDNMB14,
author = {Boukary Ouattara and
Lise Doyen and
David Ney and
Habib Mehrez and
Pirouz Bazargan{-}Sabet},
title = {Power grid redundant path contribution in system on chip (SoC) robustness
against electromigration},
journal = {Microelectron. Reliab.},
volume = {54},
number = {9-10},
pages = {1702--1706},
year = {2014},
url = {https://doi.org/10.1016/j.microrel.2014.07.016},
doi = {10.1016/J.MICROREL.2014.07.016},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mr/OuattaraDNMB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/ChtourouAPAMM14,
author = {Sonda Chtourou and
Mohamed Abid and
Vinod Pangracious and
Emna Amouri and
Zied Marrakchi and
Habib Mehrez},
title = {Three-dimensional Mesh of Clusters: An alternative unified high performance
interconnect architecture for 3D-FPGA implementation},
booktitle = {2014 International 3D Systems Integration Conference, 3DIC 2014, Kinsdale,
Ireland, December 1-3, 2014},
pages = {1--7},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/3DIC.2014.7152149},
doi = {10.1109/3DIC.2014.7152149},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/3dic/ChtourouAPAMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/AbdellatifCM14,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
editor = {Diana Goehringer and
Marco Domenico Santambrogio and
Jo{\~{a}}o M. P. Cardoso and
Koen Bertels},
title = {FPGA-Based High Performance {AES-GCM} Using Efficient Karatsuba Ofman
Algorithm},
booktitle = {Reconfigurable Computing: Architectures, Tools, and Applications -
10th International Symposium, {ARC} 2014, Vilamoura, Portugal, April
14-16, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8405},
pages = {13--24},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-05960-0\_2},
doi = {10.1007/978-3-319-05960-0\_2},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/AbdellatifCM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/atsip/BelhadjAMMM14,
author = {Nidhameddine Belhadj and
Mohamed Ali Ben Ayed and
Nouri Masmoudi and
Zied Marrakchi and
Habib Mehrez},
title = {MPSoC architecture for Component Level Parallelism of {H.264/AVC}
intra prediction encoding chain on SoCLib platform},
booktitle = {2014 1st International Conference on Advanced Technologies for Signal
and Image Processing (ATSIP), Sousse, Tunisia, March 17-19, 2014},
pages = {153--157},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ATSIP.2014.6834596},
doi = {10.1109/ATSIP.2014.6834596},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/atsip/BelhadjAMMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dtis/ChtourouAMM14,
author = {Sonda Chtourou and
Mohamed Abid and
Zied Marrakchi and
Habib Mehrez},
title = {Power consumption analysis for mesh based {FPGA}},
booktitle = {Proceedings of the 9th International Conference on Design {\&}
Technology of Integrated Systems in Nanoscale Era, {DTIS} 2014, Santorini,
Greece, May 6-8, 2014},
pages = {1--5},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/DTIS.2014.6850671},
doi = {10.1109/DTIS.2014.6850671},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/dtis/ChtourouAMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dtis/PangraciousMBMF14,
author = {Vinod Pangracious and
Zied Marrakchi and
Nizar Beltaief and
Habib Mehrez and
Umer Farooq},
title = {Exploration and optimization of heterogeneous interconnect fabric
of 3D tree-based {FPGA}},
booktitle = {Proceedings of the 9th International Conference on Design {\&}
Technology of Integrated Systems in Nanoscale Era, {DTIS} 2014, Santorini,
Greece, May 6-8, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/DTIS.2014.6850673},
doi = {10.1109/DTIS.2014.6850673},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dtis/PangraciousMBMF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/TangTM14,
author = {Qingshan Tang and
Matthieu Tuna and
Habib Mehrez},
title = {Performance Comparison between Multi-FPGA Prototyping Platforms: Hardwired
Off-the-Shelf, Cabling, and Custom},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {125--132},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.44},
doi = {10.1109/FCCM.2014.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/TangTM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AbdellatifCMMT14,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Zied Marrakchi and
Habib Mehrez and
Qingshan Tang},
editor = {Vaughn Betz and
George A. Constantinides},
title = {Towards high performance {GHASH} for pipelined {AES-GCM} using FPGAs
(abstract only)},
booktitle = {The 2014 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} '14, Monterey, CA, {USA} - February 26 - 28, 2014},
pages = {242},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2554688.2554709},
doi = {10.1145/2554688.2554709},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AbdellatifCMMT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TangTM14,
author = {Qingshan Tang and
Matthieu Tuna and
Habib Mehrez},
editor = {Vaughn Betz and
George A. Constantinides},
title = {Future inter-FPGA communication architecture for multi-FPGA based
prototyping (abstract only)},
booktitle = {The 2014 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} '14, Monterey, CA, {USA} - February 26 - 28, 2014},
pages = {251},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2554688.2554747},
doi = {10.1145/2554688.2554747},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TangTM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AmouriBMGDM14,
author = {Emna Amouri and
Shivam Bhasin and
Yves Mathieu and
Tarik Graba and
Jean{-}Luc Danger and
Habib Mehrez},
title = {Balancing {WDDL} dual-rail logic in a tree-based {FPGA} to enhance
physical security},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927422},
doi = {10.1109/FPL.2014.6927422},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AmouriBMGDM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BlanchardonCMA14,
author = {Adrien Blanchardon and
Roselyne Chotin{-}Avot and
Habib Mehrez and
Emna Amouri},
title = {Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster
{FPGA} using hardware redundancy},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927389},
doi = {10.1109/FPL.2014.6927389},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BlanchardonCMA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KilicHMA14,
author = {Alp Kili{\c{c}} and
Delaram Haghighitalab and
Habib Mehrez and
Hassan Aboushady},
title = {Low-power comb decimation filter for {RF} Sigma-Delta ADCs},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {1596--1599},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865455},
doi = {10.1109/ISCAS.2014.6865455},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/KilicHMA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/RehmanBDBCNAMAM14,
author = {Saif{-}Ur Rehman and
Adrien Blanchardon and
Arwa Ben Dhia and
Mounir Benabdenbi and
Roselyne Chotin{-}Avot and
Lirida A. B. Naviner and
Lorena Anghel and
Habib Mehrez and
Emna Amouri and
Zied Marrakchi},
title = {Impact of Cluster Size on Routability, Testability and Robustness
of a Cluster in a Mesh {FPGA}},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {553--558},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.66},
doi = {10.1109/ISVLSI.2014.66},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/RehmanBDBCNAMAM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/ChaeMFCM14,
author = {Jung Kyu Chae and
Paul Mougeat and
Jean{-}Arnaud Francois and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {A reference-based specification tool for creating reliable library
development specifications},
booktitle = {{IEEE} 12th International New Circuits and Systems Conference, {NEWCAS}
2014, Trois-Rivieres, QC, Canada, June 22-25, 2014},
pages = {133--136},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/NEWCAS.2014.6934001},
doi = {10.1109/NEWCAS.2014.6934001},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/newcas/ChaeMFCM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/BlanchardonCMA14,
author = {Adrien Blanchardon and
Roselyne Chotin{-}Avot and
Habib Mehrez and
Emna Amouri},
title = {Impact of defect tolerance techniques on the criticality of a SRAM-based
mesh of cluster {FPGA}},
booktitle = {2014 International Conference on ReConFigurable Computing and FPGAs,
ReConFig14, Cancun, Mexico, December 8-10, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ReConFig.2014.7032508},
doi = {10.1109/RECONFIG.2014.7032508},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/BlanchardonCMA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/TangMT14,
author = {Qingshan Tang and
Habib Mehrez and
Matthieu Tuna},
title = {Multi-FPGA prototyping board issue: the {FPGA} {I/O} bottleneck},
booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos,
Greece, July 14-17, 2014},
pages = {207--214},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SAMOS.2014.6893213},
doi = {10.1109/SAMOS.2014.6893213},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/samos/TangMT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/PangraciousMMM14,
author = {Vinod Pangracious and
Mohamed Sahbi Marrakchi and
Habib Mehrez and
Zied Marrakchi},
editor = {Kaijian Shi and
Thomas B{\"{u}}chner and
Danella Zhao and
Ramalingam Sridhar},
title = {On wiring delays reduction of tree-based {FPGA} using 3-D fabric},
booktitle = {27th {IEEE} International System-on-Chip Conference, {SOCC} 2014,
Las Vegas, NV, USA, September 2-5, 2014},
pages = {64--69},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SOCC.2014.6948901},
doi = {10.1109/SOCC.2014.6948901},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/PangraciousMMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/ObeidQBMMGA14,
author = {Abdulfattah Mohammad Obeid and
Syed Manzoor Qasim and
Mohammed S. BenSaleh and
Zied Marrakchi and
Habib Mehrez and
Heni Ghariani and
Mohamed Abid},
editor = {Kaijian Shi and
Thomas B{\"{u}}chner and
Danella Zhao and
Ramalingam Sridhar},
title = {Flexible reconfigurable architecture for {DSP} applications},
booktitle = {27th {IEEE} International System-on-Chip Conference, {SOCC} 2014,
Las Vegas, NV, USA, September 2-5, 2014},
pages = {204--209},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SOCC.2014.6948927},
doi = {10.1109/SOCC.2014.6948927},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/ObeidQBMMGA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/AmouriMM13,
author = {Emna Amouri and
Habib Mehrez and
Zied Marrakchi},
title = {Impact of Dual Placement and Routing on {WDDL} Netlist Security in
{FPGA}},
journal = {Int. J. Reconfigurable Comput.},
volume = {2013},
pages = {802436:1--802436:24},
year = {2013},
url = {https://doi.org/10.1155/2013/802436},
doi = {10.1155/2013/802436},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/AmouriMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/TurkiMMA13,
author = {Mariem Turki and
Zied Marrakchi and
Habib Mehrez and
Mohamed Abid},
title = {Frequency Optimization Objective during System Prototyping on Multi-FPGA
Platform},
journal = {Int. J. Reconfigurable Comput.},
volume = {2013},
pages = {853510:1--853510:12},
year = {2013},
url = {https://doi.org/10.1155/2013/853510},
doi = {10.1155/2013/853510},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/TurkiMMA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Belloeil-DupuisCM13,
author = {Sophie Belloeil{-}Dupuis and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Exploring redundant arithmetics in computer-aided design of arithmetic
datapaths},
journal = {Integr.},
volume = {46},
number = {2},
pages = {104--118},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.002},
doi = {10.1016/J.VLSI.2012.02.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/Belloeil-DupuisCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/FarooqPMM13,
author = {Umer Farooq and
Husain Parvez and
Habib Mehrez and
Zied Marrakchi},
title = {Exploration and optimization of a homogeneous tree-based application
specific inflexible {FPGA}},
journal = {Microelectron. J.},
volume = {44},
number = {12},
pages = {1052--1062},
year = {2013},
url = {https://doi.org/10.1016/j.mejo.2012.12.010},
doi = {10.1016/J.MEJO.2012.12.010},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/FarooqPMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/DhiaPNMM13,
author = {Arwa Ben Dhia and
Samuel N. Pagliarini and
Lirida Alves de Barros Naviner and
Habib Mehrez and
Philippe Matherat},
title = {A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based
FPGAs},
journal = {Microelectron. Reliab.},
volume = {53},
number = {9-11},
pages = {1189--1193},
year = {2013},
url = {https://doi.org/10.1016/j.microrel.2013.06.014},
doi = {10.1016/J.MICROREL.2013.06.014},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mr/DhiaPNMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/PangraciousMM13,
author = {Vinod Pangracious and
Habib Mehrez and
Zied Marrakchi},
title = {Designing a 3D tree-based {FPGA:} Optimization of butterfly programmable
interconnect topology using 3D technology},
booktitle = {2013 {IEEE} International 3D Systems Integration Conference (3DIC),
San Francisco, CA, USA, October 2-4, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/3DIC.2013.6702342},
doi = {10.1109/3DIC.2013.6702342},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/3dic/PangraciousMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEssd/BelhadjBAMM13,
author = {Nidhameddine Belhadj and
Nejmeddine Bahri and
Mohamed Ali Ben Ayed and
Zied Marrakchi and
Habib Mehrez},
title = {Data level parallelism for {H264/AVC} baseline intra-prediction chain
on MPSoC},
booktitle = {10th International Multi-Conferences on Systems, Signals {\&}
Devices, {SSD} 2013, Hammamet, Tunisia, March 18-21, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/SSD.2013.6564040},
doi = {10.1109/SSD.2013.6564040},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEssd/BelhadjBAMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/PangraciousMAM13,
author = {Vinod Pangracious and
Zied Marrakchi and
Emna Amouri and
Habib Mehrez},
editor = {Philip Brisk and
Jos{\'{e}} Gabriel F. Coutinho and
Pedro C. Diniz},
title = {Performance Analysis and Optimization of High Density Tree-Based 3D
Multilevel {FPGA}},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
9th International Symposium, {ARC} 2013, Los Angeles, CA, USA, March
25-27, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7806},
pages = {197--209},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36812-7\_19},
doi = {10.1007/978-3-642-36812-7\_19},
timestamp = {Fri, 27 Mar 2020 08:54:48 +0100},
biburl = {https://dblp.org/rec/conf/arc/PangraciousMAM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/TurkiMMA13,
author = {Mariem Turki and
Zied Marrakchi and
Habib Mehrez and
Mohamed Abid},
editor = {Philip Brisk and
Jos{\'{e}} Gabriel F. Coutinho and
Pedro C. Diniz},
title = {Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping
Platform},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
9th International Symposium, {ARC} 2013, Los Angeles, CA, USA, March
25-27, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7806},
pages = {210--217},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36812-7\_20},
doi = {10.1007/978-3-642-36812-7\_20},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/TurkiMMA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/TangTMM13,
author = {Qingshan Tang and
Matthieu Tuna and
Zied Marrakchi and
Habib Mehrez},
editor = {Philip Brisk and
Jos{\'{e}} Gabriel F. Coutinho and
Pedro C. Diniz},
title = {Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
9th International Symposium, {ARC} 2013, Los Angeles, CA, USA, March
25-27, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7806},
pages = {221},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36812-7\_24},
doi = {10.1007/978-3-642-36812-7\_24},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/TangTMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/PangraciousMM13,
author = {Vinod Pangracious and
Habib Mehrez and
Zied Marrakchi},
title = {Architecture level {TSV} count minimization methodology for 3D tree-based
{FPGA}},
booktitle = {2013 {IEEE} Symposium on Low-Power and High-Speed Chips, {COOL} Chips
XVI, Yokohama, Japan, April 17-19, 2013},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CoolChips.2013.6547925},
doi = {10.1109/COOLCHIPS.2013.6547925},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/PangraciousMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpgaworld/PangraciousM0M13,
author = {Vinod Pangracious and
Habib Mehrez and
Umer Farooq and
Zied Marrakchi},
editor = {Lennart Lindh},
title = {High performance 3-dimensional heterogeneous tree-based {FPGA} architectures
{(HT-FPGA)}},
booktitle = {Proceedings of the 10th FPGAworld Conference, FPGAworld '13, Stockholm,
Sweden, September 10-12, 2013},
pages = {3:1--3:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2513683.2513686},
doi = {10.1145/2513683.2513686},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpgaworld/PangraciousM0M13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/PangraciousMM13,
author = {Vinod Pangracious and
Zied Marrakchi and
Habib Mehrez},
title = {Design and optimization of heterogeneous tree-based {FPGA} using 3D
technology},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {334--337},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718380},
doi = {10.1109/FPT.2013.6718380},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/PangraciousMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/DhiaRBNBCAMM13,
author = {Arwa Ben Dhia and
Saif{-}Ur Rehman and
Adrien Blanchardon and
Lirida A. B. Naviner and
Mounir Benabdenbi and
Roselyne Chotin{-}Avot and
Emna Amouri and
Habib Mehrez and
Zied Marrakchi},
title = {A defect-tolerant cluster in a mesh SRAM-based {FPGA}},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {434--437},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718407},
doi = {10.1109/FPT.2013.6718407},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/DhiaRBNBCAMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PangraciousAMM13,
author = {Vinod Pangracious and
Emna Amouri and
Habib Mehrez and
Zied Marrakchi},
editor = {Jos{\'{e}} Luis Ayala and
Alex K. Jones and
Patrick H. Madden and
Ayse K. Coskun},
title = {Physical design exploration of 3D tree-based {FPGA} architecture},
booktitle = {Great Lakes Symposium on {VLSI} 2013 (part of ECRC), GLSVLSI'13, Paris,
France, May 2-4, 2013},
pages = {335--336},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2483028.2483130},
doi = {10.1145/2483028.2483130},
timestamp = {Tue, 23 Jul 2019 15:03:09 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PangraciousAMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/PangraciousMM13,
author = {Vinod Pangracious and
Habib Mehrez and
Zied Marrakchi},
title = {{TSV} count minimization and thermal analysis for 3D Tree-based {FPGA}},
booktitle = {Proceedings of 2013 International Conference on {IC} Design {\&}
Technology, {ICICDT} 2013, Pavia, Italy, May 29-31, 2013},
pages = {223--226},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICICDT.2013.6563341},
doi = {10.1109/ICICDT.2013.6563341},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/icicdt/PangraciousMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/TurkiMMA13,
author = {Mariem Turki and
Habib Mehrez and
Zied Marrakchi and
Mohamed Abid},
editor = {Jari Nurmi and
Peeter Ellervee and
Leandro Soares Indrusiak and
Olli Vainio and
Sarang Thombre and
Jussi Raasakka},
title = {Partitioning constraints and signal routing approach for multi-FPGA
prototyping platform},
booktitle = {2013 International Symposium on System on Chip, ISSoC 2013, Tampere,
Finland, October 23-24, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSoC.2013.6675273},
doi = {10.1109/ISSOC.2013.6675273},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/issoc/TurkiMMA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/ChaeBOMFCM13,
author = {Jung Kyu Chae and
Severine Bertrand and
Pierre{-}Francois Ollagnon and
Paul Mougeat and
Jean{-}Arnaud Francois and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Efficient state-dependent power model for multi-bit flip-flop banks},
booktitle = {{IEEE} 56th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2013, Columbus, OH, USA, August 4-7, 2013},
pages = {461--464},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/MWSCAS.2013.6674685},
doi = {10.1109/MWSCAS.2013.6674685},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/ChaeBOMFCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/AbdellatifCM13,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Efficient {AES-GCM} for VPNs using FPGAs},
booktitle = {{IEEE} 56th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2013, Columbus, OH, USA, August 4-7, 2013},
pages = {1411--1414},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/MWSCAS.2013.6674921},
doi = {10.1109/MWSCAS.2013.6674921},
timestamp = {Sun, 29 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mwscas/AbdellatifCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/AbdellatifCM13,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Protecting {FPGA} bitstreams using authenticated encryption},
booktitle = {{IEEE} 11th International New Circuits and Systems Conference, {NEWCAS}
2013, Paris, France, June 16-19, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/NEWCAS.2013.6573635},
doi = {10.1109/NEWCAS.2013.6573635},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/newcas/AbdellatifCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/PangraciousMM13,
author = {Vinod Pangracious and
Habib Mehrez and
Zied Marrakchi},
title = {Designing 3D tree-based {FPGA:} Interconnect optimization and thermal
analysis},
booktitle = {{IEEE} 11th International New Circuits and Systems Conference, {NEWCAS}
2013, Paris, France, June 16-19, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/NEWCAS.2013.6573575},
doi = {10.1109/NEWCAS.2013.6573575},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/newcas/PangraciousMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AbdellatifCM13,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Lightweight and compact solutions for secure reconfiguration of FPGAs},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ReConFig.2013.6732304},
doi = {10.1109/RECONFIG.2013.6732304},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/AbdellatifCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AbdellatifCM13a,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Improved method for parallel {AES-GCM} cores using FPGAs},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ReConFig.2013.6732299},
doi = {10.1109/RECONFIG.2013.6732299},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/AbdellatifCM13a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AmouriBCMM13,
author = {Emna Amouri and
Adrien Blanchardon and
Roselyne Chotin{-}Avot and
Habib Mehrez and
Zied Marrakchi},
title = {Efficient multilevel interconnect topology for cluster-based mesh
{FPGA} architecture},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ReConFig.2013.6732282},
doi = {10.1109/RECONFIG.2013.6732282},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/AmouriBCMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/PangraciousMBMF13,
author = {Vinod Pangracious and
Habib Mehrez and
Nizar Beltaief and
Zied Marrakchi and
Umer Farooq},
title = {Exploration environment for 3D heterogeneous tree-based {FPGA} architectures
{(3D} {HT-FPGA)}},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ReConFig.2013.6732288},
doi = {10.1109/RECONFIG.2013.6732288},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/PangraciousMBMF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TangTM13,
author = {Qingshan Tang and
Matthieu Tuna and
Habib Mehrez},
title = {Routing algorithm for multi-FPGA based systems using multi-point physical
tracks},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {2--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683951},
doi = {10.1109/RSP.2013.6683951},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TangTM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/ChaeMFCM13,
author = {Jung Kyu Chae and
Paul Mougeat and
Jean{-}Arnaud Francois and
Roselyne Chotin{-}Avot and
Habib Mehrez},
editor = {Norbert Schuhmann and
Kaijian Shi and
Nagi Naganathan},
title = {A formalism of the specifications for library development},
booktitle = {2013 {IEEE} International {SOC} Conference, Erlangen, Germany, September
4-6, 2013},
pages = {307--312},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/SOCC.2013.6749706},
doi = {10.1109/SOCC.2013.6749706},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/ChaeMFCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wd/AbdellatifCM13,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {High speed authenticated encryption for slow changing key applications
using reconfigurable devices},
booktitle = {Proceedings of the {IFIP} Wireless Days, {WD} 2013, Valencia, Spain,
November 13-15, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/WD.2013.6686460},
doi = {10.1109/WD.2013.6686460},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/wd/AbdellatifCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/FarooqPMM12,
author = {Umer Farooq and
Husain Parvez and
Habib Mehrez and
Zied Marrakchi},
title = {A new heterogeneous tree-based application specific {FPGA} and its
comparison with mesh-based application specific {FPGA}},
journal = {Microprocess. Microsystems},
volume = {36},
number = {8},
pages = {588--605},
year = {2012},
url = {https://doi.org/10.1016/j.micpro.2012.06.012},
doi = {10.1016/J.MICPRO.2012.06.012},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/FarooqPMM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dtis/KilicMTM12,
author = {Alp Kili{\c{c}} and
Zied Marrakchi and
Matthieu Tuna and
Habib Mehrez},
title = {A logic sharing synthesis tool for mutually exclusive applications},
booktitle = {7th International Conference on Design {\&} Technology of Integrated
Systems in Nanoscale Era, Tunis, Tunisia, May 16-18, 2012},
pages = {1--6},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DTIS.2012.6232984},
doi = {10.1109/DTIS.2012.6232984},
timestamp = {Tue, 17 Aug 2021 21:08:13 +0200},
biburl = {https://dblp.org/rec/conf/dtis/KilicMTM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AbdellatifCM12,
author = {Karim M. Abdellatif and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Efficient parallel-pipelined {GHASH} for message authentication},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2012, Cancun, Mexico, December 5-7, 2012},
pages = {1--6},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ReConFig.2012.6416742},
doi = {10.1109/RECONFIG.2012.6416742},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/AbdellatifCM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/TurkiMM12,
author = {Mariem Turki and
Habib Mehrez and
Zied Marrakchi},
title = {Multi-FPGA prototyping environment: Large benchmark generation and
signals routing},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2012, Cancun, Mexico, December 5-7, 2012},
pages = {1--6},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ReConFig.2012.6416765},
doi = {10.1109/RECONFIG.2012.6416765},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/TurkiMM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TangMT12,
author = {Qingshan Tang and
Habib Mehrez and
Matthieu Tuna},
title = {Design for prototyping of a parameterizable cluster-based Multi-Core
System-on-Chip on a multi-FPGA board},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {71--77},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380693},
doi = {10.1109/RSP.2012.6380693},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TangMT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/FarooqPMM11,
author = {Umer Farooq and
Husain Parvez and
Habib Mehrez and
Zied Marrakchi},
title = {Exploration of Heterogeneous {FPGA} Architectures},
journal = {Int. J. Reconfigurable Comput.},
volume = {2011},
pages = {121404:1--121404:18},
year = {2011},
url = {https://doi.org/10.1155/2011/121404},
doi = {10.1155/2011/121404},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijrc/FarooqPMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/ParvezMKM11,
author = {Husain Parvez and
Zied Marrakchi and
Alp Kili{\c{c}} and
Habib Mehrez},
title = {Application-Specific {FPGA} using heterogeneous logic blocks},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {4},
number = {3},
pages = {24:1--24:14},
year = {2011},
url = {https://doi.org/10.1145/2000832.2000836},
doi = {10.1145/2000832.2000836},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/ParvezMKM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/FarooqPMM11,
author = {Umer Farooq and
Husain Parvez and
Zied Marrakchi and
Habib Mehrez},
editor = {Andreas Koch and
Ram Krishnamurthy and
John McAllister and
Roger F. Woods and
Tarek A. El{-}Ghazawi},
title = {Comparison between Heterogeneous Mesh-Based and Tree-Based Application
Specific {FPGA}},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
7th International Symposium, {ARC} 2011, Belfast, UK, March 23-25,
2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6578},
pages = {218--229},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-19475-7\_23},
doi = {10.1007/978-3-642-19475-7\_23},
timestamp = {Fri, 25 Feb 2022 16:33:50 +0100},
biburl = {https://dblp.org/rec/conf/arc/FarooqPMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Belloeil-DupuisCM11,
author = {Sophie Belloeil{-}Dupuis and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Stratus: Free design of highly parametrized {VLSI} modules interoperable
with commercial tools},
booktitle = {Proceedings of the 12th International Symposium on Quality Electronic
Design, {ISQED} 2011, Santa Clara, California, USA, 14-16 March 2011},
pages = {502--507},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISQED.2011.5770774},
doi = {10.1109/ISQED.2011.5770774},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/Belloeil-DupuisCM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/AmouriMM11,
author = {Emna Amouri and
Zied Marrakchi and
Habib Mehrez},
title = {Differential pair routing to balance dual signals of {WDDL} designs
in cluster-based Mesh {FPGA}},
booktitle = {Proceedings of the 6th International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011},
pages = {1--4},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ReCoSoC.2011.5981528},
doi = {10.1109/RECOSOC.2011.5981528},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/AmouriMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/AmouriMM10,
author = {Emna Amouri and
Zied Marrakchi and
Habib Mehrez},
title = {Controlled placement and routing techniques to improve timing balance
of {WDDL} designs in Mesh-based {FPGA}},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
Kuala Lumpur, Malaysia, December 6-9, 2010},
pages = {296--299},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/APCCAS.2010.5774878},
doi = {10.1109/APCCAS.2010.5774878},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/AmouriMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MarrakchiPKMM10,
author = {Zied Marrakchi and
Husain Parvez and
Alp Kili{\c{c}} and
Habib Mehrez and
Hmaied Marrakchi},
title = {On the optimization of {FPGA} area depending on target applications},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
Kuala Lumpur, Malaysia, December 6-9, 2010},
pages = {308--311},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/APCCAS.2010.5774849},
doi = {10.1109/APCCAS.2010.5774849},
timestamp = {Wed, 09 May 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/MarrakchiPKMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/ParvezMM10,
author = {Husain Parvez and
Zied Marrakchi and
Habib Mehrez},
editor = {Phaophak Sirisuk and
Fearghal Morgan and
Tarek A. El{-}Ghazawi and
Hideharu Amano},
title = {Application Specific {FPGA} Using Heterogeneous Logic Blocks},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 6th
International Symposium, {ARC} 2010, Bangkok, Thailand, March 17-19,
2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5992},
pages = {92--109},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-12133-3\_11},
doi = {10.1007/978-3-642-12133-3\_11},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/ParvezMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ParvezMM10,
author = {Husain Parvez and
Zied Marrakchi and
Habib Mehrez},
editor = {Peter Y. K. Cheung and
John Wawrzynek},
title = {Heterogeneous-ASIF: an application specific inflexible {FPGA} using
heterogeneous logic blocks (abstract only)},
booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
February 21-23, 2010},
pages = {290},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1723112.1723181},
doi = {10.1145/1723112.1723181},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ParvezMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/NouryM10,
author = {Ludovic Noury and
Habib Mehrez},
title = {A flexible realtime system for broadband time-frequency analysis in
130 {NM} {CMOS}},
booktitle = {17th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2010, Athens, Greece, 12-15 December, 2010},
pages = {251--254},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICECS.2010.5724501},
doi = {10.1109/ICECS.2010.5724501},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/NouryM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/TurkiAMM10,
author = {Mariem Turki and
Mohamed Abid and
Zied Marrakchi and
Habib Mehrez},
editor = {Yervant Zorian and
Imtinan Elahi and
Andr{\'{e}} Ivanov and
Ashraf Salem},
title = {Routability driven placement for mesh-based {FPGA} architecture},
booktitle = {5th International Design and Test Workshop, {IDT} 2010, Abu Dhabi,
UAE, 14-15 December 2010},
pages = {85--90},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IDT.2010.5724414},
doi = {10.1109/IDT.2010.5724414},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/idt/TurkiAMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/FarooqPMM10,
author = {Umer Farooq and
Husain Parvez and
Zied Marrakchi and
Habib Mehrez},
editor = {Michael H{\"{u}}bner and
Lo{\"{\i}}c Lagadec and
Oliver Sander and
J{\"{u}}rgen Becker},
title = {Exploration of Heterogeneous {FPGA} Architectures},
booktitle = {Proceedings of the 5th International Workshop on Reconfigurable Communication-centric
Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010},
series = {{KIT} Scientific Reports},
volume = {7551},
pages = {37--44},
publisher = {{KIT} Scientific Publishing},
year = {2010},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/FarooqPMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/MarrakchiMFM09,
author = {Zied Marrakchi and
Hayder Mrabet and
Umer Farooq and
Habib Mehrez},
title = {{FPGA} Interconnect Topologies Exploration},
journal = {Int. J. Reconfigurable Comput.},
volume = {2009},
pages = {259837:1--259837:13},
year = {2009},
url = {https://doi.org/10.1155/2009/259837},
doi = {10.1155/2009/259837},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijrc/MarrakchiMFM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/ParvezMM09,
author = {Husain Parvez and
Zied Marrakchi and
Habib Mehrez},
editor = {Neil W. Bergmann and
Oliver Diessel and
Lesley Shannon},
title = {{ASIF:} Application Specific Inflexible {FPGA}},
booktitle = {Proceedings of the 2009 International Conference on Field-Programmable
Technology, {FPT} 2009, Sydney, Australia, December 9-11, 2009},
pages = {112--119},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/FPT.2009.5377657},
doi = {10.1109/FPT.2009.5377657},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/ParvezMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/AmouriMMM09,
author = {Emna Amouri and
Hayder Mrabet and
Zied Marrakchi and
Habib Mehrez},
title = {Placement and routing techniques to improve delay balance of {WDDL}
netlist in {MFPGA}},
booktitle = {16th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
2009},
pages = {791--794},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICECS.2009.5410774},
doi = {10.1109/ICECS.2009.5410774},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/AmouriMMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AmouriMMM09,
author = {Emna Amouri and
Hayder Mrabet and
Zied Marrakchi and
Habib Mehrez},
editor = {Viktor K. Prasanna and
Lionel Torres and
Ren{\'{e}} Cumplido},
title = {Improving the Security of Dual Rail Logic in {FPGA} Using Controlled
Placement and Routing},
booktitle = {ReConFig'09: 2009 International Conference on Reconfigurable Computing
and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings},
pages = {201--206},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ReConFig.2009.44},
doi = {10.1109/RECONFIG.2009.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/AmouriMMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsi/AbrilMPGM08,
author = {Ana Abril and
Habib Mehrez and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Jean Gobert and
Carolina Miro},
title = {Estimation et optimisation de la consommation dans les SoC utilisant
la simulation pr{\'{e}}cise au cycle},
journal = {Tech. Sci. Informatiques},
volume = {27},
number = {1-2},
pages = {203--233},
year = {2008},
url = {https://doi.org/10.3166/tsi.27.203-233},
doi = {10.3166/TSI.27.203-233},
timestamp = {Wed, 24 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsi/AbrilMPGM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/ParvezMFM08,
author = {Husain Parvez and
Zied Marrakchi and
Umer Farooq and
Habib Mehrez},
editor = {Tarek A. El{-}Ghazawi and
Yao{-}Wen Chang and
Juinn{-}Dar Huang and
Proshanta Saha},
title = {A new coarse-grained {FPGA} architecture exploration environment},
booktitle = {2008 International Conference on Field-Programmable Technology, {FPT}
2008, Taipei, Taiwan, December 7-10, 2008},
pages = {285--288},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPT.2008.4762399},
doi = {10.1109/FPT.2008.4762399},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpt/ParvezMFM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MarrakchiMAM08,
author = {Zied Marrakchi and
Hayder Mrabet and
Emna Amouri and
Habib Mehrez},
editor = {Vijaykrishnan Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {Efficient tree topology for {FPGA} interconnect network},
booktitle = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
Orlando, Florida, USA, May 4-6, 2008},
pages = {321--326},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366110.1366186},
doi = {10.1145/1366110.1366186},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MarrakchiMAM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BelloeilCM08,
author = {Sophie Belloeil and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Arithmetic Data Path Optimization Using Borrow-Save Representation},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {4--9},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.29},
doi = {10.1109/ISVLSI.2008.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BelloeilCM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/FarooqMMM08,
author = {Umer Farooq and
Zied Marrakchi and
Hayder Mrabet and
Habib Mehrez},
title = {The Effect of {LUT} and Cluster Size on a Tree Based {FPGA} Architecture},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {115--120},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.28},
doi = {10.1109/RECONFIG.2008.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/FarooqMMM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/ParvezMM08,
author = {Husain Parvez and
Zied Marrakchi and
Habib Mehrez},
title = {Enhanced Methodology and Tools for Exploring Domain-Specific Coarse-Grained
FPGAs},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {121--126},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.53},
doi = {10.1109/RECONFIG.2008.53},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/ParvezMM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/MarrakchiMMM07,
author = {Zied Marrakchi and
Hayder Mrabet and
Christian Masson and
Habib Mehrez},
editor = {Hideharu Amano and
Andy Ye and
Takeshi Ikenaga},
title = {Efficient Mesh of Tree Interconnect for {FPGA} Architecture},
booktitle = {2007 International Conference on Field-Programmable Technology, {ICFPT}
2007, Kitakyushu, Japan, December 12-14, 2007},
pages = {269--272},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPT.2007.4439263},
doi = {10.1109/FPT.2007.4439263},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/MarrakchiMMM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/MarrakchiMMM07,
author = {Zied Marrakchi and
Hayder Mrabet and
Christian Masson and
Habib Mehrez},
title = {Mesh of Tree: Unifying Mesh and {MFPGA} for Better Device Performances},
booktitle = {First International Symposium on Networks-on-Chips, {NOCS} 2007, 7-9
May 2007, Princeton, New Jersey, USA, Proceedings},
pages = {243--252},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NOCS.2007.27},
doi = {10.1109/NOCS.2007.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/MarrakchiMMM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MrabetMSM06,
author = {Hayder Mrabet and
Zied Marrakchi and
Pierre Souillot and
Habib Mehrez},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A multilevel hierarchical interconnection structure for {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {225},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117239},
doi = {10.1145/1117201.1117239},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MrabetMSM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZiedHH06,
author = {Zied Marrakchi and
Hayder Mrabet and
Habib Mehrez},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Configuration tools for a new multilevel hierarchical {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {229},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117248},
doi = {10.1145/1117201.1117248},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZiedHH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/MrabetMSM06,
author = {Hayder Mrabet and
Zied Marrakchi and
Pierre Souillot and
Habib Mehrez},
editor = {Soha Hassoun},
title = {Performances improvement of {FPGA} using novel multilevel hierarchical
interconnection structure},
booktitle = {2006 International Conference on Computer-Aided Design, {ICCAD} 2006,
San Jose, CA, USA, November 5-9, 2006},
pages = {675--679},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1233501.1233642},
doi = {10.1145/1233501.1233642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/MrabetMSM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MarrakchiMM06,
author = {Zied Marrakchi and
Hayder Mrabet and
Habib Mehrez},
title = {A new Multilevel Hierarchical {MFPGA} and its suitable configuration
tools},
booktitle = {2006 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2006), 2-3 March 2006, Karlsruhe, Germany},
pages = {263--268},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISVLSI.2006.6},
doi = {10.1109/ISVLSI.2006.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/MarrakchiMM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/MrabetMSMT06,
author = {Hayder Mrabet and
Zied Marrakchi and
Pierre Souillot and
Habib Mehrez and
Andr{\'{e}} Tissot},
editor = {Gilles Sassatelli and
Leandro Soares Indrusiak and
Manfred Glesner and
Lionel Torres},
title = {Performance Improvement of {FPGA} Using Novel Multilevel Hierarchical
Interconnection Structure},
booktitle = {Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006},
pages = {117--123},
publisher = {Univ. Montpellier {II}},
year = {2006},
timestamp = {Mon, 13 Nov 2006 14:12:39 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/MrabetMSMT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/MarrakchiMM05,
author = {Zied Marrakchi and
Hayder Mrabet and
Habib Mehrez},
title = {Hierarchical {FPGA} clustering based on multilevel partitioning approach
to improve routability and reduce power dissipation},
booktitle = {2005 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RECONFIG.2005.23},
doi = {10.1109/RECONFIG.2005.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/MarrakchiMM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/MrabetMMT05,
author = {Hayder Mrabet and
Zied Marrakchi and
Habib Mehrez and
Andr{\'{e}} Tissot},
editor = {Gilles Sassatelli and
Manfred Glesner and
Lionel Torres and
Leandro Soares Indrusiak and
Thomas Hollstein},
title = {Implementation of Scalable Embedded {FPGA} for {SOC}},
booktitle = {Proceedings of the 1st International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005},
pages = {59--62},
publisher = {Univ. Montpellier {II}},
year = {2005},
timestamp = {Mon, 13 Nov 2006 14:44:44 +0100},
biburl = {https://dblp.org/rec/conf/recosoc/MrabetMMT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/na/Avot-ChotinM04,
author = {Roselyne Avot{-}Chotin and
Habib Mehrez},
title = {Hardware Implementation of Discrete Stochastic Arithmetic},
journal = {Numer. Algorithms},
volume = {37},
number = {1-4},
pages = {21--33},
year = {2004},
url = {https://doi.org/10.1023/B:NUMA.0000049455.07441.ee},
doi = {10.1023/B:NUMA.0000049455.07441.EE},
timestamp = {Sat, 25 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/na/Avot-ChotinM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/GarciaGDMP02,
author = {Ana Bel{\'{e}}n Abril Garc{\'{\i}}a and
Jean Gobert and
Thomas Dombek and
Habib Mehrez and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Cycle-accurate energy estimation in system level descriptions of embedded
systems},
booktitle = {Proceedings of the 2002 9th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2002, Dubrovnik, Croatia, September
15-18, 2002},
pages = {549--552},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ICECS.2002.1046224},
doi = {10.1109/ICECS.2002.1046224},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/GarciaGDMP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/ChotinM02,
author = {Roselyne Chotin and
Habib Mehrez},
title = {A floating-point unit using stochastic arithmetic compliant with the
{IEEE-754} standard},
booktitle = {Proceedings of the 2002 9th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2002, Dubrovnik, Croatia, September
15-18, 2002},
pages = {603--606},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ICECS.2002.1046241},
doi = {10.1109/ICECS.2002.1046241},
timestamp = {Fri, 15 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/ChotinM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BajotM01,
author = {Yann Bajot and
Habib Mehrez},
title = {Customizable {DSP} architecture for {ASIP} core design},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {302--305},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.922232},
doi = {10.1109/ISCAS.2001.922232},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BajotM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DumonteixBM01,
author = {Yannick Dumonteix and
Yann Bajot and
Habib Mehrez},
title = {A fast and low-power distance computation unit dedicated to neural
networks, based on redundant arithmetic},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {878--881},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.922378},
doi = {10.1109/ISCAS.2001.922378},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DumonteixBM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/camp/AberbourMDHLT00,
author = {Mourad Aberbour and
Habib Mehrez and
Fran{\c{c}}ois Durbin and
Jacques Haussy and
P. Lalande and
Andr{\'{e}} Tissot},
title = {A System-On-A-Chip for Pattern Recognition Architecture and Design
Methodology},
booktitle = {Fifth International Workshop on Computer Architectures for Machine
Perception {(CAMP} 2000), September 11-13, 2000, Padova, Italy},
pages = {155--162},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/CAMP.2000.875973},
doi = {10.1109/CAMP.2000.875973},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/camp/AberbourMDHLT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DumonteixM00,
author = {Yannick Dumonteix and
Habib Mehrez},
title = {A family of redundant multipliers dedicated to fast computation for
signal processing},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
May 2000, Proceedings},
pages = {325--328},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ISCAS.2000.857430},
doi = {10.1109/ISCAS.2000.857430},
timestamp = {Fri, 13 Aug 2021 09:26:01 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DumonteixM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/AberbourHMVG98,
author = {Mourad Aberbour and
A. Houelle and
Habib Mehrez and
Nicolas Vaucher and
Alain Guyot},
title = {On portable macrocell {FPU} generators for division and square root
operators complying to the full {IEEE-754} standard},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {6},
number = {1},
pages = {114--121},
year = {1998},
url = {https://doi.org/10.1109/92.661253},
doi = {10.1109/92.661253},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/AberbourHMVG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/AberbourDMV97,
author = {Mourad Aberbour and
Anne Derieux and
Habib Mehrez and
Nicolas Vaucher},
title = {Teaching the design of a chip under the Cadence Opus environment using
the Alliance cell libraries},
booktitle = {1997 {IEEE} International Conference on Microelectronic Systems Education,
{MSE} '97, Arlington, VA, USA, July 21-23, 1997},
pages = {81--82},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/MSE.1997.612556},
doi = {10.1109/MSE.1997.612556},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/AberbourDMV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/HouelleMVAG95,
author = {A. Houelle and
Habib Mehrez and
Nicolas Vaucher and
Luis A. Montalvo and
Alain Guyot},
title = {Application of fast layout synthesis environment to dividers evaluation},
booktitle = {12th Symposium on Computer Arithmetic {(ARITH-12} '95), July 19-21,
1995, Bath, England, {UK}},
pages = {67--74},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ARITH.1995.465375},
doi = {10.1109/ARITH.1995.465375},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/HouelleMVAG95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuyotMHMV95,
author = {Alain Guyot and
Luis A. Montalvo and
A. Houelle and
Habib Mehrez and
Nicolas Vaucher},
title = {Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers},
booktitle = {8th International Conference on {VLSI} Design {(VLSI} Design 1995),
4-7 January 1995, New Delhi, India},
pages = {386--391},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICVD.1995.512144},
doi = {10.1109/ICVD.1995.512144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuyotMHMV95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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