BibTeX records: Ramya Muralidharan

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@article{DBLP:journals/tcas/MuralidharanC13,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {Radix-4 and Radix-8 Booth Encoded Multi-Modulus Multipliers},
  journal   = {{IEEE} Trans. on Circuits and Systems},
  volume    = {60-I},
  number    = {11},
  pages     = {2940--2952},
  year      = {2013},
  url       = {https://doi.org/10.1109/TCSI.2013.2252642},
  doi       = {10.1109/TCSI.2013.2252642},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tcas/MuralidharanC13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MuralidharanC12,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {Area-Power Efficient Modulo 2\({}^{\mbox{n}}\)-1 and Modulo 2\({}^{\mbox{n}}\)+1
               Multipliers for \{2\({}^{\mbox{n}}\)-1, 2\({}^{\mbox{n}}\), 2\({}^{\mbox{n}}\)+1\}
               Based {RNS}},
  journal   = {{IEEE} Trans. on Circuits and Systems},
  volume    = {59-I},
  number    = {10},
  pages     = {2263--2274},
  year      = {2012},
  url       = {https://doi.org/10.1109/TCSI.2012.2185334},
  doi       = {10.1109/TCSI.2012.2185334},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tcas/MuralidharanC12},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MuralidharanC11,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {Radix-8 Booth Encoded Modulo 2 \({}^{\mbox{n}}\) -1 Multipliers With
               Adaptive Delay for High Dynamic Range Residue Number System},
  journal   = {{IEEE} Trans. on Circuits and Systems},
  volume    = {58-I},
  number    = {5},
  pages     = {982--993},
  year      = {2011},
  url       = {https://doi.org/10.1109/TCSI.2010.2092133},
  doi       = {10.1109/TCSI.2010.2092133},
  timestamp = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/tcas/MuralidharanC11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MuralidharanC11,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {A simple radix-4 Booth encoded modulo 2\({}^{\mbox{n}}\)+1 multiplier},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
               15-19 2011, Rio de Janeiro, Brazil},
  pages     = {1163--1166},
  year      = {2011},
  crossref  = {DBLP:conf/iscas/2011},
  url       = {https://doi.org/10.1109/ISCAS.2011.5937775},
  doi       = {10.1109/ISCAS.2011.5937775},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/MuralidharanC11},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MuralidharanC10,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {Fast hard multiple generators for radix-8 Booth encoded modulo 2\({}^{\mbox{n}}\)-1
               and modulo 2\({}^{\mbox{n}}\)+1 multipliers},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
               30 - June 2, 2010, Paris, France},
  pages     = {717--720},
  year      = {2010},
  crossref  = {DBLP:conf/iscas/2010},
  url       = {https://doi.org/10.1109/ISCAS.2010.5537480},
  doi       = {10.1109/ISCAS.2010.5537480},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/MuralidharanC10},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MuralidharanC09,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {Fixed and Variable Multi-modulus Squarer Architectures for Triple
               Moduli base of {RNS}},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
               May 2009, Taipei, Taiwan},
  pages     = {441--444},
  year      = {2009},
  crossref  = {DBLP:conf/iscas/2009},
  url       = {https://doi.org/10.1109/ISCAS.2009.5117780},
  doi       = {10.1109/ISCAS.2009.5117780},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/MuralidharanC09},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/MuralidharanCJ08,
  author    = {Ramya Muralidharan and
               Chip{-}Hong Chang and
               Ching{-}Chuen Jong},
  title     = {A low complexity modulo 2\({}^{\mbox{n}}\)+1 squarer design},
  booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
               Macao, China, November 30 2008 - December 3, 2008},
  pages     = {1296--1299},
  year      = {2008},
  crossref  = {DBLP:conf/apccas/2008},
  url       = {https://doi.org/10.1109/APCCAS.2008.4746265},
  doi       = {10.1109/APCCAS.2008.4746265},
  timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/apccas/MuralidharanCJ08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SatzodaMC08,
  author    = {Ravi Kumar Satzoda and
               Ramya Muralidharan and
               Chip{-}Hong Chang},
  title     = {Programmable LSB-first and MSB-first modular multipliers for {ECC}
               in GF(2\({}^{\mbox{m}}\))},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
               May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages     = {808--811},
  year      = {2008},
  crossref  = {DBLP:conf/iscas/2008},
  url       = {https://doi.org/10.1109/ISCAS.2008.4541541},
  doi       = {10.1109/ISCAS.2008.4541541},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/SatzodaMC08},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2011,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
               15-19 2011, Rio de Janeiro, Brazil},
  publisher = {{IEEE}},
  year      = {2011},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/5910713/proceeding},
  isbn      = {978-1-4244-9473-6},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/2011},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2010,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
               30 - June 2, 2010, Paris, France},
  publisher = {{IEEE}},
  year      = {2010},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/5512009/proceeding},
  isbn      = {978-1-4244-5308-5},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/2010},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2009,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
               May 2009, Taipei, Taiwan},
  publisher = {{IEEE}},
  year      = {2009},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/5076158/proceeding},
  isbn      = {978-1-4244-3827-3},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/2009},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/apccas/2008,
  title     = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
               Macao, China, November 30 2008 - December 3, 2008},
  publisher = {{IEEE}},
  year      = {2008},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/4723905/proceeding},
  isbn      = {978-1-4244-2342-2},
  timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/apccas/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2008,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
               May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  publisher = {{IEEE}},
  year      = {2008},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/4534149/proceeding},
  isbn      = {978-1-4244-1683-7},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/2008},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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