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ORCIDBibTeX records: Mike O'Connor
@article{DBLP:journals/tocs/PellauerCBCJLOPTTKE23,
author = {Michael Pellauer and
Jason Clemons and
Vignesh Balaji and
Neal Clayton Crago and
Aamer Jaleel and
Donghyuk Lee and
Mike O'Connor and
Anghsuman Parashar and
Sean Treichler and
Po{-}An Tsai and
Stephen W. Keckler and
Joel S. Emer},
title = {Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical
Heterogeneous Processing},
journal = {{ACM} Trans. Comput. Syst.},
volume = {41},
pages = {4:1--4:30},
year = {2023},
url = {https://doi.org/10.1145/3630007},
doi = {10.1145/3630007},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tocs/PellauerCBCJLOPTTKE23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SullivanSOLRHTH22,
author = {Michael B. Sullivan and
Nirmal R. Saxena and
Mike O'Connor and
Donghyuk Lee and
Paul Racunas and
Saurabh Hukerikar and
Timothy Tsai and
Siva Kumar Sastry Hari and
Stephen W. Keckler},
title = {Characterizing and Mitigating Soft Errors in {GPU} {DRAM}},
journal = {{IEEE} Micro},
volume = {42},
number = {4},
pages = {69--77},
year = {2022},
url = {https://doi.org/10.1109/MM.2022.3163122},
doi = {10.1109/MM.2022.3163122},
timestamp = {Mon, 25 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SullivanSOLRHTH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/OConnorLCSK22,
author = {Mike O'Connor and
Donghyuk Lee and
Niladrish Chatterjee and
Michael B. Sullivan and
Stephen W. Keckler},
title = {Saving {PAM4} Bus Energy with SMOREs: Sparse Multi-level Opportunistic
Restricted Encodings},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2022, Seoul, South Korea, April 2-6, 2022},
pages = {1001--1013},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/HPCA53966.2022.00077},
doi = {10.1109/HPCA53966.2022.00077},
timestamp = {Mon, 23 May 2022 16:36:22 +0200},
biburl = {https://dblp.org/rec/conf/hpca/OConnorLCSK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/MehrabiLCSLO21,
author = {Atefeh Mehrabi and
Donghyuk Lee and
Niladrish Chatterjee and
Daniel J. Sorin and
Benjamin C. Lee and
Mike O'Connor},
title = {Learning Sparse Matrix Row Permutations for Efficient SpMM on {GPU}
Architectures},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2021, Stony Brook, NY, USA, March 28-30, 2021},
pages = {48--58},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISPASS51385.2021.00016},
doi = {10.1109/ISPASS51385.2021.00016},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/MehrabiLCSLO21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/0001SOLRH0HK21,
author = {Michael B. Sullivan and
Nirmal R. Saxena and
Mike O'Connor and
Donghyuk Lee and
Paul Racunas and
Saurabh Hukerikar and
Timothy Tsai and
Siva Kumar Sastry Hari and
Stephen W. Keckler},
title = {Characterizing and Mitigating Soft Errors in {GPU} {DRAM}},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {641--653},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480111},
doi = {10.1145/3466752.3480111},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/0001SOLRH0HK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChoukseSOEPNK20,
author = {Esha Choukse and
Michael B. Sullivan and
Mike O'Connor and
Mattan Erez and
Jeff Pool and
David W. Nellans and
Stephen W. Keckler},
title = {Buddy Compression: Enabling Larger Memory for Deep Learning and {HPC}
Workloads on GPUs},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {926--939},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00080},
doi = {10.1109/ISCA45697.2020.00080},
timestamp = {Mon, 19 Feb 2024 07:32:24 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChoukseSOEPNK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/LymLOCE19,
author = {Sangkug Lym and
Donghyuk Lee and
Mike O'Connor and
Niladrish Chatterjee and
Mattan Erez},
title = {DeLTA: {GPU} Performance Model for Deep Learning Applications with
In-Depth Memory System Traffic Analysis},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2019, Madison, WI, USA, March 24-26, 2019},
pages = {293--303},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISPASS.2019.00041},
doi = {10.1109/ISPASS.2019.00041},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/LymLOCE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/FujikiCLO19,
author = {Daichi Fujiki and
Niladrish Chatterjee and
Donghyuk Lee and
Mike O'Connor},
editor = {Michela Taufer and
Pavan Balaji and
Antonio J. Pe{\~{n}}a},
title = {Near-memory data transformation for efficient sparse matrix multi-vector
multiplication},
booktitle = {Proceedings of the International Conference for High Performance Computing,
Networking, Storage and Analysis, {SC} 2019, Denver, Colorado, USA,
November 17-19, 2019},
pages = {55:1--55:17},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3295500.3356154},
doi = {10.1145/3295500.3356154},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sc/FujikiCLO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1903-02596,
author = {Esha Choukse and
Michael B. Sullivan and
Mike O'Connor and
Mattan Erez and
Jeff Pool and
David W. Nellans and
Stephen W. Keckler},
title = {Buddy Compression: Enabling Larger Memory for Deep Learning and {HPC}
Workloads on GPUs},
journal = {CoRR},
volume = {abs/1903.02596},
year = {2019},
url = {http://arxiv.org/abs/1903.02596},
eprinttype = {arXiv},
eprint = {1903.02596},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1903-02596.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1904-01691,
author = {Sangkug Lym and
Donghyuk Lee and
Mike O'Connor and
Niladrish Chatterjee and
Mattan Erez},
title = {DeLTA: {GPU} Performance Model for Deep Learning Applications with
In-depth Memory System Traffic Analysis},
journal = {CoRR},
volume = {abs/1904.01691},
year = {2019},
url = {http://arxiv.org/abs/1904.01691},
eprinttype = {arXiv},
eprint = {1904.01691},
timestamp = {Wed, 24 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1904-01691.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pomacs/GhoseYGLKLHCCAO18,
author = {Saugata Ghose and
Abdullah Giray Yaglik{\c{c}}i and
Raghav Gupta and
Donghyuk Lee and
Kais Kudrolli and
William X. Liu and
Hasan Hassan and
Kevin K. Chang and
Niladrish Chatterjee and
Aditya Agrawal and
Mike O'Connor and
Onur Mutlu},
title = {What Your {DRAM} Power Models Are Not Telling You: Lessons from a
Detailed Experimental Study},
journal = {Proc. {ACM} Meas. Anal. Comput. Syst.},
volume = {2},
number = {3},
pages = {38:1--38:41},
year = {2018},
url = {https://doi.org/10.1145/3224419},
doi = {10.1145/3224419},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pomacs/GhoseYGLKLHCCAO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LeeOC18,
author = {Donghyuk Lee and
Mike O'Connor and
Niladrish Chatterjee},
title = {Reducing Data Transfer Energy by Exploiting Similarity within a Data
Transaction},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2018, Vienna, Austria, February 24-28, 2018},
pages = {40--51},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/HPCA.2018.00014},
doi = {10.1109/HPCA.2018.00014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LeeOC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RhuOCPKK18,
author = {Minsoo Rhu and
Mike O'Connor and
Niladrish Chatterjee and
Jeff Pool and
Youngeun Kwon and
Stephen W. Keckler},
title = {Compressing {DMA} Engine: Leveraging Activation Sparsity for Training
Deep Neural Networks},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2018, Vienna, Austria, February 24-28, 2018},
pages = {78--91},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/HPCA.2018.00017},
doi = {10.1109/HPCA.2018.00017},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RhuOCPKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmetrics/GhoseYGLKLHCCAO18,
author = {Saugata Ghose and
Abdullah Giray Yaglik{\c{c}}i and
Raghav Gupta and
Donghyuk Lee and
Kais Kudrolli and
William X. Liu and
Hasan Hassan and
Kevin K. Chang and
Niladrish Chatterjee and
Aditya Agrawal and
Mike O'Connor and
Onur Mutlu},
editor = {Konstantinos Psounis and
Aditya Akella and
Adam Wierman},
title = {What Your {DRAM} Power Models Are Not Telling You: Lessons from a
Detailed Experimental Study},
booktitle = {Abstracts of the 2018 {ACM} International Conference on Measurement
and Modeling of Computer Systems, {SIGMETRICS} 2018, Irvine, CA, USA,
June 18-22, 2018},
pages = {110},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3219617.3219661},
doi = {10.1145/3219617.3219661},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sigmetrics/GhoseYGLKLHCCAO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1805-03175,
author = {Kevin K. Chang and
Abdullah Giray Yaglik{\c{c}}i and
Saugata Ghose and
Aditya Agrawal and
Niladrish Chatterjee and
Abhijith Kashyap and
Donghyuk Lee and
Mike O'Connor and
Hasan Hassan and
Onur Mutlu},
title = {Voltron: Understanding and Exploiting the Voltage-Latency-Reliability
Trade-Offs in Modern {DRAM} Chips to Improve Energy Efficiency},
journal = {CoRR},
volume = {abs/1805.03175},
year = {2018},
url = {http://arxiv.org/abs/1805.03175},
eprinttype = {arXiv},
eprint = {1805.03175},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1805-03175.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1807-05102,
author = {Saugata Ghose and
Abdullah Giray Yaglik{\c{c}}i and
Raghav Gupta and
Donghyuk Lee and
Kais Kudrolli and
William X. Liu and
Hasan Hassan and
Kevin K. Chang and
Niladrish Chatterjee and
Aditya Agrawal and
Mike O'Connor and
Onur Mutlu},
title = {What Your {DRAM} Power Models Are Not Telling You: Lessons from a
Detailed Experimental Study},
journal = {CoRR},
volume = {abs/1807.05102},
year = {2018},
url = {http://arxiv.org/abs/1807.05102},
eprinttype = {arXiv},
eprint = {1807.05102},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1807-05102.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pomacs/ChangYGACKLOHM17,
author = {Kevin K. Chang and
Abdullah Giray Yaglik{\c{c}}i and
Saugata Ghose and
Aditya Agrawal and
Niladrish Chatterjee and
Abhijith Kashyap and
Donghyuk Lee and
Mike O'Connor and
Hasan Hassan and
Onur Mutlu},
title = {Understanding Reduced-Voltage Operation in Modern {DRAM} Devices:
Experimental Characterization, Analysis, and Mechanisms},
journal = {Proc. {ACM} Meas. Anal. Comput. Syst.},
volume = {1},
number = {1},
pages = {10:1--10:42},
year = {2017},
url = {https://doi.org/10.1145/3084447},
doi = {10.1145/3084447},
timestamp = {Wed, 22 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pomacs/ChangYGACKLOHM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChatterjeeOLJKR17,
author = {Niladrish Chatterjee and
Mike O'Connor and
Donghyuk Lee and
Daniel R. Johnson and
Stephen W. Keckler and
Minsoo Rhu and
William J. Dally},
title = {Architecting an Energy-Efficient {DRAM} System for GPUs},
booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {73--84},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HPCA.2017.58},
doi = {10.1109/HPCA.2017.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChatterjeeOLJKR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/OConnorCLWAKD17,
author = {Mike O'Connor and
Niladrish Chatterjee and
Donghyuk Lee and
John M. Wilson and
Aditya Agrawal and
Stephen W. Keckler and
William J. Dally},
editor = {Hillery C. Hunter and
Jaime Moreno and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Fine-grained {DRAM:} energy-efficient {DRAM} for extreme bandwidth
systems},
booktitle = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
2017},
pages = {41--54},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3123939.3124545},
doi = {10.1145/3123939.3124545},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/OConnorCLWAKD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/KimCOH17,
author = {Gwangsun Kim and
Niladrish Chatterjee and
Mike O'Connor and
Kevin Hsieh},
editor = {Bernd Mohr and
Padma Raghavan},
title = {Toward standardized near-data processing with unrestricted data placement
for GPUs},
booktitle = {Proceedings of the International Conference for High Performance Computing,
Networking, Storage and Analysis, {SC} 2017, Denver, CO, USA, November
12 - 17, 2017},
pages = {24},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3126908.3126965},
doi = {10.1145/3126908.3126965},
timestamp = {Tue, 08 Nov 2022 16:03:02 +0100},
biburl = {https://dblp.org/rec/conf/sc/KimCOH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmetrics/ChangYGACKLOHM17,
author = {Kevin K. Chang and
Abdullah Giray Yaglik{\c{c}}i and
Saugata Ghose and
Aditya Agrawal and
Niladrish Chatterjee and
Abhijith Kashyap and
Donghyuk Lee and
Mike O'Connor and
Hasan Hassan and
Onur Mutlu},
editor = {Bruce E. Hajek and
Sewoong Oh and
Augustin Chaintreau and
Leana Golubchik and
Zhi{-}Li Zhang},
title = {Understanding Reduced-Voltage Operation in Modern {DRAM} Devices:
Experimental Characterization, Analysis, and Mechanisms},
booktitle = {Proceedings of the 2017 {ACM} {SIGMETRICS} / International Conference
on Measurement and Modeling of Computer Systems, Urbana-Champaign,
IL, USA, June 05 - 09, 2017},
pages = {52},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3078505.3078590},
doi = {10.1145/3078505.3078590},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sigmetrics/ChangYGACKLOHM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/RhuOCPK17,
author = {Minsoo Rhu and
Mike O'Connor and
Niladrish Chatterjee and
Jeff Pool and
Stephen W. Keckler},
title = {Compressing {DMA} Engine: Leveraging Activation Sparsity for Training
Deep Neural Networks},
journal = {CoRR},
volume = {abs/1705.01626},
year = {2017},
url = {http://arxiv.org/abs/1705.01626},
eprinttype = {arXiv},
eprint = {1705.01626},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/RhuOCPK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ChangYGACKLOHM17,
author = {Kevin K. Chang and
Abdullah Giray Yaglik{\c{c}}i and
Saugata Ghose and
Aditya Agrawal and
Niladrish Chatterjee and
Abhijith Kashyap and
Donghyuk Lee and
Mike O'Connor and
Hasan Hassan and
Onur Mutlu},
title = {Understanding Reduced-Voltage Operation in Modern {DRAM} Chips: Characterization,
Analysis, and Mechanisms},
journal = {CoRR},
volume = {abs/1705.10292},
year = {2017},
url = {http://arxiv.org/abs/1705.10292},
eprinttype = {arXiv},
eprint = {1705.10292},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ChangYGACKLOHM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HsiehEKCOVMK16,
author = {Kevin Hsieh and
Eiman Ebrahimi and
Gwangsun Kim and
Niladrish Chatterjee and
Mike O'Connor and
Nandita Vijaykumar and
Onur Mutlu and
Stephen W. Keckler},
title = {Transparent Offloading and Mapping {(TOM):} Enabling Programmer-Transparent
Near-Data Processing in {GPU} Systems},
booktitle = {43rd {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2016, Seoul, South Korea, June 18-22, 2016},
pages = {204--216},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISCA.2016.27},
doi = {10.1109/ISCA.2016.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HsiehEKCOVMK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/AgrawalOBCEK16,
author = {Aditya Agrawal and
Mike O'Connor and
Evgeny Bolotin and
Niladrish Chatterjee and
Joel S. Emer and
Stephen W. Keckler},
editor = {Bruce L. Jacob},
title = {{CLARA:} Circular Linked-List Auto and Self Refresh Architecture},
booktitle = {Proceedings of the Second International Symposium on Memory Systems,
{MEMSYS} 2016, Alexandria, VA, USA, October 3-6, 2016},
pages = {338--349},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2989081.2989084},
doi = {10.1145/2989081.2989084},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/AgrawalOBCEK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ChangLTEOMHSM16,
author = {Kevin Kai{-}Wei Chang and
Gabriel H. Loh and
Mithuna Thottethodi and
Yasuko Eckert and
Mike O'Connor and
Srilatha Manne and
Lisa Hsu and
Lavanya Subramanian and
Onur Mutlu},
title = {Enabling Efficient Dynamic Resizing of Large {DRAM} Caches via {A}
Hardware Consistent Hashing Mechanism},
journal = {CoRR},
volume = {abs/1602.00722},
year = {2016},
url = {http://arxiv.org/abs/1602.00722},
eprinttype = {arXiv},
eprint = {1602.00722},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ChangLTEOMHSM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PekhimenkoBOMMK15,
author = {Gennady Pekhimenko and
Evgeny Bolotin and
Mike O'Connor and
Onur Mutlu and
Todd C. Mowry and
Stephen W. Keckler},
title = {Toggle-Aware Compression for GPUs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {14},
number = {2},
pages = {164--168},
year = {2015},
url = {https://doi.org/10.1109/LCA.2015.2430853},
doi = {10.1109/LCA.2015.2430853},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/PekhimenkoBOMMK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BolotinNVORK15,
author = {Evgeny Bolotin and
David W. Nellans and
Oreste Villa and
Mike O'Connor and
Alex Ram{\'{\i}}rez and
Stephen W. Keckler},
title = {Designing Efficient Heterogeneous Memory Architectures},
journal = {{IEEE} Micro},
volume = {35},
number = {4},
pages = {60--68},
year = {2015},
url = {https://doi.org/10.1109/MM.2015.72},
doi = {10.1109/MM.2015.72},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BolotinNVORK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/OConnorS15,
author = {Mike O'Connor and
Earl E. Swartzlander Jr.},
editor = {Michael B. Matthews},
title = {Exploiting asymmetry in Booth-encoded multipliers for reduced energy
multiplication},
booktitle = {49th Asilomar Conference on Signals, Systems and Computers, {ACSSC}
2015, Pacific Grove, CA, USA, November 8-11, 2015},
pages = {722--726},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ACSSC.2015.7421228},
doi = {10.1109/ACSSC.2015.7421228},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/acssc/OConnorS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/AgarwalNSOK15,
author = {Neha Agarwal and
David W. Nellans and
Mark Stephenson and
Mike O'Connor and
Stephen W. Keckler},
editor = {{\"{O}}zcan {\"{O}}zturk and
Kemal Ebcioglu and
Sandhya Dwarkadas},
title = {Page Placement Strategies for GPUs within Heterogeneous Memory Systems},
booktitle = {Proceedings of the Twentieth International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2015, Istanbul, Turkey, March 14-18, 2015},
pages = {607--618},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2694344.2694381},
doi = {10.1145/2694344.2694381},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/AgarwalNSOK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cloud/HetheringtonOA15,
author = {Tayler H. Hetherington and
Mike O'Connor and
Tor M. Aamodt},
editor = {Shahram Ghandeharizadeh and
Sumita Barahmand and
Magdalena Balazinska and
Michael J. Freedman},
title = {MemcachedGPU: scaling-up scale-out key-value stores},
booktitle = {Proceedings of the Sixth {ACM} Symposium on Cloud Computing, SoCC
2015, Kohala Coast, Hawaii, USA, August 27-29, 2015},
pages = {43--57},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2806777.2806836},
doi = {10.1145/2806777.2806836},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cloud/HetheringtonOA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiRJOEBFR15,
author = {Dong Li and
Minsoo Rhu and
Daniel R. Johnson and
Mike O'Connor and
Mattan Erez and
Doug Burger and
Donald S. Fussell and
Stephen W. Redder},
title = {Priority-based cache allocation in throughput processors},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {89--100},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056024},
doi = {10.1109/HPCA.2015.7056024},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LiRJOEBFR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AgarwalNOKW15,
author = {Neha Agarwal and
David W. Nellans and
Mike O'Connor and
Stephen W. Keckler and
Thomas F. Wenisch},
title = {Unlocking bandwidth for GPUs in {CC-NUMA} systems},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {354--365},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056046},
doi = {10.1109/HPCA.2015.7056046},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/AgarwalNOKW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/StephensonHLEJN15,
author = {Mark Stephenson and
Siva Kumar Sastry Hari and
Yunsup Lee and
Eiman Ebrahimi and
Daniel R. Johnson and
David W. Nellans and
Mike O'Connor and
Stephen W. Keckler},
editor = {Deborah T. Marr and
David H. Albonesi},
title = {Flexible software profiling of {GPU} architectures},
booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
Architecture, Portland, OR, USA, June 13-17, 2015},
pages = {185--197},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2749469.2750375},
doi = {10.1145/2749469.2750375},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/StephensonHLEJN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RogersJOK15,
author = {Timothy G. Rogers and
Daniel R. Johnson and
Mike O'Connor and
Stephen W. Keckler},
editor = {Deborah T. Marr and
David H. Albonesi},
title = {A variable warp size architecture},
booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
Architecture, Portland, OR, USA, June 13-17, 2015},
pages = {489--501},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2749469.2750410},
doi = {10.1145/2749469.2750410},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/RogersJOK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/RogersOA14,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
title = {Learning your limit: managing massively multithreaded caches through
scheduling},
journal = {Commun. {ACM}},
volume = {57},
number = {12},
pages = {91--98},
year = {2014},
url = {https://doi.org/10.1145/2682583},
doi = {10.1145/2682583},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cacm/RogersOA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SinghSFOA14,
author = {Inderpreet Singh and
Arrvindh Shriraman and
Wilson W. L. Fung and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache Coherence for {GPU} Architectures},
journal = {{IEEE} Micro},
volume = {34},
number = {3},
pages = {69--79},
year = {2014},
url = {https://doi.org/10.1109/MM.2014.4},
doi = {10.1109/MM.2014.4},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SinghSFOA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SimLSO14,
author = {Jaewoong Sim and
Gabriel H. Loh and
Vilas Sridharan and
Mike O'Connor},
title = {A Configurable and Strong {RAS} Solution for Die-Stacked {DRAM} Caches},
journal = {{IEEE} Micro},
volume = {34},
number = {3},
pages = {80--90},
year = {2014},
url = {https://doi.org/10.1109/MM.2014.13},
doi = {10.1109/MM.2014.13},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SimLSO14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ElTantawyMOA14,
author = {Ahmed ElTantawy and
Jessica Wenjie Ma and
Mike O'Connor and
Tor M. Aamodt},
title = {A scalable multi-path microarchitecture for efficient {GPU} control
flow},
booktitle = {20th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2014, Orlando, FL, USA, February 15-19, 2014},
pages = {248--259},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HPCA.2014.6835936},
doi = {10.1109/HPCA.2014.6835936},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ElTantawyMOA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/ChatterjeeOLJB14,
author = {Niladrish Chatterjee and
Mike O'Connor and
Gabriel H. Loh and
Nuwan Jayasena and
Rajeev Balasubramonian},
editor = {Trish Damkroger and
Jack J. Dongarra},
title = {Managing {DRAM} Latency Divergence in Irregular {GPGPU} Applications},
booktitle = {International Conference for High Performance Computing, Networking,
Storage and Analysis, {SC} 2014, New Orleans, LA, USA, November 16-21,
2014},
pages = {128--139},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/SC.2014.16},
doi = {10.1109/SC.2014.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/ChatterjeeOLJB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/VillaJOBNLSWMSKD14,
author = {Oreste Villa and
Daniel R. Johnson and
Mike O'Connor and
Evgeny Bolotin and
David W. Nellans and
Justin Luitjens and
Nikolai Sakharnykh and
Peng Wang and
Paulius Micikevicius and
Anthony Scudiero and
Stephen W. Keckler and
William J. Dally},
editor = {Trish Damkroger and
Jack J. Dongarra},
title = {Scaling the Power Wall: {A} Path to Exascale},
booktitle = {International Conference for High Performance Computing, Networking,
Storage and Analysis, {SC} 2014, New Orleans, LA, USA, November 16-21,
2014},
pages = {830--841},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/SC.2014.73},
doi = {10.1109/SC.2014.73},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/VillaJOBNLSWMSKD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/RogersOA13,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache-Conscious Thread Scheduling for Massively Multithreaded Processors},
journal = {{IEEE} Micro},
volume = {33},
number = {3},
pages = {78--85},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.24},
doi = {10.1109/MM.2013.24},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/RogersOA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/JooybarFODA13,
author = {Hadi Jooybar and
Wilson W. L. Fung and
Mike O'Connor and
Joseph Devietti and
Tor M. Aamodt},
editor = {Vivek Sarkar and
Rastislav Bod{\'{\i}}k},
title = {GPUDet: a deterministic {GPU} architecture},
booktitle = {Architectural Support for Programming Languages and Operating Systems,
{ASPLOS} 2013, Houston, TX, USA, March 16-20, 2013},
pages = {1--12},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2451116.2451118},
doi = {10.1145/2451116.2451118},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/JooybarFODA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SinghSFOA13,
author = {Inderpreet Singh and
Arrvindh Shriraman and
Wilson W. L. Fung and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache coherence for {GPU} architectures},
booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2013, Shenzhen, China, February 23-27, 2013},
pages = {578--590},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HPCA.2013.6522351},
doi = {10.1109/HPCA.2013.6522351},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SinghSFOA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SimLSO13,
author = {Jaewoong Sim and
Gabriel H. Loh and
Vilas Sridharan and
Mike O'Connor},
editor = {Avi Mendelson},
title = {Resilient die-stacked {DRAM} caches},
booktitle = {The 40th Annual International Symposium on Computer Architecture,
ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
pages = {416--427},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2485922.2485958},
doi = {10.1145/2485922.2485958},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/SimLSO13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RogersOA13,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
editor = {Matthew K. Farrens and
Christos Kozyrakis},
title = {Divergence-aware warp scheduling},
booktitle = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
MICRO-46, Davis, CA, USA, December 7-11, 2013},
pages = {99--110},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2540708.2540718},
doi = {10.1145/2540708.2540718},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/RogersOA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OConnor12,
author = {Mike O'Connor},
title = {Accelerated processing and the Fusion System Architecture},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {93},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6165070},
doi = {10.1109/ASPDAC.2012.6165070},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OConnor12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/HetheringtonRHOA12,
author = {Tayler H. Hetherington and
Timothy G. Rogers and
Lisa Hsu and
Mike O'Connor and
Tor M. Aamodt},
editor = {Rajeev Balasubramonian and
Vijayalakshmi Srinivasan},
title = {Characterizing and evaluating a key-value store application on heterogeneous
{CPU-GPU} systems},
booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
{\&} Software, New Brunswick, NJ, USA, April 1-3, 2012},
pages = {88--98},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISPASS.2012.6189209},
doi = {10.1109/ISPASS.2012.6189209},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispass/HetheringtonRHOA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RogersOA12,
author = {Timothy G. Rogers and
Mike O'Connor and
Tor M. Aamodt},
title = {Cache-Conscious Wavefront Scheduling},
booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
pages = {72--83},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MICRO.2012.16},
doi = {10.1109/MICRO.2012.16},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/RogersOA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SimLKOT12,
author = {Jaewoong Sim and
Gabriel H. Loh and
Hyesoon Kim and
Mike O'Connor and
Mithuna Thottethodi},
title = {A Mostly-Clean {DRAM} Cache for Effective Hit Speculation and Self-Balancing
Dispatch},
booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
pages = {247--257},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MICRO.2012.31},
doi = {10.1109/MICRO.2012.31},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/SimLKOT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpc/JohnstonMOCBDGGO06,
author = {William E. Johnston and
Joe Metzger and
Mike O'Connor and
Michael Collins and
Joseph Burrescia and
Eli Dart and
Jim Gagliardi and
Chin Guok and
Kevin Oberman},
editor = {Lucio Grandinetti},
title = {Network Communication as a Service-Oriented Capability},
booktitle = {High Performance Computing and Grids in Action - Selected Papers from
the 2006 International Advanced Research Workshop on High Performance
Computing and Grids, Cetraro, Italy, 2006},
series = {Advances in Parallel Computing},
volume = {16},
pages = {96--127},
publisher = {{IOS} Press},
year = {2006},
timestamp = {Mon, 03 Jun 2013 17:31:05 +0200},
biburl = {https://dblp.org/rec/conf/hpc/JohnstonMOCBDGGO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/OConnorG01,
author = {Mike O'Connor and
Christopher A. Gomez},
title = {The iFlow Address Processor},
journal = {{IEEE} Micro},
volume = {21},
number = {2},
pages = {16--23},
year = {2001},
url = {https://doi.org/10.1109/40.917999},
doi = {10.1109/40.917999},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/OConnorG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/HangalO99,
author = {Sudheendra Hangal and
Mike O'Connor},
title = {Performance analysis and validation of the picoJava processor},
journal = {{IEEE} Micro},
volume = {19},
number = {3},
pages = {66--72},
year = {1999},
url = {https://doi.org/10.1109/40.768505},
doi = {10.1109/40.768505},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/HangalO99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/McGhanO98,
author = {Harlan McGhan and
Mike O'Connor},
title = {PicoJava: {A} Direct Execution Engine For Java Bytecode},
journal = {Computer},
volume = {31},
number = {10},
pages = {22--30},
year = {1998},
url = {https://doi.org/10.1109/2.722273},
doi = {10.1109/2.722273},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/McGhanO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/webnet/ChildersBO98,
author = {Chad Childers and
Linda Bangert and
Mike O'Connor},
editor = {Hermann A. Maurer and
Richard G. Olson},
title = {Tracking Web Usage with Network Flight Recorder},
booktitle = {Proceedings of WebNet 98 - World Conference on the {WWW} and Internet
{\&} Intranet, Orlando, Florida, USA, November 7-12, 1998},
publisher = {{AACE}},
year = {1998},
timestamp = {Sat, 07 Sep 2019 11:59:24 +0200},
biburl = {https://dblp.org/rec/conf/webnet/ChildersBO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/webnet/ChildersOBO97,
author = {Chad Childers and
Iain O'Cain and
Linda Bangert and
Mike O'Connor},
editor = {Suave Lobodzinski and
Ivan Tomek},
title = {Open Standard Content Cookies: Utility vs. Privacy},
booktitle = {Proceedings of WebNet 97 - World Conference on the WWW, Internet {\&}
Intranet, Toronto, Canada, November 1-5, 1997},
publisher = {{AACE}},
year = {1997},
timestamp = {Sat, 07 Sep 2019 11:59:24 +0200},
biburl = {https://dblp.org/rec/conf/webnet/ChildersOBO97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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