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ORCIDBibTeX records: Davide Rossetti
@article{DBLP:journals/corr/abs-2201-01088,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Alessandro Lonardo and
Francesca Lo Cicero and
Michele Martinelli and
Pier Stanislao Paolucci and
Elena Pastorelli and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {Architectural improvements and technological enhancements for the
APEnet+ interconnect system},
journal = {CoRR},
volume = {abs/2201.01088},
year = {2022},
url = {https://arxiv.org/abs/2201.01088},
eprinttype = {arXiv},
eprint = {2201.01088},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2201-01088.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/BernaschiAR21,
author = {Massimo Bernaschi and
Elena Agostini and
Davide Rossetti},
title = {Benchmarking multi-GPU applications on modern multi-GPU integrated
systems},
journal = {Concurr. Comput. Pract. Exp.},
volume = {33},
number = {14},
year = {2021},
url = {https://doi.org/10.1002/cpe.5470},
doi = {10.1002/CPE.5470},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/concurrency/BernaschiAR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/AgostiniRP18,
author = {Elena Agostini and
Davide Rossetti and
Sreeram Potluri},
title = {GPUDirect Async: Exploring {GPU} synchronous communication techniques
for InfiniBand clusters},
journal = {J. Parallel Distributed Comput.},
volume = {114},
pages = {28--45},
year = {2018},
url = {https://doi.org/10.1016/j.jpdc.2017.12.007},
doi = {10.1016/J.JPDC.2017.12.007},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/AgostiniRP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccgrid/AgostiniRP17,
author = {Elena Agostini and
Davide Rossetti and
Sreeram Potluri},
title = {Offloading communication control logic in {GPU} accelerated applications},
booktitle = {Proceedings of the 17th {IEEE/ACM} International Symposium on Cluster,
Cloud and Grid Computing, {CCGRID} 2017, Madrid, Spain, May 14-17,
2017},
pages = {248--257},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2017},
url = {https://doi.org/10.1109/CCGRID.2017.29},
doi = {10.1109/CCGRID.2017.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ccgrid/AgostiniRP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/PotluriGRNVI17,
author = {Sreeram Potluri and
Anshuman Goswami and
Davide Rossetti and
Chris J. Newburn and
Manjunath Gorentla Venkata and
Neena Imam},
title = {GPU-Centric Communication on {NVIDIA} {GPU} Clusters with InfiniBand:
{A} Case Study with OpenSHMEM},
booktitle = {24th {IEEE} International Conference on High Performance Computing,
HiPC 2017, Jaipur, India, December 18-21, 2017},
pages = {253--262},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HiPC.2017.00037},
doi = {10.1109/HIPC.2017.00037},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/PotluriGRNVI17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/VenkateshHPRCP17,
author = {Akshay Venkatesh and
Khaled Hamidouche and
Sreeram Potluri and
Davide Rossetti and
Ching{-}Hsiang Chu and
Dhabaleswar K. Panda},
title = {{MPI-GDS:} High Performance {MPI} Designs with GPUDirect-aSync for
{CPU-GPU} Control Flow Decoupling},
booktitle = {46th International Conference on Parallel Processing, {ICPP} 2017,
Bristol, United Kingdom, August 14-17, 2017},
pages = {151--160},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICPP.2017.24},
doi = {10.1109/ICPP.2017.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/VenkateshHPRCP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/PaolucciBMRSTBB16,
author = {Pier Stanislao Paolucci and
Andrea Biagioni and
Luis Gabriel Murillo and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Lars Schor and
Laura Tosoratto and
Iuliana Bacivarov and
Robert Lajos B{\"{u}}cs and
Cl{\'{e}}ment Deschamps and
Ashraf El Antably and
Roberto Ammendola and
Nicolas Fournel and
Ottorino Frezza and
Rainer Leupers and
Francesca Lo Cicero and
Alessandro Lonardo and
Michele Martinelli and
Elena Pastorelli and
Devendra Rai and
Davide Rossetti and
Francesco Simula},
title = {Dynamic many-process applications on many-tile embedded systems and
{HPC} clusters: The {EURETILE} programming environment and execution
platforms},
journal = {J. Syst. Archit.},
volume = {69},
pages = {29--53},
year = {2016},
url = {https://doi.org/10.1016/j.sysarc.2015.11.008},
doi = {10.1016/J.SYSARC.2015.11.008},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/PaolucciBMRSTBB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/AmmendolaBFCLPR15,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {A hierarchical watchdog mechanism for systemic fault awareness on
distributed systems},
journal = {Future Gener. Comput. Syst.},
volume = {53},
pages = {90--99},
year = {2015},
url = {https://doi.org/10.1016/j.future.2014.12.015},
doi = {10.1016/J.FUTURE.2014.12.015},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/AmmendolaBFCLPR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/AmmendolaBFGGCL15,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Werner Geurts and
Gert Goossens and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {{ASIP} acceleration for virtual-to-physical address translation on
RDMA-enabled FPGA-based network interfaces},
journal = {Future Gener. Comput. Syst.},
volume = {53},
pages = {109--118},
year = {2015},
url = {https://doi.org/10.1016/j.future.2014.12.012},
doi = {10.1016/J.FUTURE.2014.12.012},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/AmmendolaBFGGCL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hoti/ShamisVLBHIDSGL15,
author = {Pavel Shamis and
Manjunath Gorentla Venkata and
M. Graham Lopez and
Matthew B. Baker and
Oscar R. Hernandez and
Yossi Itigin and
Mike Dubman and
Gilad Shainer and
Richard L. Graham and
Liran Liss and
Yiftah Shahar and
Sreeram Potluri and
Davide Rossetti and
Donald Becker and
Duncan Poole and
Christopher Lamb and
Sameer Kumar and
Craig B. Stunkel and
George Bosilca and
Aur{\'{e}}lien Bouteiller},
title = {{UCX:} An Open Source Framework for {HPC} Network APIs and Beyond},
booktitle = {23rd {IEEE} Annual Symposium on High-Performance Interconnects, {HOTI}
2015, Santa Clara, CA, USA, August 26-28, 2015},
pages = {40--43},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HOTI.2015.13},
doi = {10.1109/HOTI.2015.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hoti/ShamisVLBHIDSGL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/openshmem/PotluriRBPVHSLB15,
author = {Sreeram Potluri and
Davide Rossetti and
Donald Becker and
Duncan Poole and
Manjunath Gorentla Venkata and
Oscar R. Hernandez and
Pavel Shamis and
M. Graham Lopez and
Matthew B. Baker and
Wendy Poole},
editor = {Manjunath Gorentla Venkata and
Pavel Shamis and
Neena Imam and
M. Graham Lopez},
title = {Exploring OpenSHMEM Model to Program GPU-based Extreme-Scale Systems},
booktitle = {OpenSHMEM and Related Technologies. Experiences, Implementations,
and Technologies - Second Workshop, OpenSHMEM 2015, Annapolis, MD,
USA, August 4-6, 2015. Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {9397},
pages = {18--35},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-26428-8\_2},
doi = {10.1007/978-3-319-26428-8\_2},
timestamp = {Sat, 19 Oct 2019 20:06:42 +0200},
biburl = {https://dblp.org/rec/conf/openshmem/PotluriRBPVHSLB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/ShiPHPLRP14,
author = {Rong Shi and
Sreeram Potluri and
Khaled Hamidouche and
Jonathan L. Perkins and
Mingzhe Li and
Davide Rossetti and
Dhabaleswar K. Panda},
title = {Designing efficient small message transfer mechanism for inter-node
{MPI} communication on InfiniBand {GPU} clusters},
booktitle = {21st International Conference on High Performance Computing, HiPC
2014, Goa, India, December 17-20, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HiPC.2014.7116873},
doi = {10.1109/HIPC.2014.7116873},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/ShiPHPLRP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/srds/AmmendolaBFCLPRSTV14,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {{LO-FA-MO:} Fault Detection and Systemic Awareness for the QUonG Computing
System},
booktitle = {33rd {IEEE} International Symposium on Reliable Distributed Systems,
{SRDS} 2014, Nara, Japan, October 6-9, 2014},
pages = {265--270},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/SRDS.2014.33},
doi = {10.1109/SRDS.2014.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/srds/AmmendolaBFCLPRSTV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/LonardoAABFLCMPPPRSSSTV14,
author = {Alessandro Lonardo and
F. Ameli and
Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
G. Lamanna and
Francesca Lo Cicero and
Maurizio Martinelli and
Pier Stanislao Paolucci and
Elena Pastorelli and
Luca Pontisso and
Davide Rossetti and
F. Simeone and
Francesco Simula and
M. Sozzi and
Laura Tosoratto and
Piero Vicini},
title = {NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface
Card with GPUDirect Features},
journal = {CoRR},
volume = {abs/1406.3568},
year = {2014},
url = {http://arxiv.org/abs/1406.3568},
eprinttype = {arXiv},
eprint = {1406.3568},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/LonardoAABFLCMPPPRSSSTV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/BernaschiBR13,
author = {Massimo Bernaschi and
Mauro Bisson and
Davide Rossetti},
title = {Benchmarking of communication techniques for GPUs},
journal = {J. Parallel Distributed Comput.},
volume = {73},
number = {2},
pages = {250--255},
year = {2013},
url = {https://doi.org/10.1016/j.jpdc.2012.09.006},
doi = {10.1016/J.JPDC.2012.09.006},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/BernaschiBR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AmmendolaBFCLPRSTV13,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {Virtual-to-Physical address translation for an FPGA-based interconnect
with host and {GPU} remote {DMA} capabilities},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {58--65},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718331},
doi = {10.1109/FPT.2013.6718331},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/AmmendolaBFCLPRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/AmmendolaBBBFFCLMPRSTV13,
author = {Roberto Ammendola and
Massimo Bernaschi and
Andrea Biagioni and
Mauro Bisson and
Massimiliano Fatica and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Enrico Mastrostefano and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {{GPU} Peer-to-Peer Techniques Applied to a Cluster Interconnect},
booktitle = {2013 {IEEE} International Symposium on Parallel {\&} Distributed
Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24,
2013},
pages = {806--815},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/IPDPSW.2013.128},
doi = {10.1109/IPDPSW.2013.128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/AmmendolaBBBFFCLMPRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AmmendolaBFCLPRSTV13,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {Design and implementation of a modular, low latency, fault-aware,
FPGA-based network interface},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ReConFig.2013.6732275},
doi = {10.1109/RECONFIG.2013.6732275},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/AmmendolaBFCLPRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/AmmendolaBFCLPRSTV13,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {'Mutual Watch-dog Networking': Distributed Awareness of Faults and
Critical Events in Petascale/Exascale systems},
journal = {CoRR},
volume = {abs/1307.0433},
year = {2013},
url = {http://arxiv.org/abs/1307.0433},
eprinttype = {arXiv},
eprint = {1307.0433},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/AmmendolaBFCLPRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/AmmendolaBFGGCLPRSTV13,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Werner Geurts and
Gert Goossens and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {A heterogeneous many-core platform for experiments on scalable custom
interconnects and management of fault and critical events, applied
to many-process applications: Vol. II, 2012 technical report},
journal = {CoRR},
volume = {abs/1307.1270},
year = {2013},
url = {http://arxiv.org/abs/1307.1270},
eprinttype = {arXiv},
eprint = {1307.1270},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/AmmendolaBFGGCLPRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/AmmendolaBBBFFCLMPRSTV13,
author = {Roberto Ammendola and
Massimo Bernaschi and
Andrea Biagioni and
Mauro Bisson and
Massimiliano Fatica and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Enrico Mastrostefano and
Pier Stanislao Paolucci and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {{GPU} peer-to-peer techniques applied to a cluster interconnect},
journal = {CoRR},
volume = {abs/1307.8276},
year = {2013},
url = {http://arxiv.org/abs/1307.8276},
eprinttype = {arXiv},
eprint = {1307.8276},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/AmmendolaBBBFFCLMPRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/AmmendolaBFCPLRSTV13,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Pier Stanislao Paolucci and
Alessandro Lonardo and
Davide Rossetti and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {Architectural improvements and 28 nm {FPGA} implementation of the
APEnet+ 3D Torus network for hybrid {HPC} systems},
journal = {CoRR},
volume = {abs/1311.1741},
year = {2013},
url = {http://arxiv.org/abs/1311.1741},
eprinttype = {arXiv},
eprint = {1311.1741},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/AmmendolaBFCPLRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/AmmendolaBFLLCPPRSSTV13,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
G. Lamanna and
Alessandro Lonardo and
Francesca Lo Cicero and
Pier Stanislao Paolucci and
F. Pantaleo and
Davide Rossetti and
Francesco Simula and
M. Sozzi and
Laura Tosoratto and
Piero Vicini},
title = {NaNet: a flexible and configurable low-latency {NIC} for real-time
trigger systems based on GPUs},
journal = {CoRR},
volume = {abs/1311.4007},
year = {2013},
url = {http://arxiv.org/abs/1311.4007},
eprinttype = {arXiv},
eprint = {1311.4007},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/AmmendolaBFLLCPPRSSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/BernaschiBMR12,
author = {Massimo Bernaschi and
Mauro Bisson and
Enrico Mastrostefano and
Davide Rossetti},
title = {Breadth First Search on APEnet+},
booktitle = {2012 {SC} Companion: High Performance Computing, Networking Storage
and Analysis, Salt Lake City, UT, USA, November 10-16, 2012},
pages = {248--253},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/SC.Companion.2012.41},
doi = {10.1109/SC.COMPANION.2012.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/BernaschiBMR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1203-1536,
author = {Andrea Biagioni and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Mersia Perra and
Davide Rossetti and
Carlo Sidore and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {The Distributed Network Processor: a novel off-chip and on-chip interconnection
network architecture},
journal = {CoRR},
volume = {abs/1203.1536},
year = {2012},
url = {http://arxiv.org/abs/1203.1536},
eprinttype = {arXiv},
eprint = {1203.1536},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1203-1536.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1102-3796,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Davide Rossetti and
Andrea Salamon and
Gaetano Salina and
Francesco Simula and
Laura Tosoratto and
Piero Vicini},
title = {APEnet+: high bandwidth 3D torus direct network for petaflops scale
commodity clusters},
journal = {CoRR},
volume = {abs/1102.3796},
year = {2011},
url = {http://arxiv.org/abs/1102.3796},
eprinttype = {arXiv},
eprint = {1102.3796},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1102-3796.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1012-0253,
author = {Roberto Ammendola and
Andrea Biagioni and
Ottorino Frezza and
Francesca Lo Cicero and
Alessandro Lonardo and
Pier Stanislao Paolucci and
Roberto Petronzio and
Davide Rossetti and
Andrea Salamon and
Gaetano Salina and
Francesco Simula and
Nazario Tantalo and
Laura Tosoratto and
Piero Vicini},
title = {APEnet+: a 3D toroidal network enabling Petaflops scale Lattice {QCD}
simulations on commodity clusters},
journal = {CoRR},
volume = {abs/1012.0253},
year = {2010},
url = {http://arxiv.org/abs/1012.0253},
eprinttype = {arXiv},
eprint = {1012.0253},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1012-0253.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Chagoya-GarzonGRPRLVP09,
author = {Alexandre Chagoya{-}Garzon and
Xavier Guerin and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Davide Rossetti and
Alessandro Lonardo and
Piero Vicini and
Pier Stanislao Paolucci},
title = {Synthesis of Communication Mechanisms for Multi-tile Systems Based
on Heterogeneous Multi-processor System-On-Chips},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {48--54},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.12},
doi = {10.1109/RSP.2009.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Chagoya-GarzonGRPRLVP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cse/BellettiSTBBMPCLLRVLMPSMPR06,
author = {Francesco Belletti and
Sebastiano Fabio Schifano and
Raffaele Tripiccione and
Fran{\c{c}}ois Bodin and
Philippe Boucaud and
Jacques Micheli and
Olivier P{\`{e}}ne and
Nicola Cabibbo and
Sergio de Luca and
Alessandro Lonardo and
Davide Rossetti and
Piero Vicini and
Maxim Lukyanov and
Laurent Morin and
Norbert Paschedag and
Hubert Simma and
Vincent Morenas and
Dirk Pleiter and
Federico Rapuano},
title = {Computing for {LQCD:} apeNEXT},
journal = {Comput. Sci. Eng.},
volume = {8},
number = {1},
pages = {18--29},
year = {2006},
url = {https://doi.org/10.1109/MCSE.2006.4},
doi = {10.1109/MCSE.2006.4},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cse/BellettiSTBBMPCLLRVLMPSMPR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cluster/AmmendolaGMPPRSV04,
author = {Roberto Ammendola and
M. Guagnelli and
G. Mazza and
Filippo Palombi and
Roberto Petronzio and
Davide Rossetti and
Andrea Salamon and
Piero Vicini},
title = {APENet: a high speed, low latency 3D interconnect network},
booktitle = {2004 {IEEE} International Conference on Cluster Computing {(CLUSTER}
2004), September 20-23 2004, San Diego, California, {USA}},
pages = {481},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/CLUSTR.2004.1392647},
doi = {10.1109/CLUSTR.2004.1392647},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cluster/AmmendolaGMPPRSV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcn/AgliettiBBCCMMPPRRSTVCCELMT97,
author = {F. Aglietti and
A. Bartolini and
Claudia Battista and
Simone Cabasino and
M. Cosimi and
A. Michelotti and
A. Monello and
Emanuele Panizzi and
Pier Stanislao Paolucci and
W. Rinaldi and
Davide Rossetti and
Hubert Simma and
Mario Torelli and
Piero Vicini and
Nicola Cabibbo and
E. Centurioni and
W. Errico and
F. Laico and
Guido Magazz{\`{u}} and
Raffaele Tripiccione},
editor = {Louis O. Hertzberger and
Peter M. A. Sloot},
title = {The Teraflop Parallel Computer APEmille},
booktitle = {High-Performance Computing and Networking, International Conference
and Exhibition, {HPCN} Europe 1997, Vienna, Austria, April 28-30,
1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1225},
pages = {991--993},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/BFb0031679},
doi = {10.1007/BFB0031679},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcn/AgliettiBBCCMMPPRRSTVCCELMT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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