BibTeX records: Dani Voitsechov

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@article{DBLP:journals/taco/VoitsechovZSGK18,
  author       = {Dani Voitsechov and
                  Arslan Zulfiqar and
                  Mark Stephenson and
                  Mark Gebhart and
                  Stephen W. Keckler},
  title        = {Software-Directed Techniques for Improved {GPU} Register File Utilization},
  journal      = {{ACM} Trans. Archit. Code Optim.},
  volume       = {15},
  number       = {3},
  pages        = {38:1--38:23},
  year         = {2018},
  url          = {https://doi.org/10.1145/3243905},
  doi          = {10.1145/3243905},
  timestamp    = {Tue, 11 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/taco/VoitsechovZSGK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/VoitsechovPE18,
  author       = {Dani Voitsechov and
                  Oron Port and
                  Yoav Etsion},
  title        = {Inter-Thread Communication in Multithreaded, Reconfigurable Coarse-Grain
                  Arrays},
  booktitle    = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  {MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
  pages        = {42--54},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/MICRO.2018.00013},
  doi          = {10.1109/MICRO.2018.00013},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/VoitsechovPE18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1801-05178,
  author       = {Dani Voitsechov and
                  Yoav Etsion},
  title        = {Inter-thread Communication in Multithreaded, Reconfigurable Coarse-grain
                  Arrays},
  journal      = {CoRR},
  volume       = {abs/1801.05178},
  year         = {2018},
  url          = {http://arxiv.org/abs/1801.05178},
  eprinttype    = {arXiv},
  eprint       = {1801.05178},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1801-05178.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/VoitsechovE15,
  author       = {Dani Voitsechov and
                  Yoav Etsion},
  editor       = {Milos Prvulovic},
  title        = {Control flow coalescing on a hybrid dataflow/von Neumann {GPGPU}},
  booktitle    = {Proceedings of the 48th International Symposium on Microarchitecture,
                  {MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
  pages        = {216--227},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2830772.2830817},
  doi          = {10.1145/2830772.2830817},
  timestamp    = {Wed, 11 Aug 2021 11:51:26 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/VoitsechovE15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/VoitsechovE14,
  author       = {Dani Voitsechov and
                  Yoav Etsion},
  title        = {Single-graph multiple flows: Energy efficient design alternative for
                  GPGPUs},
  booktitle    = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
                  {ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
  pages        = {205--216},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISCA.2014.6853234},
  doi          = {10.1109/ISCA.2014.6853234},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/VoitsechovE14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}