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ORCIDBibTeX records: Thomas Wild
@article{DBLP:journals/tvlsi/NolteTJHSWH24,
author = {Lars Nolte and
Tim Twardzik and
Camille Jalier and
Zhigang Huang and
Jiyuan Shi and
Thomas Wild and
Andreas Herkersdorf},
title = {{HW-FUTEX:} Hardware-Assisted Futex Syscall},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {32},
number = {1},
pages = {16--29},
year = {2024},
url = {https://doi.org/10.1109/TVLSI.2023.3317926},
doi = {10.1109/TVLSI.2023.3317926},
timestamp = {Sat, 13 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/NolteTJHSWH24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/ZylaMWH23,
author = {Klajd Zyla and
Florian Maurer and
Thomas Wild and
Andreas Herkersdorf},
editor = {Georgios I. Goumas and
Sven Tomforde and
J{\"{u}}rgen Brehm and
Stefan Wildermann and
Thilo Pionteck},
title = {CoLeCTs: Cooperative Learning Classifier Tables for Resource Management
in MPSoCs},
booktitle = {Architecture of Computing Systems - 36th International Conference,
{ARCS} 2023, Athens, Greece, June 13-15, 2023, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13949},
pages = {215--229},
publisher = {Springer},
year = {2023},
url = {https://doi.org/10.1007/978-3-031-42785-5\_15},
doi = {10.1007/978-3-031-42785-5\_15},
timestamp = {Thu, 31 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/ZylaMWH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/NolteTJHSKWH23,
author = {Lars Nolte and
Tim Twardzik and
Camille Jalier and
Zhigang Huang and
Jiyuan Shi and
Clara Kowalsky and
Thomas Wild and
Andreas Herkersdorf},
title = {{HAWEN:} Hardware Accelerator for Thread Wake-Ups in Linux Event Notification},
booktitle = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
CA, USA, July 9-13, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DAC56929.2023.10247823},
doi = {10.1109/DAC56929.2023.10247823},
timestamp = {Sun, 24 Sep 2023 13:31:06 +0200},
biburl = {https://dblp.org/rec/conf/dac/NolteTJHSKWH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gecco/Surhonne0WH23,
author = {Anmol Surhonne and
Florian Maurer and
Thomas Wild and
Andreas Herkersdorf},
editor = {Sara Silva and
Lu{\'{\i}}s Paquete},
title = {{LCT-DER:} Learning Classifier Table with Dynamic-Sized Experience
Replay for Run-time SoC Performance-Power Optimization},
booktitle = {Companion Proceedings of the Conference on Genetic and Evolutionary
Computation, {GECCO} 2023, Companion Volume, Lisbon, Portugal, July
15-19, 2023},
pages = {331--334},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583133.3590573},
doi = {10.1145/3583133.3590573},
timestamp = {Sat, 05 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gecco/Surhonne0WH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/SurhonneMWH23,
author = {Anmol Surhonne and
Florian Maurer and
Thomas Wild and
Andreas Herkersdorf},
title = {{LCT-TL} : Learning Classifier Table {(LCT)} with Transfer Learning
for runtime SoC performance-power optimization},
booktitle = {16th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023},
pages = {73--80},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MCSoC60832.2023.00019},
doi = {10.1109/MCSOC60832.2023.00019},
timestamp = {Fri, 09 Feb 2024 20:38:48 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/SurhonneMWH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nfvsdn/LiessDTLNLPWTGMBSH23,
author = {Marco Liess and
Julian Demicoli and
Tobias Tiedje and
Matthias Lohrmann and
Matthias Nickel and
M. Luniak and
Dimitrios A. Prousalis and
Thomas Wild and
Ronald Tetzlaff and
Diana G{\"{o}}hringer and
Christian Mayr and
Karlheinz Bock and
Sebastian Steinhorst and
Andreas Herkersdorf},
editor = {Frank H. P. Fitzek and
Larry J. Horner and
Molka Gharbaoui and
Giang Nguyen and
Rentao Gu and
Tobias Meuser},
title = {{X-MAPE:} Extending 6G-Connected Self-Adaptive Systems with Reflexive
Actions},
booktitle = {{IEEE} Conference on Network Function Virtualization and Software
Defined Networks, {NFV-SDN} 2023, Dresden, Germany, November 7-9,
2023},
pages = {163--167},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/NFV-SDN59219.2023.10329602},
doi = {10.1109/NFV-SDN59219.2023.10329602},
timestamp = {Tue, 16 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nfvsdn/LiessDTLNLPWTGMBSH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/BiersackHSWCH23,
author = {Franz Biersack and
Kilian Holzinger and
Henning Stubbe and
Thomas Wild and
Georg Carle and
Andreas Herkersdorf},
editor = {Raffaele Montella and
Javier Garc{\'{\i}}a Blas and
Daniele D'Agostino},
title = {Priority-aware Inter-Server Receive Side Scaling},
booktitle = {31st Euromicro International Conference on Parallel, Distributed and
Network-Based Processing, {PDP} 2023, Naples, Italy, March 1-3, 2023},
pages = {51--58},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/PDP59025.2023.00016},
doi = {10.1109/PDP59025.2023.00016},
timestamp = {Wed, 07 Jun 2023 22:08:04 +0200},
biburl = {https://dblp.org/rec/conf/pdp/BiersackHSWCH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/ZylaLWH23,
author = {Klajd Zyla and
Marco Liess and
Thomas Wild and
Andreas Herkersdorf},
title = {FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance
SmartNICs},
booktitle = {31st {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2023, Dubai, United Arab Emirates, October 16-18, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VLSI-SoC57769.2023.10321933},
doi = {10.1109/VLSI-SOC57769.2023.10321933},
timestamp = {Wed, 06 Dec 2023 13:14:06 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/ZylaLWH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/SagiDFWH22,
author = {Mark Sagi and
Nguyen Anh Vu Doan and
Nael Fasfous and
Thomas Wild and
Andreas Herkersdorf},
title = {Fine-Grained Power Modeling of Multicore Processors Using FFNNs},
journal = {Int. J. Parallel Program.},
volume = {50},
number = {2},
pages = {243--266},
year = {2022},
url = {https://doi.org/10.1007/s10766-022-00730-9},
doi = {10.1007/S10766-022-00730-9},
timestamp = {Wed, 18 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/SagiDFWH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jossw/KhanZVWY22,
author = {Zarrar Khan and
Mengqi Zhao and
Chris R. Vernon and
Thomas Wild and
Brinda Yarlagadda},
title = {rmap: An {R} package to plot and compare tabular data on customizable
maps across scenarios and time},
journal = {J. Open Source Softw.},
volume = {7},
number = {77},
pages = {4015},
year = {2022},
url = {https://doi.org/10.21105/joss.04015},
doi = {10.21105/JOSS.04015},
timestamp = {Tue, 18 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jossw/KhanZVWY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/SurhonneD0WH22,
author = {Anmol Surhonne and
Nguyen Anh Vu Doan and
Florian Maurer and
Thomas Wild and
Andreas Herkersdorf},
editor = {Martin Schulz and
Carsten Trinitis and
Nikela Papadopoulou and
Thilo Pionteck},
title = {{GAE-LCT:} {A} Run-Time GA-Based Classifier Evolution Method for Hardware
{LCT} Controlled SoC Performance-Power Optimization},
booktitle = {Architecture of Computing Systems - 35th International Conference,
{ARCS} 2022, Heilbronn, Germany, September 13-15, 2022, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13642},
pages = {271--285},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-21867-5\_18},
doi = {10.1007/978-3-031-21867-5\_18},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/SurhonneD0WH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/noms/HolzingerBSMKFZ22,
author = {Kilian Holzinger and
Franz Biersack and
Henning Stubbe and
Angela Gonzalez Mari{\~{n}}o and
Abdoul Kane and
Francesc Fons and
Haigang Zhang and
Thomas Wild and
Andreas Herkersdorf and
Georg Carle},
title = {SmartNIC-based Load Management and Network Health Monitoring for Time
Sensitive Applications},
booktitle = {2022 {IEEE/IFIP} Network Operations and Management Symposium, {NOMS}
2022, Budapest, Hungary, April 25-29, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/NOMS54207.2022.9789863},
doi = {10.1109/NOMS54207.2022.9789863},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/noms/HolzingerBSMKFZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norcas/NolteTJHSWH22,
author = {Lars Nolte and
Tim Twardzik and
Camille Jalier and
Zhigang Huang and
Jiyuan Shi and
Thomas Wild and
Andreas Herkersdorf},
editor = {Jari Nurmi and
Dag T. Wisland and
Snorre Aunet and
Kristian Kjelgaard},
title = {{GLS} Tracing: Gem5-based Low-intrusive Software Tracing},
booktitle = {{IEEE} Nordic Circuits and Systems Conference, NorCAS 2022, Oslo,
Norway, October 25-26, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/NorCAS57515.2022.9934111},
doi = {10.1109/NORCAS57515.2022.9934111},
timestamp = {Tue, 21 Mar 2023 20:58:08 +0100},
biburl = {https://dblp.org/rec/conf/norcas/NolteTJHSWH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/RheindtMPNLSWSH21,
author = {Sven Rheindt and
Sebastian Maier and
Nora Pohle and
Lars Nolte and
Oliver Lenke and
Florian Schmaus and
Thomas Wild and
Wolfgang Schr{\"{o}}der{-}Preikschat and
Andreas Herkersdorf},
title = {DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based
Architectures},
journal = {Int. J. Parallel Program.},
volume = {49},
number = {4},
pages = {506--540},
year = {2021},
url = {https://doi.org/10.1007/s10766-020-00687-7},
doi = {10.1007/S10766-020-00687-7},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/RheindtMPNLSWSH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/SrivatsaMRGWH21,
author = {Akshay Srivatsa and
Mostafa Mansour and
Sven Rheindt and
Dirk Gabriel and
Thomas Wild and
Andreas Herkersdorf},
title = {DynaCo: Dynamic Coherence Management for Tiled Manycore Architectures},
journal = {Int. J. Parallel Program.},
volume = {49},
number = {4},
pages = {570--599},
year = {2021},
url = {https://doi.org/10.1007/s10766-020-00688-6},
doi = {10.1007/S10766-020-00688-6},
timestamp = {Thu, 29 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/SrivatsaMRGWH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jossw/ZhaoBWKYIVPSC21,
author = {Mengqi Zhao and
Matthew Binsted and
Thomas Wild and
Zarrar Khan and
Brinda Yarlagadda and
Gokul Iyer and
Chris R. Vernon and
Pralit Patel and
S{\'{\i}}lvia da Silva and
Katherine V. Calvin},
title = {plutus: An {R} package to calculate electricity investments and stranded
assets from the Global Change Analysis Model {(GCAM)}},
journal = {J. Open Source Softw.},
volume = {6},
number = {65},
pages = {3212},
year = {2021},
url = {https://doi.org/10.21105/joss.03212},
doi = {10.21105/JOSS.03212},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jossw/ZhaoBWKYIVPSC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/SrivatsaFDNWH21,
author = {Akshay Srivatsa and
Nael Fasfous and
Nguyen Anh Vu Doan and
Sebastian Nagel and
Thomas Wild and
Andreas Herkersdorf},
title = {Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse
Directories on Manycore Architectures},
journal = {Microprocess. Microsystems},
volume = {87},
pages = {104384},
year = {2021},
url = {https://doi.org/10.1016/j.micpro.2021.104384},
doi = {10.1016/J.MICPRO.2021.104384},
timestamp = {Fri, 21 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/SrivatsaFDNWH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/KoenenDWH21,
author = {Max Koenen and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
title = {Protection switching schemes and mapping strategies for fail-operational
hard real-time NoCs},
journal = {Microprocess. Microsystems},
volume = {87},
pages = {104385},
year = {2021},
url = {https://doi.org/10.1016/j.micpro.2021.104385},
doi = {10.1016/J.MICPRO.2021.104385},
timestamp = {Wed, 17 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/KoenenDWH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/conext/HolzingerSBMKLZ21,
author = {Kilian Holzinger and
Henning Stubbe and
Franz Biersack and
Angela Gonzalez Mari{\~{n}}o and
Abdoul Kane and
Francisco Fons Lluis and
Haigang Zhang and
Thomas Wild and
Andreas Herkersdorf and
Georg Carle},
editor = {Georg Carle and
J{\"{o}}rg Ott},
title = {Precise real-time monitoring of time-critical flows},
booktitle = {CoNEXT '21: The 17th International Conference on emerging Networking
EXperiments and Technologies, Virtual Event, Munich, Germany, December
7 - 10, 2021},
pages = {489--490},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3485983.3493356},
doi = {10.1145/3485983.3493356},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/conext/HolzingerSBMKLZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SagiRKZFDWHH21,
author = {Mark Sagi and
Martin Rapp and
Heba Khdr and
Yizhe Zhang and
Nael Fasfous and
Nguyen Anh Vu Doan and
Thomas Wild and
J{\"{o}}rg Henkel and
Andreas Herkersdorf},
title = {Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core
Processors},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {1685--1690},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474028},
doi = {10.23919/DATE51398.2021.9474028},
timestamp = {Fri, 24 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SagiRKZFDWHH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/LenkePWH21,
author = {Oliver Lenke and
Richard Petri and
Thomas Wild and
Andreas Herkersdorf},
title = {{PEPERONI:} Pre-Estimating the Performance of Near-Memory Integration},
booktitle = {{MEMSYS} 2021: The International Symposium on Memory Systems, Washington,
USA, September 27 - 30, 2021},
pages = {9:1--9:6},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3488423.3519329},
doi = {10.1145/3488423.3519329},
timestamp = {Tue, 05 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/LenkePWH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SagiDRWHH20,
author = {Mark Sagi and
Nguyen Anh Vu Doan and
Martin Rapp and
Thomas Wild and
J{\"{o}}rg Henkel and
Andreas Herkersdorf},
title = {A Lightweight Nonlinear Methodology to Accurately Model Multicore
Processor Power},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3152--3164},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013062},
doi = {10.1109/TCAD.2020.3013062},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SagiDRWHH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HuMMWHS20,
author = {Yong Hu and
Marcel Mettler and
Daniel Mueller{-}Gritschneder and
Thomas Wild and
Andreas Herkersdorf and
Ulf Schlichtmann},
title = {Machine Learning Approaches for Efficient Design Space Exploration
of Application-Specific NoCs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {25},
number = {5},
pages = {44:1--44:27},
year = {2020},
url = {https://doi.org/10.1145/3403584},
doi = {10.1145/3403584},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/HuMMWHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/RheindtFLNSTWH20,
author = {Sven Rheindt and
Andreas Fried and
Oliver Lenke and
Lars Nolte and
Temur Sabirov and
Tim Twardzik and
Thomas Wild and
Andreas Herkersdorf},
editor = {Andr{\'{e}} Brinkmann and
Wolfgang Karl and
Stefan Lankes and
Sven Tomforde and
Thilo Pionteck and
Carsten Trinitis},
title = {{X-CEL:} {A} Method to Estimate Near-Memory Acceleration Potential
in Tile-Based MPSoCs},
booktitle = {Architecture of Computing Systems - {ARCS} 2020 - 33rd International
Conference, Aachen, Germany, May 25-28, 2020, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12155},
pages = {109--123},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-52794-5\_9},
doi = {10.1007/978-3-030-52794-5\_9},
timestamp = {Thu, 23 Jun 2022 19:59:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/RheindtFLNSTWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieem/DoanSFNWH20,
author = {Nguyen Anh Vu Doan and
Akshay Srivatsa and
Nael Fasfous and
Sebastian Nagel and
Thomas Wild and
Andreas Herkersdorf},
title = {On-Chip Democracy: {A} Study on the Use of Voting Systems for Computer
Cache Memory Management},
booktitle = {{IEEE} International Conference on Industrial Engineering and Engineering
Management, {IEEM} 2020, Singapore, December 14-17, 2020},
pages = {984--988},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/IEEM45057.2020.9309925},
doi = {10.1109/IEEM45057.2020.9309925},
timestamp = {Sat, 13 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ieem/DoanSFNWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/RheindtSLWH20,
author = {Sven Rheindt and
Temur Sabirov and
Oliver Lenke and
Thomas Wild and
Andreas Herkersdorf},
title = {X-Centric: {A} Survey on Compute-, Memory- and Application-Centric
Computer Architectures},
booktitle = {{MEMSYS} 2020: The International Symposium on Memory Systems, Washington,
DC, USA, September, 2020},
pages = {178--193},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3422575.3422792},
doi = {10.1145/3422575.3422792},
timestamp = {Fri, 09 Apr 2021 13:11:20 +0200},
biburl = {https://dblp.org/rec/conf/memsys/RheindtSLWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/KoenenDWH20,
author = {Max Koenen and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
editor = {Jari Nurmi and
Dag T. Wisland and
Snorre Aunet and
Kristian Kjelgaard},
title = {Exploring Task and Channel Mapping Strategies in Fail-Operational
and Hard Real-Time NoCs},
booktitle = {{IEEE} Nordic Circuits and Systems Conference, NorCAS 2020, Oslo,
Norway, October 27-28, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/NorCAS51424.2020.9264993},
doi = {10.1109/NORCAS51424.2020.9264993},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/norchip/KoenenDWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/Srivatsa0FDWH20,
author = {Akshay Srivatsa and
Sebastian Nagel and
Nael Fasfous and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
editor = {Jari Nurmi and
Dag T. Wisland and
Snorre Aunet and
Kristian Kjelgaard},
title = {HyVE: {A} Hybrid Voting-based Eviction Policy for Caches},
booktitle = {{IEEE} Nordic Circuits and Systems Conference, NorCAS 2020, Oslo,
Norway, October 27-28, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/NorCAS51424.2020.9265136},
doi = {10.1109/NORCAS51424.2020.9265136},
timestamp = {Thu, 03 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/norchip/Srivatsa0FDWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/OeldemannBWH20,
author = {Andreas Oeldemann and
Franz Biersack and
Thomas Wild and
Andreas Herkersdorf},
title = {Inter-Server {RSS:} Extending Receive Side Scaling for Inter-Server
Workload Distribution},
booktitle = {28th Euromicro International Conference on Parallel, Distributed and
Network-Based Processing, {PDP} 2020, V{\"{a}}ster{\aa}s, Sweden,
March 11-13, 2020},
pages = {46--53},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/PDP50117.2020.00014},
doi = {10.1109/PDP50117.2020.00014},
timestamp = {Tue, 19 May 2020 14:16:27 +0200},
biburl = {https://dblp.org/rec/conf/pdp/OeldemannBWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SagiDFWH20,
author = {Mark Sagi and
Nguyen Anh Vu Doan and
Nael Fasfous and
Thomas Wild and
Andreas Herkersdorf},
editor = {Alex Orailoglu and
Matthias Jung and
Marc Reichenbach},
title = {Fine-Grained Power Modeling of Multicore Processors Using FFNNs},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 20th International Conference, {SAMOS} 2020, Samos, Greece, July
5-9, 2020, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12471},
pages = {186--199},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-60939-9\_13},
doi = {10.1007/978-3-030-60939-9\_13},
timestamp = {Fri, 16 Oct 2020 15:42:03 +0200},
biburl = {https://dblp.org/rec/conf/samos/SagiDFWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/ScholzOGGSWHC19,
author = {Dominik Scholz and
Andreas Oeldemann and
Fabien Geyer and
Sebastian Gallenm{\"{u}}ller and
Henning Stubbe and
Thomas Wild and
Andreas Herkersdorf and
Georg Carle},
title = {Cryptographic Hashing in {P4} Data Planes},
booktitle = {2019 {ACM/IEEE} Symposium on Architectures for Networking and Communications
Systems, {ANCS} 2019, Cambridge, United Kingdom, September 24-25,
2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ANCS.2019.8901886},
doi = {10.1109/ANCS.2019.8901886},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ancs/ScholzOGGSWHC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/KoenenDWH19,
author = {Max Koenen and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
editor = {Martin Schoeberl and
Christian Hochberger and
Sascha Uhrig and
J{\"{u}}rgen Brehm and
Thilo Pionteck},
title = {A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication
in MPSoC},
booktitle = {Architecture of Computing Systems - {ARCS} 2019 - 32nd International
Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11479},
pages = {31--44},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-18656-2\_3},
doi = {10.1007/978-3-030-18656-2\_3},
timestamp = {Fri, 31 Jan 2020 21:32:25 +0100},
biburl = {https://dblp.org/rec/conf/arcs/KoenenDWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/VonbunDWH19,
author = {Michael Vonbun and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
editor = {Martin Schoeberl and
Christian Hochberger and
Sascha Uhrig and
J{\"{u}}rgen Brehm and
Thilo Pionteck},
title = {Network Coding in Networks-on-Chip with Lossy Links},
booktitle = {Architecture of Computing Systems - {ARCS} 2019 - 32nd International
Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11479},
pages = {308--321},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-18656-2\_23},
doi = {10.1007/978-3-030-18656-2\_23},
timestamp = {Fri, 31 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/VonbunDWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/RamboKESKDMMMSY19,
author = {Eberle A. Rambo and
Thawra Kadeed and
Rolf Ernst and
Minjun Seo and
Fadi J. Kurdahi and
Bryan Donyanavard and
Caio Batista de Melo and
Biswadip Maity and
Kasra Moazzemi and
Kenneth Michael Stewart and
Saehanseul Yi and
Amir M. Rahmani and
Nikil D. Dutt and
Florian Maurer and
Nguyen Anh Vu Doan and
Anmol Surhonne and
Thomas Wild and
Andreas Herkersdorf},
title = {The information processing factory: a paradigm for life cycle management
of dependable systems},
booktitle = {Proceedings of the International Conference on Hardware/Software Codesign
and System Synthesis Companion, {CODES+ISSS} 2019, part of {ESWEEK}
2019, New York, NY, USA, October 13-18, 2019},
pages = {20:1--20:2},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3349567.3357391},
doi = {10.1145/3349567.3357391},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/RamboKESKDMMMSY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic-nc/DoanKWH19,
author = {Nguyen Anh Vu Doan and
Max Koenen and
Thomas Wild and
Andreas Herkersdorf},
title = {Multi-Objective Optimization of Channel Mapping for Fail-Operational
Hybrid {TDM} NoCs},
booktitle = {Seventh International Symposium on Computing and Networking Workshops,
{CANDAR} 2019 Workshops, Nagasaki, Japan, November 26-29, 2019},
pages = {201--207},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/CANDARW.2019.00043},
doi = {10.1109/CANDARW.2019.00043},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ic-nc/DoanKWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/SagiDWH19,
author = {Mark Sagi and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
title = {Multicore Power Estimation using Independent Component Analysis Based
Modeling},
booktitle = {13th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, MCSoC 2019, Singapore, Singapore, October 1-4, 2019},
pages = {38--45},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/MCSoC.2019.00013},
doi = {10.1109/MCSOC.2019.00013},
timestamp = {Tue, 26 Nov 2019 20:28:29 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/SagiDWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/RheindtFLNWH19,
author = {Sven Rheindt and
Andreas Fried and
Oliver Lenke and
Lars Nolte and
Thomas Wild and
Andreas Herkersdorf},
title = {{NEMESYS:} near-memory graph copy enhanced system-software},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2019, Washington, DC, USA, September 30 - October 03, 2019},
pages = {3--18},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3357526.3357545},
doi = {10.1145/3357526.3357545},
timestamp = {Thu, 07 Nov 2019 11:15:09 +0100},
biburl = {https://dblp.org/rec/conf/memsys/RheindtFLNWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/VonbunSDWH19,
author = {Michael Vonbun and
Adrian Schiechel and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
editor = {Paul Bogdan and
Cristina Silvano},
title = {{APEC:} improved acknowledgement prioritization through erasure coding
in bufferless NoCs},
booktitle = {Proceedings of the 13th {IEEE/ACM} International Symposium on Networks-on-Chip,
{NOCS} 2019, New York, NY, USA, October 17-18, 2019},
pages = {6:1--6:8},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3313231.3352366},
doi = {10.1145/3313231.3352366},
timestamp = {Thu, 26 Sep 2019 12:42:42 +0200},
biburl = {https://dblp.org/rec/conf/nocs/VonbunSDWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/KoenenDWH19,
author = {Max Koenen and
Nguyen Anh Vu Doan and
Thomas Wild and
Andreas Herkersdorf},
editor = {Paul Bogdan and
Cristina Silvano},
title = {Channel mapping strategies for effective protection switching in fail-operational
hard real-time NoCs},
booktitle = {Proceedings of the 13th {IEEE/ACM} International Symposium on Networks-on-Chip,
{NOCS} 2019, New York, NY, USA, October 17-18, 2019},
pages = {20:1--20:2},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3313231.3352372},
doi = {10.1145/3313231.3352372},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nocs/KoenenDWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SrivatsaRGWH19,
author = {Akshay Srivatsa and
Sven Rheindt and
Dirk Gabriel and
Thomas Wild and
Andreas Herkersdorf},
editor = {Dionisios N. Pnevmatikatos and
Maxime Pelcat and
Matthias Jung},
title = {CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence
for DSM-Based Manycore Architectures},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 19th International Conference, {SAMOS} 2019, Samos, Greece, July
7-11, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11733},
pages = {18--33},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-27562-4\_2},
doi = {10.1007/978-3-030-27562-4\_2},
timestamp = {Fri, 09 Aug 2019 14:45:31 +0200},
biburl = {https://dblp.org/rec/conf/samos/SrivatsaRGWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/RheindtMSWSH19,
author = {Sven Rheindt and
Sebastian Maier and
Florian Schmaus and
Thomas Wild and
Wolfgang Schr{\"{o}}der{-}Preikschat and
Andreas Herkersdorf},
editor = {Dionisios N. Pnevmatikatos and
Maxime Pelcat and
Matthias Jung},
title = {{SHARQ:} Software-Defined Hardware-Managed Queues for Tile-Based Manycore
Architectures},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 19th International Conference, {SAMOS} 2019, Samos, Greece, July
7-11, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11733},
pages = {212--225},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-27562-4\_15},
doi = {10.1007/978-3-030-27562-4\_15},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/RheindtMSWSH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/GoldbrunnerDPWH19,
author = {Thomas Goldbrunner and
Nguyen Anh Vu Doan and
Diogo Po{\c{c}}as and
Thomas Wild and
Andreas Herkersdorf},
title = {Register Requirement Minimization of Fixed-Depth Pipelines for Streaming
Data Applications},
booktitle = {32nd {IEEE} International System-on-Chip Conference, {SOCC} 2019,
Singapore, September 3-6, 2019},
pages = {406--411},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SOCC46988.2019.1570548393},
doi = {10.1109/SOCC46988.2019.1570548393},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/GoldbrunnerDPWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/MostlSEDNRKWSH18,
author = {Mischa M{\"{o}}stl and
Johannes Schlatow and
Rolf Ernst and
Nikil D. Dutt and
Ahmed Nassar and
Amir{-}Mohammad Rahmani and
Fadi J. Kurdahi and
Thomas Wild and
Armin Sadighi and
Andreas Herkersdorf},
title = {Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes
in {CPS}},
journal = {Proc. {IEEE}},
volume = {106},
number = {9},
pages = {1543--1567},
year = {2018},
url = {https://doi.org/10.1109/JPROC.2018.2858023},
doi = {10.1109/JPROC.2018.2858023},
timestamp = {Wed, 21 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pieee/MostlSEDNRKWSH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/RheindtSSWH18,
author = {Sven Rheindt and
Andreas Schenk and
Akshay Srivatsa and
Thomas Wild and
Andreas Herkersdorf},
editor = {Mladen Berekovic and
Rainer Buchty and
Heiko Hamann and
Dirk Koch and
Thilo Pionteck},
title = {CaCAO: Complex and Compositional Atomic Operations for NoC-Based Manycore
Platforms},
booktitle = {Architecture of Computing Systems - {ARCS} 2018 - 31st International
Conference, Braunschweig, Germany, April 9-12, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10793},
pages = {139--152},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-77610-1\_11},
doi = {10.1007/978-3-319-77610-1\_11},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/RheindtSSWH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShankarLHW18,
author = {Subramanian Shiva Shankar and
Pinxing Lin and
Andreas Herkersdorf and
Thomas Wild},
title = {BiSME: {A} Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit
Rates},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445090},
doi = {10.1109/ASAP.2018.8445090},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShankarLHW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SadighiDKMMNRWD18,
author = {Armin Sadighi and
Bryan Donyanavard and
Thawra Kadeed and
Kasra Moazzemi and
Tiago M{\"{u}}ck and
Ahmed Nassar and
Amir M. Rahmani and
Thomas Wild and
Nikil D. Dutt and
Rolf Ernst and
Andreas Herkersdorf and
Fadi J. Kurdahi},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Design methodologies for enabling self-awareness in autonomous systems},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1532--1537},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342259},
doi = {10.23919/DATE.2018.8342259},
timestamp = {Wed, 21 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SadighiDKMMNRWD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OeldemannWH18,
author = {Andreas Oeldemann and
Thomas Wild and
Andreas Herkersdorf},
title = {FlueNT10G: {A} Programmable FPGA-based Network Tester for Multi-10-Gigabit
Ethernet},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {178--185},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00037},
doi = {10.1109/FPL.2018.00037},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/OeldemannWH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/GoldbrunnerWH18,
author = {Thomas Goldbrunner and
Thomas Wild and
Andreas Herkersdorf},
title = {Memory Access Pattern Profiling for Streaming Applications Based on
{MATLAB} Models},
booktitle = {28th International Symposium on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2018, Platja d'Aro, Spain, July 2-4, 2018},
pages = {32--38},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/PATMOS.2018.8464151},
doi = {10.1109/PATMOS.2018.8464151},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/patmos/GoldbrunnerWH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/WagnerWH17,
author = {Philipp Wagner and
Thomas Wild and
Andreas Herkersdorf},
title = {DiaSys: Improving SoC insight through on-chip diagnosis},
journal = {J. Syst. Archit.},
volume = {75},
pages = {120--132},
year = {2017},
url = {https://doi.org/10.1016/j.sysarc.2017.01.005},
doi = {10.1016/J.SYSARC.2017.01.005},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsa/WagnerWH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ZaibWHHBWT17,
author = {Aurang Zaib and
Thomas Wild and
Andreas Herkersdorf and
Jan Heisswolf and
J{\"{u}}rgen Becker and
Andreas Weichslgartner and
J{\"{u}}rgen Teich},
title = {Efficient task spawning for shared memory and message passing in many-core
architectures},
journal = {J. Syst. Archit.},
volume = {77},
pages = {72--82},
year = {2017},
url = {https://doi.org/10.1016/j.sysarc.2017.03.004},
doi = {10.1016/J.SYSARC.2017.03.004},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsa/ZaibWHHBWT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/OeldemannWH17,
author = {Andreas Oeldemann and
Thomas Wild and
Andreas Herkersdorf},
editor = {Jens Knoop and
Wolfgang Karl and
Martin Schulz and
Koji Inoue and
Thilo Pionteck},
title = {Reducing Data Center Resource Over-Provisioning Through Dynamic Load
Management for Virtualized Network Functions},
booktitle = {Architecture of Computing Systems - {ARCS} 2017 - 30th International
Conference, Vienna, Austria, April 3-6, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10172},
pages = {234--247},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-54999-6\_18},
doi = {10.1007/978-3-319-54999-6\_18},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/OeldemannWH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Li0MWH17,
author = {Lin Li and
Philipp Wagner and
Albrecht Mayer and
Thomas Wild and
Andreas Herkersdorf},
editor = {David Atienza and
Giorgio Di Natale},
title = {A non-intrusive, operating system independent spinlock profiler for
embedded multicore systems},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {322--325},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927009},
doi = {10.23919/DATE.2017.7927009},
timestamp = {Mon, 03 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Li0MWH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/AlouaniWHN17,
author = {Ihsen Alouani and
Thomas Wild and
Andreas Herkersdorf and
Sma{\"{\i}}l Niar},
editor = {Hana Kub{\'{a}}tov{\'{a}} and
Martin Novotn{\'{y}} and
Amund Skavhaug},
title = {Adaptive Reliability for Fault Tolerant Multicore Systems},
booktitle = {Euromicro Conference on Digital System Design, {DSD} 2017, Vienna,
Austria, August 30 - Sept. 1, 2017},
pages = {538--542},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/DSD.2017.78},
doi = {10.1109/DSD.2017.78},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/AlouaniWHN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/ShankarLHW17,
author = {Subramanian Shiva Shankar and
Pinxing Lin and
Andreas Herkersdorf and
Thomas Wild},
editor = {Shi{-}Jinn Horng},
title = {A Divide and Conquer State Grouping Method for Bitmap Based Transition
Compression},
booktitle = {18th International Conference on Parallel and Distributed Computing,
Applications and Technologies, {PDCAT} 2017, Taipei, Taiwan, December
18-20, 2017},
pages = {400--406},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/PDCAT.2017.00071},
doi = {10.1109/PDCAT.2017.00071},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdcat/ShankarLHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SrivatsaRWH17,
author = {Akshay Srivatsa and
Sven Rheindt and
Thomas Wild and
Andreas Herkersdorf},
editor = {Massimo Alioto and
Hai Helen Li and
J{\"{u}}rgen Becker and
Ulf Schlichtmann and
Ramalingam Sridhar},
title = {Region based cache coherence for tiled MPSoCs},
booktitle = {30th {IEEE} International System-on-Chip Conference, {SOCC} 2017,
Munich, Germany, September 5-8, 2017},
pages = {286--291},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/SOCC.2017.8226059},
doi = {10.1109/SOCC.2017.8226059},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/SrivatsaRWH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/it/PaganiBCGHHKPSS16,
author = {Santiago Pagani and
Lars Bauer and
Qingqing Chen and
Elisabeth Glocker and
Frank Hannig and
Andreas Herkersdorf and
Heba Khdr and
Anuj Pathania and
Ulf Schlichtmann and
Doris Schmitt{-}Landsiedel and
Mark Sagi and
{\'{E}}ricles Sousa and
Philipp Wagner and
Volker Wenzel and
Thomas Wild and
J{\"{o}}rg Henkel},
title = {Dark silicon management: an integrated and coordinated cross-layer
approach},
journal = {it Inf. Technol.},
volume = {58},
number = {6},
pages = {297--307},
year = {2016},
url = {https://doi.org/10.1515/itit-2016-0028},
doi = {10.1515/ITIT-2016-0028},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/it/PaganiBCGHHKPSS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/RoschRWWH16,
author = {Stefan Rosch and
Holm Rauchfuss and
Stefan Wallentowitz and
Thomas Wild and
Andreas Herkersdorf},
title = {MPSoC application resilience by hardware-assisted communication virtualization},
journal = {Microelectron. Reliab.},
volume = {61},
pages = {11--16},
year = {2016},
url = {https://doi.org/10.1016/j.microrel.2016.02.009},
doi = {10.1016/J.MICROREL.2016.02.009},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mr/RoschRWWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/WagnerWH16,
author = {Philipp Wagner and
Thomas Wild and
Andreas Herkersdorf},
editor = {Frank Hannig and
Jo{\~{a}}o M. P. Cardoso and
Thilo Pionteck and
Dietmar Fey and
Wolfgang Schr{\"{o}}der{-}Preikschat and
J{\"{u}}rgen Teich},
title = {DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip},
booktitle = {Architecture of Computing Systems - {ARCS} 2016 - 29th International
Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9637},
pages = {197--209},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-30695-7\_15},
doi = {10.1007/978-3-319-30695-7\_15},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/WagnerWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/VonbunWH16,
author = {Michael Vonbun and
Thomas Wild and
Andreas Herkersdorf},
editor = {Frank Hannig and
Jo{\~{a}}o M. P. Cardoso and
Thilo Pionteck and
Dietmar Fey and
Wolfgang Schr{\"{o}}der{-}Preikschat and
J{\"{u}}rgen Teich},
title = {Estimation of End-to-End Packet Error Rates for NoC Multicasts},
booktitle = {Architecture of Computing Systems - {ARCS} 2016 - 29th International
Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9637},
pages = {363--374},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-30695-7\_27},
doi = {10.1007/978-3-319-30695-7\_27},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/VonbunWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/RichterHWH16,
author = {Andre Richter and
Christian Herber and
Thomas Wild and
Andreas Herkersdorf},
editor = {Paris Kitsos},
title = {Resolving Performance Interference in {SR-IOV} Setups with PCIe Quality-of-Service
Extensions},
booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol,
Cyprus, August 31 - September 2, 2016},
pages = {454--462},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/DSD.2016.41},
doi = {10.1109/DSD.2016.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/RichterHWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isicir/0001LWMH16,
author = {Philipp Wagner and
Lin Li and
Thomas Wild and
Albrecht Mayer and
Andreas Herkersdorf},
title = {What happens on an MPSoC stays on an MPSoC - unfortunately!},
booktitle = {International Symposium on Integrated Circuits, {ISIC} 2016, Singapore,
December 12-14, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISICIR.2016.7829711},
doi = {10.1109/ISICIR.2016.7829711},
timestamp = {Mon, 03 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isicir/0001LWMH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itnac/ShankarLHW16,
author = {Subramanian Shiva Shankar and
Pinxing Lin and
Andreas Herkersdorf and
Thomas Wild},
title = {Hardware acceleration of signature matching through multi-layer transition
bit masking},
booktitle = {26th International Telecommunication Networks and Applications Conference,
{ITNAC} 2016, Dunedin, New Zealand, December 7-9, 2016},
pages = {217--224},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ATNAC.2016.7878812},
doi = {10.1109/ATNAC.2016.7878812},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itnac/ShankarLHW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/LiWRMWH16,
author = {Lin Li and
Philipp Wagner and
Ramesh Ramaswamy and
Albrecht Mayer and
Thomas Wild and
Andreas Herkersdorf},
editor = {Sander Stuijk},
title = {A Rule-based Methodology for Hardware Configuration Validation in
Embedded Systems},
booktitle = {Proceedings of the 19th International Workshop on Software and Compilers
for Embedded Systems, {SCOPES} 2016, Sankt Goar, Germany, May 23-25,
2016},
pages = {180--189},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2906363.2906377},
doi = {10.1145/2906363.2906377},
timestamp = {Mon, 03 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/scopes/LiWRMWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/supercomputer/PujariWH16,
author = {Ravi Kumar Pujari and
Thomas Wild and
Andreas Herkersdorf},
editor = {Julian M. Kunkel and
Pavan Balaji and
Jack J. Dongarra},
title = {{TCU:} {A} Multi-Objective Hardware Thread Mapping Unit for {HPC}
Clusters},
booktitle = {High Performance Computing - 31st International Conference, {ISC}
High Performance 2016, Frankfurt, Germany, June 19-23, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9697},
pages = {39--58},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-41321-1\_3},
doi = {10.1007/978-3-319-41321-1\_3},
timestamp = {Tue, 14 May 2019 10:00:40 +0200},
biburl = {https://dblp.org/rec/conf/supercomputer/PujariWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/0001WH16,
author = {Philipp Wagner and
Thomas Wild and
Andreas Herkersdorf},
title = {Improving SoC Insight Through On-Chip Diagnosis},
journal = {CoRR},
volume = {abs/1607.04549},
year = {2016},
url = {http://arxiv.org/abs/1607.04549},
eprinttype = {arXiv},
eprint = {1607.04549},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/0001WH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/it/BauerHHKKRSWWWW15,
author = {Lars Bauer and
J{\"{o}}rg Henkel and
Andreas Herkersdorf and
Michael A. Kochte and
Johannes Maximilian K{\"{u}}hn and
Wolfgang Rosenstiel and
Thomas Schweizer and
Stefan Wallentowitz and
Volker Wenzel and
Thomas Wild and
Hans{-}Joachim Wunderlich and
Hongyan Zhang},
title = {Adaptive multi-layer techniques for increased system dependability},
journal = {it Inf. Technol.},
volume = {57},
number = {3},
pages = {149--158},
year = {2015},
url = {https://doi.org/10.1515/itit-2014-1082},
doi = {10.1515/ITIT-2014-1082},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/it/BauerHHKKRSWWWW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/RichterHWH15,
author = {Andre Richter and
Christian Herber and
Thomas Wild and
Andreas Herkersdorf},
title = {Denial-of-Service attacks on {PCI} passthrough devices: Demonstrating
the impact on network- and storage-I/O performance},
journal = {J. Syst. Archit.},
volume = {61},
number = {10},
pages = {592--599},
year = {2015},
url = {https://doi.org/10.1016/j.sysarc.2015.07.003},
doi = {10.1016/J.SYSARC.2015.07.003},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsa/RichterHWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcloud/RichterHWWH15,
author = {Andre Richter and
Christian Herber and
Stefan Wallentowitz and
Thomas Wild and
Andreas Herkersdorf},
editor = {Calton Pu and
Ajay Mohindra},
title = {A Hardware/Software Approach for Mitigating Performance Interference
Effects in Virtualized Environments Using {SR-IOV}},
booktitle = {8th {IEEE} International Conference on Cloud Computing, {CLOUD} 2015,
New York City, NY, USA, June 27 - July 2, 2015},
pages = {950--957},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/CLOUD.2015.129},
doi = {10.1109/CLOUD.2015.129},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcloud/RichterHWWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ahs/HeisswolfWZFMSD15,
author = {Jan Heisswolf and
Andreas Weichslgartner and
Aurang Zaib and
Stephanie Friederich and
Leonard Masing and
Carsten Stein and
Marco Duden and
Roman Klopfer and
J{\"{u}}rgen Teich and
Thomas Wild and
Andreas Herkersdorf and
J{\"{u}}rgen Becker},
title = {Fault-tolerant communication in invasive networks on chip},
booktitle = {2015 {NASA/ESA} Conference on Adaptive Hardware and Systems, {AHS}
2015, Montreal, QC, Canada, June 15-18, 2015},
pages = {1--8},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/AHS.2015.7231156},
doi = {10.1109/AHS.2015.7231156},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/ahs/HeisswolfWZFMSD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/ZaibHWWTBH15,
author = {Aurang Zaib and
Jan Hei{\ss}wolf and
Andreas Weichslgartner and
Thomas Wild and
J{\"{u}}rgen Teich and
J{\"{u}}rgen Becker and
Andreas Herkersdorf},
editor = {Lu{\'{\i}}s Miguel Pinho and
Wolfgang Karl and
Albert Cohen and
Uwe Brinkschulte},
title = {Network Interface with Task Spawning Support for NoC-Based {DSM} Architectures},
booktitle = {Architecture of Computing Systems - {ARCS} 2015 - 28th International
Conference, Porto, Portugal, March 24-27, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9017},
pages = {186--198},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-16086-3\_15},
doi = {10.1007/978-3-319-16086-3\_15},
timestamp = {Fri, 19 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/ZaibHWWTBH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HerberRWH15,
author = {Christian Herber and
Andre Richter and
Thomas Wild and
Andreas Herkersdorf},
editor = {Wolfgang Nebel and
David Atienza},
title = {Real-time capable {CAN} to {AVB} ethernet gateway using frame aggregation
and scheduling},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {61--66},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755767},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/HerberRWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PujariWH15,
author = {Ravi Kumar Pujari and
Thomas Wild and
Andreas Herkersdorf},
title = {A hardware-based multi-objective thread mapper for tiled manycore
architectures},
booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
New York City, NY, USA, October 18-21, 2015},
pages = {459--462},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICCD.2015.7357148},
doi = {10.1109/ICCD.2015.7357148},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/PujariWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/springsim/DamodaranZWWH15,
author = {P. Parayil Mana Damodaran and
Aurang Zaib and
Stefan Wallentowitz and
Thomas Wild and
Andreas Herkersdorf},
editor = {Layne T. Watson and
Josef Weinbub and
Masha Sosonkina and
William I. Thacker},
title = {Sharer status-based caching in tiled multiprocessor systems-on-chip},
booktitle = {Proceedings of the Symposium on High Performance Computing, {HPC}
2015, part of the 2015 Spring Simulation Multiconference, SpringSim
'15, Alexandria, VA, USA, April 12-15, 2015},
pages = {67--74},
publisher = {{SCS/ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2872608},
timestamp = {Thu, 07 Apr 2016 15:18:23 +0200},
biburl = {https://dblp.org/rec/conf/springsim/DamodaranZWWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/HeisswolfZWKSWTHB14,
author = {Jan Heisswolf and
Aurang Zaib and
Andreas Weichslgartner and
Martin Karle and
Maximilian Singh and
Thomas Wild and
J{\"{u}}rgen Teich and
Andreas Herkersdorf and
J{\"{u}}rgen Becker},
editor = {Walter Stechele and
Thomas Wild},
title = {The Invasive Network on Chip - {A} Multi-Objective Many-Core Communication
Infrastructure},
booktitle = {{ARCS} 2014 - 27th International Conference on Architecture of Computing
Systems, Workshop Proceedings, February 25-28, 2014, Luebeck, Germany,
University of Luebeck, Institute of Computer Engineering},
pages = {1--8},
publisher = {{VDE} Verlag / {IEEE} Xplore},
year = {2014},
url = {https://ieeexplore.ieee.org/document/6775072/},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/HeisswolfZWKSWTHB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/RichterHRWH14,
author = {Andre Richter and
Christian Herber and
Holm Rauchfuss and
Thomas Wild and
Andreas Herkersdorf},
editor = {Erik Maehle and
Kay R{\"{o}}mer and
Wolfgang Karl and
Eduardo Tovar},
title = {Performance Isolation Exposure in Virtualized Platforms with {PCI}
Passthrough {I/O} Sharing},
booktitle = {Architecture of Computing Systems - {ARCS} 2014 - 27th International
Conference, L{\"{u}}beck, Germany, February 25-28, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8350},
pages = {171--182},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-04891-8\_15},
doi = {10.1007/978-3-319-04891-8\_15},
timestamp = {Thu, 14 Oct 2021 10:21:06 +0200},
biburl = {https://dblp.org/rec/conf/arcs/RichterHRWH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HeinigDHMWHGBKR14,
author = {Andy Heinig and
Manfred Dietrich and
Andreas Herkersdorf and
Felix Miller and
Thomas Wild and
Kai Hahn and
Armin Gr{\"{u}}newald and
Rainer Br{\"{u}}ck and
Steffen Krohnert and
Jochen Reisinger},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {System integration - The bridge between More than Moore and More Moore},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--9},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.145},
doi = {10.7873/DATE.2014.145},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/HeinigDHMWHGBKR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/WallentowitzRWH14,
author = {Stefan Wallentowitz and
Stefan Rosch and
Thomas Wild and
Andreas Herkersdorf and
Volker Wenzel and
J{\"{o}}rg Henkel},
title = {Dependable task and communication migration in tiled manycore system-on-chip},
booktitle = {Proceedings of the 2014 Forum on Specification and Design Languages,
{FDL} 2014, Munich, Germany, October 14-16, 2014},
pages = {1--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FDL.2014.7119361},
doi = {10.1109/FDL.2014.7119361},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fdl/WallentowitzRWH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/HerberRWH14,
author = {Christian Herber and
Andre Richter and
Thomas Wild and
Andreas Herkersdorf},
title = {Deadline-Aware Interrupt Coalescing in Controller Area Network {(CAN)}},
booktitle = {2014 {IEEE} International Conference on High Performance Computing
and Communications, 6th {IEEE} International Symposium on Cyberspace
Safety and Security, 11th {IEEE} International Conference on Embedded
Software and Systems, {HPCC/CSS/ICESS} 2014, Paris, France, August
20-22, 2014},
pages = {693--700},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPCC.2014.122},
doi = {10.1109/HPCC.2014.122},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/HerberRWH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/HerberRWH14,
author = {Christian Herber and
Andre Richter and
Thomas Wild and
Andreas Herkersdorf},
title = {A network virtualization approach for performance isolation in controller
area network {(CAN)}},
booktitle = {20th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
{RTAS} 2014, Berlin, Germany, April 15-17, 2014},
pages = {215--224},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/RTAS.2014.6926004},
doi = {10.1109/RTAS.2014.6926004},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/HerberRWH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/arcs/2014w,
editor = {Walter Stechele and
Thomas Wild},
title = {{ARCS} 2014 - 27th International Conference on Architecture of Computing
Systems, Workshop Proceedings, February 25-28, 2014, Luebeck, Germany,
University of Luebeck, Institute of Computer Engineering},
publisher = {{VDE} Verlag / {IEEE} Xplore},
year = {2014},
url = {https://www.vde-verlag.de/buecher/563579/arcs-2014.html},
isbn = {978-3-8007-3579-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/2014w.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ZaibRWH14,
author = {Aurang Zaib and
Prashanth Raju and
Thomas Wild and
Andreas Herkersdorf},
title = {A Layered Modeling and Simulation Approach to investigate Resource-aware
Computing in MPSoCs},
journal = {CoRR},
volume = {abs/1405.2917},
year = {2014},
url = {http://arxiv.org/abs/1405.2917},
eprinttype = {arXiv},
eprint = {1405.2917},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ZaibRWH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/MillerWH13,
author = {Felix Miller and
Thomas Wild and
Andreas Herkersdorf},
title = {Virtualized and fault-tolerant inter-layer-links for 3D-ICs},
journal = {Microprocess. Microsystems},
volume = {37},
number = {8-A},
pages = {823--835},
year = {2013},
url = {https://doi.org/10.1016/j.micpro.2013.04.013},
doi = {10.1016/J.MICPRO.2013.04.013},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/MillerWH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/HeisswolfZWKWTHB13,
author = {Jan Heisswolf and
Aurang Zaib and
Andreas Weichslgartner and
Ralf K{\"{o}}nig and
Thomas Wild and
J{\"{u}}rgen Teich and
Andreas Herkersdorf and
J{\"{u}}rgen Becker},
title = {Virtual networks - distributed communication resource management},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {6},
number = {2},
pages = {8:1--8:14},
year = {2013},
url = {https://dl.acm.org/citation.cfm?id=2492186},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/HeisswolfZWKWTHB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/WallentowitzWH13,
author = {Stefan Wallentowitz and
Thomas Wild and
Andreas Herkersdorf},
editor = {Hana Kub{\'{a}}tov{\'{a}} and
Christian Hochberger and
Martin Danek and
Bernhard Sick},
title = {{HW-OSQM:} Reducing the Impact of Event Signaling by Hardware-Based
Operating System Queue Manipulation},
booktitle = {Architecture of Computing Systems - {ARCS} 2013 - 26th International
Conference, Prague, Czech Republic, February 19-22, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7767},
pages = {280--291},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36424-2\_24},
doi = {10.1007/978-3-642-36424-2\_24},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arcs/WallentowitzWH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/biostec/KozakKWVMKC13,
author = {Karol Kozak and
Sandra Kaestner and
Thomas Wild and
Andreas Vonderheit and
Benjamin Misselwitz and
Ulrike Kutay and
Gabor Csucs},
editor = {Pedro Fernandes and
Jordi Sol{\'{e}}{-}Casals and
Ana L. N. Fred and
Hugo Gamboa},
title = {New Algorithm for Analysis of Off-target Effects in siRNA Screens},
booktitle = {{BIOINFORMATICS} 2013 - Proceedings of the International Conference
on Bioinformatics Models, Methods and Algorithms, Barcelona, Spain,
11 - 14 February, 2013},
pages = {253--260},
publisher = {SciTePress},
year = {2013},
timestamp = {Tue, 01 Oct 2013 18:44:42 +0200},
biburl = {https://dblp.org/rec/conf/biostec/KozakKWVMKC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ZaibHWWTBH13,
author = {Aurang Zaib and
Jan Heisswolf and
Andreas Weichslgartner and
Thomas Wild and
J{\"{u}}rgen Teich and
J{\"{u}}rgen Becker and
Andreas Herkersdorf},
title = {{AUTO-GS:} Self-Optimization of NoC Traffic through Hardware Managed
Virtual Connections},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {761--768},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.87},
doi = {10.1109/DSD.2013.87},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ZaibHWWTBH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gi/HerkersdorfPPSWWZ13,
author = {Andreas Herkersdorf and
Johny Paul and
Ravi Kumar Pujari and
Walter Stechele and
Stefan Wallentowitz and
Thomas Wild and
Aurang Zaib},
editor = {Matthias Horbach},
title = {Potentials and Challenges for Multi-Core Processors in Robotic Applications},
booktitle = {43. Jahrestagung der Gesellschaft f{\"{u}}r Informatik, Informatik
angepasst an Mensch, Organisation und Umwelt, {INFORMATIK} 2013, Koblenz,
Germany, September 16-20, 2013},
series = {{LNI}},
volume = {{P-220}},
pages = {2749--2764},
publisher = {{GI}},
year = {2013},
url = {https://dl.gi.de/handle/20.500.12116/20694},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gi/HerkersdorfPPSWWZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HeisswolfWZKWHTB13,
author = {Jan Heisswolf and
Andreas Weichslgartner and
Aurang Zaib and
Ralf K{\"{o}}nig and
Thomas Wild and
Andreas Herkersdorf and
J{\"{u}}rgen Teich and
J{\"{u}}rgen Becker},
title = {Hardware Supported Adaptive Data Collection for Networks on Chip},
booktitle = {2013 {IEEE} International Symposium on Parallel {\&} Distributed
Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24,
2013},
pages = {153--162},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/IPDPSW.2013.124},
doi = {10.1109/IPDPSW.2013.124},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/HeisswolfWZKWHTB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1304-5081,
author = {Stefan Wallentowitz and
Philipp Wagner and
Michael Tempelmeier and
Thomas Wild and
Andreas Herkersdorf},
title = {Open Tiled Manycore System-on-Chip},
journal = {CoRR},
volume = {abs/1304.5081},
year = {2013},
url = {http://arxiv.org/abs/1304.5081},
eprinttype = {arXiv},
eprint = {1304.5081},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1304-5081.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/it/HerkersdorfMRW12,
author = {Andreas Herkersdorf and
Hans{-}Ulrich Michel and
Holm Rauchfuss and
Thomas Wild},
title = {Multicore Enablement for Automotive Cyber Physical Systems},
journal = {it Inf. Technol.},
volume = {54},
number = {6},
pages = {280--287},
year = {2012},
url = {https://doi.org/10.1524/itit.2012.0690},
doi = {10.1524/ITIT.2012.0690},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/it/HerkersdorfMRW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LankesWWH12,
author = {Andreas Lankes and
Thomas Wild and
Stefan Wallentowitz and
Andreas Herkersdorf},
title = {Benefits of selective packet discard in networks-on-chip},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {9},
number = {2},
pages = {12:1--12:21},
year = {2012},
url = {https://doi.org/10.1145/2207222.2207228},
doi = {10.1145/2207222.2207228},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/LankesWWH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/RauchfussWH11,
author = {Holm Rauchfuss and
Thomas Wild and
Andreas Herkersdorf},
editor = {Gero M{\"{u}}hl and
Jan Richling and
Andreas Herkersdorf},
title = {Enhanced Reliability in Tiled Manycore Architectures through Transparent
Task Relocation},
booktitle = {{ARCS} 2012 Workshops, 28. Februar - 2. M{\"{a}}rz 2012, M{\"{u}}nchen,
Germany},
series = {{LNI}},
volume = {{P-200}},
pages = {263--274},
publisher = {{GI}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6222220/},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/RauchfussWH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HenkelHBWHPGHZVLK12,
author = {J{\"{o}}rg Henkel and
Andreas Herkersdorf and
Lars Bauer and
Thomas Wild and
Michael H{\"{u}}bner and
Ravi Kumar Pujari and
Artjom Grudnitsky and
Jan Heisswolf and
Aurang Zaib and
Benjamin Vogel and
Vahid Lari and
Sebastian Kobbe},
title = {Invasive manycore architectures},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {193--200},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6164944},
doi = {10.1109/ASPDAC.2012.6164944},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HenkelHBWHPGHZVLK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MillerWH12,
author = {Felix Miller and
Thomas Wild and
Andreas Herkersdorf},
title = {TSV-virtualization for Multi-protocol-Interconnect in 3D-ICs},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {374--381},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.135},
doi = {10.1109/DSD.2012.135},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MillerWH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/GerndtHHHMRWWZ12,
author = {Michael Gerndt and
Frank Hannig and
Andreas Herkersdorf and
Andreas Hollmann and
Marcel Meyer and
Sascha Roloff and
Josef Weidendorfer and
Thomas Wild and
Aurang Zaib},
title = {An integrated simulation framework for invasive computing},
booktitle = {Proceeding of the 2012 Forum on Specification and Design Languages,
Vienna, Austria, September 18-20, 2012},
pages = {209--216},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6337013/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/GerndtHHHMRWWZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WallentowitzLZWH12,
author = {Stefan Wallentowitz and
Andreas Lankes and
Aurang Zaib and
Thomas Wild and
Andreas Herkersdorf},
editor = {Dirk Koch and
Satnam Singh and
Jim T{\o}rresen},
title = {A framework for Open Tiled Manycore System-On-Chip},
booktitle = {22nd International Conference on Field Programmable Logic and Applications
(FPL), Oslo, Norway, August 29-31, 2012},
pages = {535--538},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/FPL.2012.6339273},
doi = {10.1109/FPL.2012.6339273},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/WallentowitzLZWH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HeisswolfZWKWTHB12,
author = {Jan Heisswolf and
Aurang Zaib and
Andreas Weichslgartner and
Ralf K{\"{o}}nig and
Thomas Wild and
J{\"{u}}rgen Teich and
Andreas Herkersdorf and
J{\"{u}}rgen Becker},
title = {Hardware-assisted Decentralized Resource Management for Networks on
Chip with QoS},
booktitle = {26th {IEEE} International Parallel and Distributed Processing Symposium
Workshops {\&} PhD Forum, {IPDPS} 2012, Shanghai, China, May 21-25,
2012},
pages = {234--241},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IPDPSW.2012.25},
doi = {10.1109/IPDPSW.2012.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/HeisswolfZWKWTHB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/PlyaskinWH12,
author = {Roman Plyaskin and
Thomas Wild and
Andreas Herkersdorf},
title = {System-level software performance simulation considering out-of-order
processor execution},
booktitle = {2012 International Symposium on System on Chip, ISSoC 2012, Tampere,
Finland, October 10-12, 2012},
pages = {1--7},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSoC.2012.6376348},
doi = {10.1109/ISSOC.2012.6376348},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/issoc/PlyaskinWH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/LlorenteKWH11,
author = {Daniel Llorente and
Kimon Karras and
Thomas Wild and
Andreas Herkersdorf},
title = {Advanced Packet Segmentation and Buffering Algorithms in Network Processors},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {4},
pages = {334--353},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24568-8\_17},
doi = {10.1007/978-3-642-24568-8\_17},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/LlorenteKWH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/WallentowitzMWH11,
author = {Stefan Wallentowitz and
Marcel Meyer and
Thomas Wild and
Andreas Herkersdorf},
editor = {Luigi Carro and
Andy D. Pimentel},
title = {Accelerating collective communication in message passing on manycore
System-on-Chip},
booktitle = {2011 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} XI, Samos, Greece, July 18-21, 2011},
pages = {9--16},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/SAMOS.2011.6045439},
doi = {10.1109/SAMOS.2011.6045439},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/samos/WallentowitzMWH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/hubner2011/HerkersdorfLMOWWZ11,
author = {Andreas Herkersdorf and
Andreas Lankes and
Michael Meitinger and
Rainer Ohlendorf and
Stefan Wallentowitz and
Thomas Wild and
Johannes Zeppenfeld},
editor = {Michael H{\"{u}}bner and
J{\"{u}}rgen Becker},
title = {Hardware Support for Efficient Resource Utilization in Manycore Processor
Systems},
booktitle = {Multiprocessor System-on-Chip - Hardware Design and Tool Integration},
pages = {57--87},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-1-4419-6460-1\_3},
doi = {10.1007/978-1-4419-6460-1\_3},
timestamp = {Wed, 28 Apr 2021 16:06:52 +0200},
biburl = {https://dblp.org/rec/books/sp/hubner2011/HerkersdorfLMOWWZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/KarrasWH10,
author = {Kimon Karras and
Thomas Wild and
Andreas Herkersdorf},
editor = {Bill Lin and
Jeffrey C. Mogul and
Ravishankar R. Iyer},
title = {A folded pipeline network processor architecture for 100 Gbit/s networks},
booktitle = {Proceedings of the 2010 {ACM/IEEE} Symposium on Architecture for Networking
and Communications Systems, {ANCS} 2010, San Diego, California, USA,
October 25-26, 2010},
pages = {2},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1872007.1872010},
doi = {10.1145/1872007.1872010},
timestamp = {Mon, 15 May 2023 22:11:15 +0200},
biburl = {https://dblp.org/rec/conf/ancs/KarrasWH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/OhlendorfMWH10,
author = {Rainer Ohlendorf and
Michael Meitinger and
Thomas Wild and
Andreas Herkersdorf},
editor = {Yale N. Patt and
Pierfrancesco Foglia and
Evelyn Duesterwald and
Paolo Faraboschi and
Xavier Martorell},
title = {An Application-Aware Load Balancing Strategy for Network Processors},
booktitle = {High Performance Embedded Architectures and Compilers, 5th International
Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5952},
pages = {156--170},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11515-8\_13},
doi = {10.1007/978-3-642-11515-8\_13},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/OhlendorfMWH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/LankesWHSR10,
author = {Andreas Lankes and
Thomas Wild and
Andreas Herkersdorf and
S{\"{o}}ren Sonntag and
Helmut Reinig},
title = {Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach
Message Dependent Deadlocks in On-chip Networks},
booktitle = {{NOCS} 2010, Fourth {ACM/IEEE} International Symposium on Networks-on-Chip,
Grenoble, France, May 3-6, 2010},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NOCS.2010.11},
doi = {10.1109/NOCS.2010.11},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/LankesWHSR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/platzner2010/OhlendorfMWH10,
author = {Rainer Ohlendorf and
Michael Meitinger and
Thomas Wild and
Andreas Herkersdorf},
editor = {Marco Platzner and
J{\"{u}}rgen Teich and
Norbert Wehn},
title = {FlexPath {NP} - Flexible, Dynamically Reconfigurable Processing Paths
in Network Processors},
booktitle = {Dynamically Reconfigurable Systems - Architectures, Design Methods
and Applications},
pages = {355--374},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-90-481-3485-4\_17},
doi = {10.1007/978-90-481-3485-4\_17},
timestamp = {Sun, 25 Jul 2021 11:34:40 +0200},
biburl = {https://dblp.org/rec/books/sp/platzner2010/OhlendorfMWH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/LankesWH09,
author = {Andreas Lankes and
Thomas Wild and
Andreas Herkersdorf},
editor = {Antonio N{\'{u}}{\~{n}}ez and
Pedro P. Carballo},
title = {Hierarchical NoCs for Optimized Access to Shared Memory and {IO} Resources},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},
pages = {255--262},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DSD.2009.158},
doi = {10.1109/DSD.2009.158},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/LankesWH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/OhlendorfMWH08,
author = {Rainer Ohlendorf and
Michael Meitinger and
Thomas Wild and
Andreas Herkersdorf},
title = {A Processing Path Dispatcher in Network Processor MPSoCs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {16},
number = {10},
pages = {1335--1345},
year = {2008},
url = {https://doi.org/10.1109/TVLSI.2008.2002048},
doi = {10.1109/TVLSI.2008.2002048},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/OhlendorfMWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/LankesWZ08,
author = {Andreas Lankes and
Thomas Wild and
Johannes Zeppenfeld},
editor = {Uwe Brinkschulte and
Theo Ungerer and
Christian Hochberger and
Rainer G. Spallek},
title = {System Level Simulation of Autonomic SoCs with {TAPES}},
booktitle = {Architecture of Computing Systems - {ARCS} 2008, 21st International
Conference, Dresden, Germany, February 25-28, 2008, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4934},
pages = {9--22},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-78153-0\_3},
doi = {10.1007/978-3-540-78153-0\_3},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/LankesWZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/MeitingerOWH08,
author = {Michael Meitinger and
Rainer Ohlendorf and
Thomas Wild and
Andreas Herkersdorf},
editor = {Uwe Brinkschulte and
Theo Ungerer and
Christian Hochberger and
Rainer G. Spallek},
title = {A Hardware Packet Re-Sequencer Unit for Network Processors},
booktitle = {Architecture of Computing Systems - {ARCS} 2008, 21st International
Conference, Dresden, Germany, February 25-28, 2008, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4934},
pages = {85--97},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-78153-0\_8},
doi = {10.1007/978-3-540-78153-0\_8},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/MeitingerOWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LlorenteKWH08,
author = {Daniel Llorente and
Kimon Karras and
Thomas Wild and
Andreas Herkersdorf},
title = {Buffer allocation for advanced packet segmentation in Network Processors},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {221--226},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580182},
doi = {10.1109/ASAP.2008.4580182},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LlorenteKWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PionteckKAMMOWH08,
author = {Thilo Pionteck and
Roman Koch and
Carsten Albrecht and
Erik Maehle and
Michael Meitinger and
Rainer Ohlendorf and
Thomas Wild and
Andreas Herkersdorf},
title = {Network processors},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {352},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629960},
doi = {10.1109/FPL.2008.4629960},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PionteckKAMMOWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/MeitingerOWH08,
author = {Michael Meitinger and
Rainer Ohlendorf and
Thomas Wild and
Andreas Herkersdorf},
title = {FlexPath {NP} - {A} network processor architecture with flexible processing
paths},
booktitle = {2008 {IEEE} International Symposium on System-on-Chip, {SOC} 2008,
Tampere, Finland, November 5-6, 2008},
pages = {1--6},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISSOC.2008.4694869},
doi = {10.1109/ISSOC.2008.4694869},
timestamp = {Mon, 09 Aug 2021 14:54:02 +0200},
biburl = {https://dblp.org/rec/conf/issoc/MeitingerOWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WangWRL08,
author = {Zhonglei Wang and
Thomas Wild and
Stefan R{\"{u}}ping and
Bernhard Lippmann},
title = {Benchmarking Domain Specific Processors: {A} Case Study of Evaluating
a Smart Card Processor Design},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {16--21},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.25},
doi = {10.1109/ISVLSI.2008.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/WangWRL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/KarrasLWH08,
author = {Kimon Karras and
Daniel Llorente and
Thomas Wild and
Andreas Herkersdorf},
editor = {Walid A. Najjar and
Holger Blume},
title = {Improving memory subsystem performance in network processors with
smart packet segmentation},
booktitle = {Proceedings of the 2008 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008),
Samos, Greece, July 21-24, 2008},
pages = {210--217},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSAMOS.2008.4664866},
doi = {10.1109/ICSAMOS.2008.4664866},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/KarrasLWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/OhlendorfWMRH07,
author = {Rainer Ohlendorf and
Thomas Wild and
Michael Meitinger and
Holm Rauchfuss and
Andreas Herkersdorf},
title = {Simulated and measured performance evaluation of RISC-based SoC platforms
in network processing applications},
journal = {J. Syst. Archit.},
volume = {53},
number = {10},
pages = {703--718},
year = {2007},
url = {https://doi.org/10.1016/j.sysarc.2007.01.009},
doi = {10.1016/J.SYSARC.2007.01.009},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/OhlendorfWMRH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/LankesWZ07,
author = {Andreas Lankes and
Thomas Wild and
Johannes Zeppenfeld},
title = {Power Estimation of Time Variant SoCs with {TAPES}},
booktitle = {Tenth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2007), 29-31 August 2007, L{\"{u}}beck,
Germany},
pages = {261--264},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DSD.2007.4341478},
doi = {10.1109/DSD.2007.4341478},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/dsd/LankesWZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MeitingerOWH07,
author = {Michael Meitinger and
Rainer Ohlendorf and
Thomas Wild and
Andreas Herkersdorf},
title = {A Programmable Stream Processing Engine for Packet Manipulation in
Network Processors},
booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2007), May 9-11, 2007, Porto Alegre, Brazil},
pages = {259--264},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISVLSI.2007.16},
doi = {10.1109/ISVLSI.2007.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/MeitingerOWH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpcn/FoagW06,
author = {J{\"{u}}rgen Foag and
Thomas Wild},
title = {Queuing algorithm for speculative Network Processors},
journal = {Int. J. High Perform. Comput. Netw.},
volume = {4},
number = {5/6},
pages = {241--247},
year = {2006},
url = {https://doi.org/10.1504/IJHPCN.2006.013479},
doi = {10.1504/IJHPCN.2006.013479},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpcn/FoagW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WildHO06,
author = {Thomas Wild and
Andreas Herkersdorf and
Rainer Ohlendorf},
editor = {Georges G. E. Gielen},
title = {Performance evaluation for system-on-chip architectures using trace-based
transaction level simulation},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {248--253},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244111},
doi = {10.1109/DATE.2006.244111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WildHO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/OhlendorfWMRH06,
author = {Rainer Ohlendorf and
Thomas Wild and
Michael Meitinger and
Holm Rauchfuss and
Andreas Herkersdorf},
editor = {Georgi Gaydadjiev and
C. John Glossner and
Jarmo Takala and
Stamatis Vassiliadis},
title = {Performance Evaluation of RISC-based SoC Platforms in Network Processing
Applications},
booktitle = {Proceedings of 2006 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2006),
Samos, Greece, July 17-20, 2006},
pages = {152--159},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICSAMOS.2006.300822},
doi = {10.1109/ICSAMOS.2006.300822},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/OhlendorfWMRH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dagstuhl/HerkersdorfCMOW06,
author = {Andreas Herkersdorf and
Christopher Claus and
Michael Meitinger and
Rainer Ohlendorf and
Thomas Wild},
editor = {Peter M. Athanas and
J{\"{u}}rgen Becker and
Gordon J. Brebner and
J{\"{u}}rgen Teich},
title = {Reconfigurable Processing Units vs. Reconfigurable Interconnects},
booktitle = {Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006},
series = {Dagstuhl Seminar Proceedings},
volume = {06141},
publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik
(IBFI), Schloss Dagstuhl, Germany},
year = {2006},
url = {http://drops.dagstuhl.de/opus/volltexte/2006/779},
timestamp = {Thu, 10 Jun 2021 13:02:05 +0200},
biburl = {https://dblp.org/rec/conf/dagstuhl/HerkersdorfCMOW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/WildHL05,
author = {Thomas Wild and
Andreas Herkersdorf and
Gyoo{-}Yeong Lee},
title = {{TAPES} - Trace-based architecture performance evaluation with SystemC},
journal = {Des. Autom. Embed. Syst.},
volume = {10},
number = {2-3},
pages = {157--179},
year = {2005},
url = {https://doi.org/10.1007/s10617-006-9589-4},
doi = {10.1007/S10617-006-9589-4},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dafes/WildHL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/OhlendorfHW05,
author = {Rainer Ohlendorf and
Andreas Herkersdorf and
Thomas Wild},
editor = {Petru Eles and
Axel Jantsch and
Reinaldo A. Bergamaschi},
title = {FlexPath {NP:} a network processor concept with application-driven
flexible processing paths},
booktitle = {Proceedings of the 3rd {IEEE/ACM/IFIP} International Conference on
Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2005,
Jersey City, NJ, USA, September 19-21, 2005},
pages = {279--284},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1084834.1084904},
doi = {10.1145/1084834.1084904},
timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
biburl = {https://dblp.org/rec/conf/codes/OhlendorfHW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/FoagW05,
author = {J{\"{u}}rgen Foag and
Thomas Wild},
title = {Predictive processing architecture extension for network processors},
booktitle = {12th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2005, Gammarth, Tunisia, December 11-14, 2005},
pages = {1--4},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ICECS.2005.4633587},
doi = {10.1109/ICECS.2005.4633587},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/FoagW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/FoagW04,
author = {J{\"{u}}rgen Foag and
Thomas Wild},
editor = {M. Rasit Eskicioglu},
title = {Queuing Algorithm for Speculative Network Processors},
booktitle = {Proceedings of the 18th Annual Symposium on High Performance Computing
Systems and Applications, {HPCS} 2004, May 16-19, 2004, Winnipeg,
Manitoba, Canada},
pages = {3--8},
publisher = {University of Manitoba, Department of Computer Science},
year = {2004},
timestamp = {Wed, 17 May 2006 15:13:52 +0200},
biburl = {https://dblp.org/rec/conf/hpcs/FoagW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/de/Wild2003,
author = {Thomas Wild},
title = {Ein rekursives Verfahren zur Abbildung und zum Scheduling von Prozess-Graphen
mit Kontrollabh{\"{a}}ngigkeiten},
school = {Technical University Munich, Germany},
year = {2003},
url = {http://tumb1.biblio.tu-muenchen.de/publ/diss/ei/2003/wild.html},
urn = {urn:nbn:de:bvb:91-diss2003073116031},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/de/Wild2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BrunnbauerWFP03,
author = {Winthir Brunnbauer and
Thomas Wild and
J{\"{u}}rgen Foag and
Nuria Pazos},
title = {A Constructive Algorithm with Look-Ahead for Mapping and Scheduling
of Task Graphs with Conditional Edges},
booktitle = {2003 Euromicro Symposium on Digital Systems Design {(DSD} 2003), Architectures,
Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey},
pages = {98--103},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DSD.2003.1231906},
doi = {10.1109/DSD.2003.1231906},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BrunnbauerWFP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WildFPB03,
author = {Thomas Wild and
J{\"{u}}rgen Foag and
Nuria Pazos and
Winthir Brunnbauer},
title = {Mapping and Scheduling for Architecture Exploration of Networking
SoCs},
booktitle = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
4-8 January 2003, New Delhi, India},
pages = {376--381},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICVD.2003.1183165},
doi = {10.1109/ICVD.2003.1183165},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WildFPB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/FoagPWB02,
author = {J{\"{u}}rgen Foag and
Nuria Pazos and
Thomas Wild and
Winthir Brunnbauer},
title = {Self-Adaptive Parallel Processing Architecture For High-speed Networking},
booktitle = {16th Annual International Symposium on High Performance Computing
Systems and Applications, {HPCS} 2002, June 16-19, 2002, Moncton,
NB, Canada},
pages = {45--52},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/HPCSA.2002.1019485},
doi = {10.1109/HPCSA.2002.1019485},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcs/FoagPWB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscc/FoagWPB02,
author = {J{\"{u}}rgen Foag and
Thomas Wild and
Nuria Pazos and
Winthir Brunnbauer},
title = {Predictive methodology for high-performance networking},
booktitle = {Proceedings of the Seventh {IEEE} Symposium on Computers and Communications
{(ISCC} 2002), 1-4 July 2002, Taormina, Italy},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ISCC.2002.1021674},
doi = {10.1109/ISCC.2002.1021674},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscc/FoagWPB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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