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ORCIDBibTeX records: Hannah Honghua Yang
@incollection{DBLP:reference/algo/WongY16,
author = {Martin D. F. Wong and
Hannah Honghua Yang},
title = {Circuit Partitioning: {A} Network-Flow-Based Balanced Min-Cut Approach},
booktitle = {Encyclopedia of Algorithms},
pages = {295--301},
year = {2016},
url = {https://doi.org/10.1007/978-1-4939-2864-4\_68},
doi = {10.1007/978-1-4939-2864-4\_68},
timestamp = {Wed, 12 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/algo/WongY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/algo/YangW08,
author = {Hannah Honghua Yang and
Martin D. F. Wong},
editor = {Ming{-}Yang Kao},
title = {Circuit Partitioning: {A} Network-Flow-Based Balanced Min-Cut Approach},
booktitle = {Encyclopedia of Algorithms - 2008 Edition},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-0-387-30162-4\_68},
doi = {10.1007/978-0-387-30162-4\_68},
timestamp = {Thu, 27 Jun 2019 16:25:31 +0200},
biburl = {https://dblp.org/rec/reference/algo/YangW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiHZZBYYPC07,
author = {Zhuoyuan Li and
Xianlong Hong and
Qiang Zhou and
Shan Zeng and
Jinian Bian and
Wenjian Yu and
Hannah Honghua Yang and
Vijay Pitchumani and
Chung{-}Kuan Cheng},
title = {Efficient Thermal via Planning Approach and Its Application in 3-D
Floorplanning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {4},
pages = {645--658},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2006.885831},
doi = {10.1109/TCAD.2006.885831},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiHZZBYYPC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeCY07,
author = {Hsun{-}Cheng Lee and
Yao{-}Wen Chang and
Hannah Honghua Yang},
title = {MB\({}^{\mbox{ast}}\)-Tree: {A} Multilevel Floorplanner for Large-Scale
Building-Module Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {8},
pages = {1430--1444},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2007.891368},
doi = {10.1109/TCAD.2007.891368},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeCY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LiHZCBYPC06,
author = {Zhuoyuan Li and
Xianlong Hong and
Qiang Zhou and
Yici Cai and
Jinian Bian and
Hannah Honghua Yang and
Vijay Pitchumani and
Chung{-}Kuan Cheng},
title = {Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {53-I},
number = {12},
pages = {2637--2646},
year = {2006},
url = {https://doi.org/10.1109/TCSI.2006.883857},
doi = {10.1109/TCSI.2006.883857},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LiHZCBYPC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LiHZBYP06,
author = {Zhuoyuan Li and
Xianlong Hong and
Qiang Zhou and
Jinian Bian and
Hannah Honghua Yang and
Vijay Pitchumani},
title = {Efficient thermal-oriented 3D floorplanning and thermal via planning
for two-stacked-die integration},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {11},
number = {2},
pages = {325--345},
year = {2006},
url = {https://doi.org/10.1145/1142155.1142159},
doi = {10.1145/1142155.1142159},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LiHZBYP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/LiHZZBYPC06,
author = {Zhuoyuan Li and
Xianlong Hong and
Qiang Zhou and
Shan Zeng and
Jinian Bian and
Hannah Honghua Yang and
Vijay Pitchumani and
Chung{-}Kuan Cheng},
editor = {Louis Scheffer},
title = {Integrating dynamic thermal via planning with 3D floorplanning algorithm},
booktitle = {Proceedings of the 2006 International Symposium on Physical Design,
{ISPD} 2006, San Jose, California, USA, April 9-12, 2006},
pages = {178--185},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1123008.1123048},
doi = {10.1145/1123008.1123048},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/LiHZZBYPC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JagannathanYKMMRRC05,
author = {Ashok Jagannathan and
Hannah Honghua Yang and
Kris Konigsfeld and
Dan Milliron and
Mosur Mohan and
Michail Romesis and
Glenn Reinman and
Jason Cong},
editor = {Tingao Tang},
title = {Microarchitecture evaluation with floorplanning and interconnect pipelining},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
pages = {8--15},
publisher = {{ACM} Press},
year = {2005},
url = {https://doi.org/10.1145/1120725.1120879},
doi = {10.1145/1120725.1120879},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/JagannathanYKMMRRC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cocoon/YangSYX05,
author = {Guowu Yang and
Xiaoyu Song and
Hannah Honghua Yang and
Fei Xie},
editor = {Lusheng Wang},
title = {A Theoretical Upper Bound for IP-Based Floorplanning},
booktitle = {Computing and Combinatorics, 11th Annual International Conference,
{COCOON} 2005, Kunming, China, August 16-29, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3595},
pages = {411--419},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11533719\_42},
doi = {10.1007/11533719\_42},
timestamp = {Tue, 14 May 2019 10:00:35 +0200},
biburl = {https://dblp.org/rec/conf/cocoon/YangSYX05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FengMY04,
author = {Yan Feng and
Dinesh P. Mehta and
Hannah Honghua Yang},
title = {Constrained floorplanning using network flows},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {23},
number = {4},
pages = {572--580},
year = {2004},
url = {https://doi.org/10.1109/TCAD.2004.825877},
doi = {10.1109/TCAD.2004.825877},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/FengMY04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangHYZCL04,
author = {Changqi Yang and
Xianlong Hong and
Hannah Honghua Yang and
Qiang Zhou and
Yici Cai and
Yongqiang Lu},
title = {Recursively combine floorplan and Q-place in mixed mode placement
based on circuit's variety of block configuration},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {81--84},
publisher = {{IEEE}},
year = {2004},
timestamp = {Wed, 07 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/YangHYZCL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RafiqCYJS03,
author = {Faran Rafiq and
Malgorzata Chrzanowska{-}Jeske and
Hannah Honghua Yang and
Marcin Jeske and
Naveed A. Sherwani},
title = {Integrated floorplanning with buffer/channel insertion for bus-based
designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {6},
pages = {730--741},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.811443},
doi = {10.1109/TCAD.2003.811443},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RafiqCYJS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LeeCHY03,
author = {Hsun{-}Cheng Lee and
Yao{-}Wen Chang and
Jer{-}Ming Hsu and
Hannah Honghua Yang},
title = {Multilevel floorplanning/placement for large-scale modules using B*-trees},
booktitle = {Proceedings of the 40th Design Automation Conference, {DAC} 2003,
Anaheim, CA, USA, June 2-6, 2003},
pages = {812--817},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/775832.776037},
doi = {10.1145/775832.776037},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LeeCHY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/FengMY03,
author = {Yan Feng and
Dinesh P. Mehta and
Hannah Honghua Yang},
editor = {Massoud Pedram and
Charles J. Alpert},
title = {Constrained "Modern" Floorplanning},
booktitle = {Proceedings of the 2003 International Symposium on Physical Design,
{ISPD} 2003, Monterey, CA, USA, April 6-9, 2003},
pages = {128--135},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/640000.640030},
doi = {10.1145/640000.640030},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispd/FengMY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/RafiqCYS02,
author = {Faran Rafiq and
Malgorzata Chrzanowska{-}Jeske and
Hannah Honghua Yang and
Naveed A. Sherwani},
editor = {Sachin S. Sapatnekar and
Massoud Pedram},
title = {Integrated floorplanning with buffer/channel insertion for bus-based
microprocessor designs},
booktitle = {Proceedings of 2002 International Symposium on Physical Design, {ISPD}
2002, Del Mar, CA, USA, April 7-10, 2002},
pages = {56--61},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/505388.505403},
doi = {10.1145/505388.505403},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/RafiqCYS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YoungWY01,
author = {Evangeline F. Y. Young and
Martin D. F. Wong and
Hannah Honghua Yang},
title = {On extending slicing floorplan to handle L/T-shaped modules andabutment
constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {20},
number = {6},
pages = {800--807},
year = {2001},
url = {https://doi.org/10.1109/43.924833},
doi = {10.1109/43.924833},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YoungWY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenWMY01,
author = {Hung{-}Ming Chen and
D. F. Wong and
Wai{-}Kei Mak and
Hannah Honghua Yang},
editor = {Kaushik Roy and
Sung{-}Mo Kang and
Cheng{-}Kok Koh},
title = {Faster and more accurate wiring evaluation in interconnect-centric
floorplanning},
booktitle = {Proceedings of the 11th {ACM} Great Lakes Symposium on {VLSI} 2001,
West Lafayette, Indiana, USA, 2001},
pages = {62--67},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/368122.368798},
doi = {10.1145/368122.368798},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenWMY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YoungWY00,
author = {Evangeline F. Y. Young and
Martin D. F. Wong and
Hannah Honghua Yang},
title = {Slicing floorplans with range constraint},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {19},
number = {2},
pages = {272--278},
year = {2000},
url = {https://doi.org/10.1109/43.828556},
doi = {10.1109/43.828556},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YoungWY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YoungWY99,
author = {Evangeline F. Y. Young and
Martin D. F. Wong and
Hannah Honghua Yang},
title = {Slicing floorplans with boundary constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {18},
number = {9},
pages = {1385--1389},
year = {1999},
url = {https://doi.org/10.1109/43.784129},
doi = {10.1109/43.784129},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YoungWY99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChenZYWYS99,
author = {Hung{-}Ming Chen and
Hai Zhou and
Fung Yu Young and
D. F. Wong and
Hannah Honghua Yang and
Naveed A. Sherwani},
editor = {Jacob K. White and
Ellen Sentovich},
title = {Integrated floorplanning and interconnect planning},
booktitle = {Proceedings of the 1999 {IEEE/ACM} International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999},
pages = {354--357},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICCAD.1999.810674},
doi = {10.1109/ICCAD.1999.810674},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/ChenZYWYS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CasasYKJTOS99,
author = {Jeremy Casas and
Hannah Honghua Yang and
Manpreet Khaira and
Mandar Joshi and
Thomas Tetzlaff and
Steve W. Otto and
Erik Seligman},
title = {Logic Verification of Very Large Circuits Using Shark},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {310--317},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745167},
doi = {10.1109/ICVD.1999.745167},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CasasYKJTOS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangW98,
author = {Hannah Honghua Yang and
Martin D. F. Wong},
title = {Optimal min-area min-cut replication in partitioned circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {11},
pages = {1175--1183},
year = {1998},
url = {https://doi.org/10.1109/43.736190},
doi = {10.1109/43.736190},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/algorithmica/RamachandranY97,
author = {Vijaya Ramachandran and
Honghua Yang},
title = {An Efficient Parallel Algorithm for the Layered Planar Monotone Circuit
Value Problem},
journal = {Algorithmica},
volume = {18},
number = {3},
pages = {384--404},
year = {1997},
url = {https://doi.org/10.1007/PL00009162},
doi = {10.1007/PL00009162},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/algorithmica/RamachandranY97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangW97,
author = {Hannah Honghua Yang and
Martin D. F. Wong},
title = {Circuit clustering for delay minimization under area and pin constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {9},
pages = {976--986},
year = {1997},
url = {https://doi.org/10.1109/43.658566},
doi = {10.1109/43.658566},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/siamcomp/RamachandranY96,
author = {Vijaya Ramachandran and
Honghua Yang},
title = {An Efficient Parallel Algorithm for the General Planar Monotone Circuit
Value Problem},
journal = {{SIAM} J. Comput.},
volume = {25},
number = {2},
pages = {312--339},
year = {1996},
url = {https://doi.org/10.1137/S0097539793260775},
doi = {10.1137/S0097539793260775},
timestamp = {Sat, 27 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/siamcomp/RamachandranY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangW96,
author = {Hannah Honghua Yang and
Martin D. F. Wong},
title = {Balanced partitioning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {15},
number = {12},
pages = {1533--1540},
year = {1996},
url = {https://doi.org/10.1109/43.552086},
doi = {10.1109/43.552086},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/YangW95,
author = {Honghua Yang and
D. F. Wong},
title = {Circuit clustering for delay minimization under area and pin constraints},
booktitle = {1995 European Design and Test Conference, ED{\&}TC 1995, Paris,
France, March 6-9, 1995},
pages = {65--70},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/EDTC.1995.470418},
doi = {10.1109/EDTC.1995.470418},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/YangW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/YangW95,
author = {Hannah Honghua Yang and
D. F. Wong},
editor = {Richard L. Rudell},
title = {New algorithms for min-cut replication in partitioned circuits},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {216--222},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.480015},
doi = {10.1109/ICCAD.1995.480015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/YangW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/algorithmica/RamachandranY94,
author = {Vijaya Ramachandran and
Honghua Yang},
title = {Finding the Closed Partition of a Planar Graph},
journal = {Algorithmica},
volume = {11},
number = {5},
pages = {443--468},
year = {1994},
url = {https://doi.org/10.1007/BF01293266},
doi = {10.1007/BF01293266},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/algorithmica/RamachandranY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/YangW94,
author = {Honghua Yang and
D. F. Wong},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {Efficient network flow based min-cut balanced partitioning},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {50--55},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629743},
doi = {10.1109/ICCAD.1994.629743},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/YangW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/YangW94a,
author = {Hannah Honghua Yang and
D. F. Wong},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {Edge-map: optimal performance driven technology mapping for iterative
{LUT} based {FPGA} designs},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {150--155},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629758},
doi = {10.1109/ICCAD.1994.629758},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/YangW94a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/soda/RamachandranY94,
author = {Vijaya Ramachandran and
Honghua Yang},
editor = {Daniel Dominic Sleator},
title = {An Efficient Parallel Algorithm for the General Planar Monotone Circuit
Value Problem},
booktitle = {Proceedings of the Fifth Annual {ACM-SIAM} Symposium on Discrete Algorithms.
23-25 January 1994, Arlington, Virginia, {USA}},
pages = {622--631},
publisher = {{ACM/SIAM}},
year = {1994},
url = {http://dl.acm.org/citation.cfm?id=314464.314662},
timestamp = {Thu, 05 Jul 2018 07:29:19 +0200},
biburl = {https://dblp.org/rec/conf/soda/RamachandranY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esa/RamachandranY93,
author = {Vijaya Ramachandran and
Honghua Yang},
editor = {Thomas Lengauer},
title = {An Efficient Parallel Algorithm for the Layered Planar Monotone Circuit
Value Problem},
booktitle = {Algorithms - {ESA} '93, First Annual European Symposium, Bad Honnef,
Germany, September 30 - October 2, 1993, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {726},
pages = {321--332},
publisher = {Springer},
year = {1993},
url = {https://doi.org/10.1007/3-540-57273-2\_67},
doi = {10.1007/3-540-57273-2\_67},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/esa/RamachandranY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/Yang91,
author = {Honghua Yang},
title = {An {NC} algorithm for the general planar monotone circuit value problem},
booktitle = {Proceedings of the Third {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1991, 2-5 December 1991, Dallas, Texas, {USA}},
pages = {196--203},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/SPDP.1991.218279},
doi = {10.1109/SPDP.1991.218279},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/Yang91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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