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ORCIDBibTeX records: Jiren Yuan
@inproceedings{DBLP:conf/iscas/ChenY07,
author = {Cheng Chen and
Jiren Yuan},
title = {A 10-bit 500-MS/s 124-mW Subranging Folding {ADC} in 0.13 {\(\mathrm{\mu}\)}m
{CMOS}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {1709--1712},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.377923},
doi = {10.1109/ISCAS.2007.377923},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XuY05,
author = {Gang Xu and
Jiren Yuan},
title = {Performance analysis of general charge sampling},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {52-II},
number = {2},
pages = {107--111},
year = {2005},
url = {https://doi.org/10.1109/TCSII.2004.840479},
doi = {10.1109/TCSII.2004.840479},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/XuY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PiperY05,
author = {Johan Piper and
Jiren Yuan},
title = {Design considerations of a floating-point {ADC} with embedded {S/H}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {6166--6169},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1466048},
doi = {10.1109/ISCAS.2005.1466048},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PiperY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iastedCCS/XuY04,
author = {Gang Xu and
Jiren Yuan},
editor = {M. H. Rashid},
title = {A {CMOS} 500 {MS/S} charge sampler},
booktitle = {Proceedings of the Second {IASTED} International Conference on Circuits,
Signals, and Systems, Clearwater Beach, FL, USA, November 28, 2004
- December 1, 2004},
pages = {462--466},
publisher = {{IASTED/ACTA} Press},
year = {2004},
timestamp = {Thu, 11 Jan 2007 14:05:40 +0100},
biburl = {https://dblp.org/rec/conf/iastedCCS/XuY04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuY04,
author = {Gang Xu and
Jiren Yuan},
title = {A programmable analog-to-digital converter},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {585--588},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ISCAS.2004.1328262},
doi = {10.1109/ISCAS.2004.1328262},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XuY04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZhouY03,
author = {Yijun Zhou and
Jiren Yuan},
title = {A 10-bit wide-band {CMOS} direct digital {RF} amplitude modulator},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {7},
pages = {1182--1188},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.813290},
doi = {10.1109/JSSC.2003.813290},
timestamp = {Wed, 20 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/ZhouY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZhouY03a,
author = {Yijun Zhou and
Jiren Yuan},
title = {An 8-bit 100-MHz {CMOS} linear interpolation {DAC}},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {10},
pages = {1758--1761},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.817593},
doi = {10.1109/JSSC.2003.817593},
timestamp = {Wed, 20 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/ZhouY03a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/ZhouY03,
author = {Yijun Zhou and
Jiren Yuan},
editor = {Jos{\'{e}} E. Franca and
Rudolf Koch},
title = {A highly integrated {CMOS} direct digital {RF} quadrature modulator},
booktitle = {{ESSCIRC} 2003 - 29th European Solid-State Circuits Conference, Estoril,
Portugal, September 16-18, 2003},
pages = {573--576},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ESSCIRC.2003.1257200},
doi = {10.1109/ESSCIRC.2003.1257200},
timestamp = {Tue, 04 Jul 2023 08:46:31 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/ZhouY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuY03,
author = {Gang Xu and
Jiren Yuan},
title = {A Differential Difference Comparator for multi-step {A/D} converters},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {257--260},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1205549},
doi = {10.1109/ISCAS.2003.1205549},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XuY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangY03,
author = {Lixin Yang and
Jiren Yuan},
title = {An arbitrarily skewable multiphase clock generator combining direct
interpolation with phase error average},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {645--648},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1205646},
doi = {10.1109/ISCAS.2003.1205646},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YangY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuY03a,
author = {Gang Xu and
Jiren Yuan},
title = {Performance analysis of general charge sampling},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {745--748},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1205671},
doi = {10.1109/ISCAS.2003.1205671},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XuY03a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouY02,
author = {Yijun Zhou and
Jiren Yuan},
title = {A direct digital {RF} amplitude modulator},
booktitle = {Proceedings of the 2002 International Symposium on Circuits and Systems,
{ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
pages = {141--144},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ISCAS.2002.1009797},
doi = {10.1109/ISCAS.2002.1009797},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhouY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangZY02,
author = {Lixin Yang and
Yijun Zhou and
Jiren Yuan},
title = {A non-feedback multiphase clock generator},
booktitle = {Proceedings of the 2002 International Symposium on Circuits and Systems,
{ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
pages = {389--392},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ISCAS.2002.1010473},
doi = {10.1109/ISCAS.2002.1010473},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YangZY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouY01,
author = {Yijun Zhou and
Jiren Yuan},
title = {An 8-Bit, 100-MHz low glitch interpolation {DAC}},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {116--119},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.922184},
doi = {10.1109/ISCAS.2001.922184},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhouY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuY01,
author = {Gang Xu and
Jiren Yuan},
title = {An embedded low power {FIR} filter},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {230--233},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.922214},
doi = {10.1109/ISCAS.2001.922214},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XuY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PiperY01,
author = {Johan Piper and
Jiren Yuan},
title = {Realization of a floating-point {A/D} converter},
booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems,
{ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
pages = {404--407},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ISCAS.2001.921878},
doi = {10.1109/ISCAS.2001.921878},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PiperY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StrandbergY00,
author = {Roland Strandberg and
Jiren Yuan},
title = {Single input current-sensing differential logic {(SCSDL)}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
May 2000, Proceedings},
pages = {764--767},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ISCAS.2000.857208},
doi = {10.1109/ISCAS.2000.857208},
timestamp = {Fri, 13 Aug 2021 09:26:01 +0200},
biburl = {https://dblp.org/rec/conf/iscas/StrandbergY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/YuanP99,
author = {Jiren Yuan and
Johan Piper},
title = {Floating-point analog-to-digital converter},
booktitle = {6th {IEEE} International Conference on Electronics, Circuits and Systems,
{ICECS} 1999, Pafos, Cyprus, September 5-8, 1999},
pages = {1385--1388},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/ICECS.1999.814428},
doi = {10.1109/ICECS.1999.814428},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/YuanP99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YuanS97,
author = {Jiren Yuan and
Christer Svensson},
title = {New single-clock {CMOS} latches and flipflops with improved speed
and power savings},
journal = {{IEEE} J. Solid State Circuits},
volume = {32},
number = {1},
pages = {62--69},
year = {1997},
url = {https://doi.org/10.1109/4.553179},
doi = {10.1109/4.553179},
timestamp = {Thu, 07 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/YuanS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YuanS94,
author = {Jiren Yuan and
Crister Svensson},
title = {A 10-bit 5-MS/s successive approximation {ADC} cell used in a 70-MS/s
{ADC} array in 1.2-{\(\mu\)}m {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {29},
number = {8},
pages = {866--872},
year = {1994},
url = {https://doi.org/10.1109/4.297689},
doi = {10.1109/4.297689},
timestamp = {Tue, 09 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/YuanS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SvenssonY94,
author = {Crister Svensson and
Jiren Yuan},
title = {A 3-level asynchronous protocol for a differential two-wire communication
link},
journal = {{IEEE} J. Solid State Circuits},
volume = {29},
number = {9},
pages = {1129--1132},
year = {1994},
url = {https://doi.org/10.1109/4.309909},
doi = {10.1109/4.309909},
timestamp = {Wed, 03 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SvenssonY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DellAcquaHILVSYHBDGLLNSZABDPSSSCFGBGMTCKABBEYSHP93,
author = {A. Dell'Acqua and
M. Hansen and
Sami J. Inkinen and
B. Lofstedt and
J. P. Vanuxem and
Christer Svensson and
Jiren Yuan and
H. Hentzell and
L. Del Buono and
J. David and
J. F. Genat and
H. Lebbolo and
O. LeDortz and
P. Nayman and
Aurore Savoy{-}Navarro and
R. Zitoun and
Cesare Alippi and
Luca Breveglieri and
Luigi Dadda and
Vincenzo Piuri and
Fabio Salice and
Mariagiovanna Sami and
Renato Stefanelli and
P. Cattaneo and
G. Fumagalli and
G. Goggi and
Simona Brigati and
Umberto Gatti and
Franco Maloberti and
Guido Torelli and
P. Carlson and
A. Kerek and
Goran Appelquist and
S. Berglund and
C. Bohm and
Magnus Engstr{\"{o}}m and
N. Yamdagni and
Rolf Sundblad and
I. H{\"{o}}glund and
S. T. Persson},
editor = {Fabrizio Lombardi and
Mariagiovanna Sami and
Yvon Savaria and
Renato Stefanelli},
title = {System Level Policies for Fault Tolerance Issues in the {FERMI} Project},
booktitle = {The {IEEE} International Workshop on Defect and Fault Tolerance in
{VLSI} Systems, October 27-29, 1993, Venice, Italy, Proceedings},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {1993},
timestamp = {Tue, 09 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DellAcquaHILVSYHBDGLLNSZABDPSSSCFGBGMTCKABBEYSHP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/SvenssonY93,
author = {Christer Svensson and
Jiren Yuan},
editor = {Kakayuki Yanagawa and
Peter A. Ivey},
title = {Ultra high speed {CMOS} design},
booktitle = {{VLSI} 93, Proceedings of the {IFIP} {TC10/WG} 10.5 International
Conference on Very Large Scale Integration, Grenoble, France, 7-10
September, 1993},
series = {{IFIP} Transactions},
volume = {{A-42}},
pages = {273--282},
publisher = {North-Holland},
year = {1993},
timestamp = {Thu, 03 Jan 2002 12:11:05 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/SvenssonY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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