Tianming Ni
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2010 – today
- 2019
- [j10]Tianming Ni
, Hao Chang, Yao Yao, Xueyun Li, Zhengfeng Huang:
A Novel Built-In Self-Repair Scheme for 3D Memory. IEEE Access 7: 65052-65059 (2019) - [j9]Tianming Ni
, Hao Chang, Shidong Zhu, Lin Lu, Xueyun Li, Qi Xu, Huaguo Liang, Zhengfeng Huang:
Temperature-Aware Floorplanning for Fixed-Outline 3D ICs. IEEE Access 7: 139787-139794 (2019) - [j8]Tianming Ni, Hao Chang, Xian Sun, Xia Xiuzhen, Zhengfeng Huang:
An enhanced time-to-digital conversion solution for pre-bond TSV dual faults testing. IEICE Electronic Express 16(3): 20181105 (2019) - [j7]Maoxiang Yi
, Jingchang Bian
, Tianming Ni, Cuiyun Jiang, Hao Chang
, Huaguo Liang:
A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 38(4): 755-766 (2019) - 2018
- [j6]Tianming Ni, Hao Chang, Xiaoqiang Zhang, Hao Xiao, Zhengfeng Huang:
Research on physical unclonable functions circuit based on three dimensional integrated circuit. IEICE Electronic Express 15(23): 20180782 (2018) - [j5]Tianming Ni, Hao Chang, Haochen Qi, Zhengfeng Huang:
A novel in-field TSV repair method for latent faults. IEICE Electronic Express 15(23): 20180873 (2018) - [c3]Xiumin Xu, Huaguo Liang, Kai Zhou, Gaoliang Ma, Zhengfeng Huang, Maoxiang Yi, Tianming Ni, Yingchun Lu:
An All-Digital and Jitter-Quantizing True Random Number Generator in SRAM-Based FPGAs. ATS 2018: 59-62 - [c2]Zhengfeng Huang, Yangyang Zhang, Zian Su, Huaguo Liang, Huijie Yao, Tianming Ni:
A Hybrid DMR Latch to Tolerate MNU Using TDICE and WDICE. ATS 2018: 121-126 - 2017
- [j4]Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi:
A single event transient detector in SRAM-based FPGAs. IEICE Electronic Express 14(12): 20170210 (2017) - [j3]Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xiangsheng Fang, Tianming Ni, Maoxiang Yi:
A highly reliable butterfly PUF in SRAM-based FPGAs. IEICE Electronic Express 14(14): 20170551 (2017) - [j2]Tianming Ni, Mu Nie, Huaguo Liang, Jingchang Bian, Xiumin Xu, Xiangsheng Fang, Zhengfeng Huang, Xiaoqing Wen:
Vernier ring based pre-bond through silicon vias test in 3D ICs. IEICE Electronic Express 14(18): 20170590 (2017) - [j1]Tianming Ni, Huaguo Liang, Mu Nie, Xiumin Xu, Aibin Yan, Zhengfeng Huang:
A Region-Based Through-Silicon via Repair Method for Clustered Faults. IEICE Transactions 100-C(12): 1108-1117 (2017) - 2016
- [c1]Maoxiang Yi, Xiaohong Liu, Qingwu Wu, Tianming Ni, Zhengfeng Huang, Huaguo Liang:
NBTI mitigation by M-IVC with input duty cycle and randomness constraints. EWDTS 2016: 1-5
Coauthor Index

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