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Amr M. S. Tosson

Amr M. S. Tosson Abdelwahed

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2020 – today

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2022
[c9]
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Kangqiang Pan, Amr M. S. Tosson, Ningxuan Wang, Norman Y. Zhou, Lan Wei:
A Novel 2T2R CR-based TCAM Design for High-speed and Energy-efficient Applications. ACM Great Lakes Symposium on VLSI 2022: 33-38
2021
[c8]
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Kangqiang Pan, Amr M. S. Tosson, Norman Y. Zhou, Lan Wei:
A Novel Programmable Variation-Tolerant RRAM-based Delay Element Circuit. NANOARCH 2021: 1-2
[c7]
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An Qi Zhang, Amr M. S. Tosson, Lan Wei:
Error Resilience and Recovery of Process Induced Stuck-at Faults in MLP Neural Networks using Emerging Technology. NANOARCH 2021: 1-6

2010 – 2019

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2017
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Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei:
A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3125-3137 (2017)
[c6]
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Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei:
1T2R: A novel memory cell design to resolve single-event upset in RRAM arrays. ASICON 2017: 12-15
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Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei:
Mitigating the Effect of Reliability Soft-errors of RRAM Devices on the Performance of RRAM-based Neuromorphic Systems. ACM Great Lakes Symposium on VLSI 2017: 53-58
[c4]
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Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei:
Analysis of RRAM Reliability Soft-Errors on the Performance of RRAM-Based Neuromorphic Systems. ISVLSI 2017: 62-67
2016
[c3]
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Amr M. S. Tosson, Mohab H. Anis, Lan Wei:
RRAM Refresh Circuit: A Proposed Solution To Resolve The Soft-Error Failures For HfO₂/Hf 1T1R RRAM Memory Cell. ACM Great Lakes Symposium on VLSI 2016: 227-232
[c2]
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Amr M. S. Tosson Abdelwahed, Adam Neale, Mohab H. Anis, Lan Wei:
8T1R: A Novel Low-power High-speed RRAM-based Non-volatile SRAM Design. ACM Great Lakes Symposium on VLSI 2016: 239-244
2013
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Amr M. S. Tosson, Siddharth Garg, Mohab H. Anis:
Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design. VLSI-SoC 2013: 368-373

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