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- > Home > Persons > Ray C. C. Cheung
Publications
- 2024
[j89]Gaoyu Mao
, Yao Liu, Wangchen Dai, Guangyan Li, Zhewen Zhang, Alan H. F. Lam, Ray C. C. Cheung:
REALISE-IoT: RISC-V-Based Efficient and Lightweight Public-Key System for IoT Applications. IEEE Internet Things J. 11(2): 3044-3055 (2024)- [j88]Muhammad A. A. Abdelgawad, Ray C. C. Cheung, Hong Yan:
Efficient Blind Hyperspectral Unmixing Framework Based on CUR Decomposition (CUR-HU). Remote. Sens. 16(5): 766 (2024) - [j87]Junhao Huang, Alexandre Adomnicai, Jipeng Zhang, Wangchen Dai, Yao Liu, Ray C. C. Cheung, Çetin Kaya Koç, Donglong Chen:
Revisiting Keccak and Dilithium Implementations on ARMv7-M. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 1-24 (2024) - [j86]Zewen Ye, Ruibing Song, Hao Zhang, Donglong Chen, Ray Chak-Chung Cheung, Kejie Huang:
A Highly-efficient Lattice-based Post-Quantum Cryptography Processor for IoT Applications. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 130-153 (2024) - [j85]Zhengyan Liu, Qiang Liu, Shun Yan, Ray C. C. Cheung:
An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning. ACM Trans. Reconfigurable Technol. Syst. 17(1): 15:1-15:20 (2024) - 2023
- [j84]Ming Ni, Yan Han, Ray C. C. Cheung, Xuemeng Zhou:
Design of a Hippocampal Cognitive Prosthesis Chip. IEICE Trans. Electron. 106(7): 417-426 (2023) - [j83]Shuai Yuan, Juepeng Zheng, Lixian Zhang, Runmin Dong, Ray C. C. Cheung, Haohuan Fu:
MUREN: MUltistage Recursive Enhanced Network for Coal-Fired Power Plant Detection. Remote. Sens. 15(8): 2200 (2023) - [j80]Guangyan Li, Donglong Chen, Gaoyu Mao, Wangchen Dai, Abdurrashid Ibrahim Sanka, Ray C. C. Cheung:
Algorithm-Hardware Co-Design of Split-Radix Discrete Galois Transformation for KyberKEM. IEEE Trans. Emerg. Top. Comput. 11(4): 824-838 (2023) - [j79]Gaoyu Mao, Donglong Chen, Guangyan Li, Wangchen Dai, Abdurrashid Ibrahim Sanka, Çetin Kaya Koç, Ray C. C. Cheung:
High-performance and Configurable SW/HW Co-design of Post-quantum Signature CRYSTALS-Dilithium. ACM Trans. Reconfigurable Technol. Syst. 16(3): 44:1-44:28 (2023) - [c78]Shuo Liu, Qiaoling Wang, Junyi Zhang, Wenfei Wu, Qinliang Lin, Yao Liu, Meng Xu, Marco Canini, Ray C. C. Cheung, Jianfei He:
In-Network Aggregation with Transport Transparency for Distributed Training. ASPLOS (3) 2023: 376-391 - [c77]Wing Yin Yu, Lai-Man Po, Ray C. C. Cheung, Yuzhi Zhao, Yu Xue, Kun Li:
Bidirectionally Deformable Motion Modulation For Video-based Human Pose Transfer. ICCV 2023: 7468-7478 - [c76]Jinfa Hong, Hei Wong, Oliver C. S. Choy, Ray C. C. Cheung:
A Platform for Adaptive Interference Mitigation and Intent Analysis Using OpenLANE. ICSPCC 2023: 1-6 - [c75]Yihao Liu, Patrick Hung, Ehsan Nekouei, Ray C. C. Cheung:
Homomorphic Encryption-Based System Design for Secure Data Processing. ICSPCC 2023: 1-6 - [c74]Wenqin Luo, Patrick Hung, Shiqi Wang, Ray C. C. Cheung:
Image Super-Resolution and FPGA Hardware Design. ICSPCC 2023: 1-5 - [c73]Shuai Yuan, Juepeng Zheng, Yanlong Huang, Jierui Liu, Haohuan Fu, Ray C. C. Cheung:
CO-Detector: Towards Complex Object Detection with Cross-Part Feature Learning in Remote Sensing. IGARSS 2023: 1941-1944 - [i10]Yao Xin, Guoming Tang, Donglong Chen, Rumin Zhang, Teng Liang, Ray C. C. Cheung, Çetin Kaya Koç:
A Versatility-Performance Balanced Hardware Architecture for Scene Text Detection. CoRR abs/2306.11351 (2023) - [i9]Wing Yin Yu, Lai-Man Po, Ray C. C. Cheung, Yuzhi Zhao, Yu Xue, Kun Li:
Bidirectionally Deformable Motion Modulation For Video-based Human Pose Transfer. CoRR abs/2307.07754 (2023) - [i8]Junhao Huang, Haosong Zhao, Jipeng Zhang, Wangchen Dai, Lu Zhou, Ray C. C. Cheung, Çetin Kaya Koç, Donglong Chen:
Yet another Improvement of Plantard Arithmetic for Faster Kyber on Low-end 32-bit IoT Devices. CoRR abs/2309.00440 (2023) - 2022
- [j78]Muhammad Irfan, Hasan Erdem Yantir, Zahid Ullah, Ray C. C. Cheung:
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs. IEEE Embed. Syst. Lett. 14(2): 63-66 (2022) - [j77]Muhammad Irfan, Abdurrashid Ibrahim Sanka, Zahid Ullah, Ray C. C. Cheung:
Reconfigurable content-addressable memory (CAM) on FPGAs: A tutorial and survey. Future Gener. Comput. Syst. 128: 451-465 (2022) - [j76]Mehdi Hasan Chowdhury, Abdelrahman B. M. Eldaly, Stephen Kugbere Agadagba, Ray C. C. Cheung, Leanne Lai Hang Chan:
Machine Learning Based Hardware Architecture for DOA Measurement From Mice EEG. IEEE Trans. Biomed. Eng. 69(1): 314-324 (2022) - [j75]Yao Xin, Donald Donglong Chen, Chongyang Zeng, Weichen Zhang, Yi Wang, Ray C. C. Cheung:
High Throughput Hardware/Software Heterogeneous System for RRPN-Based Scene Text Detection. IEEE Trans. Computers 71(7): 1507-1521 (2022) - [j74]Zewen Ye, Ray C. C. Cheung, Kejie Huang:
PipeNTT: A Pipelined Number Theoretic Transform Architecture. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4068-4072 (2022) - [j73]Junhao Huang, Jipeng Zhang, Haosong Zhao, Zhe Liu, Ray C. C. Cheung, Çetin Kaya Koç, Donglong Chen:
Improved Plantard Arithmetic for Lattice-based Cryptography. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(4): 614-636 (2022) - [c72]Muhammad A. A. Abdelgawad, Ray C. C. Cheung, Hong Yan:
A High-Performance FPGA Accelerator for CUR Decomposition. FPL 2022: 294-299 - [c71]Wei Zhang, Ray C. C. Cheung, Yun Liang, Hiroki Nakahara:
Message from the General Chair and Program Co-Chairs. FPT 2022: 1 - [c70]Yun Liang, Hiroki Nakahara, Wei Zhang, Fubing Mao, Ray C. C. Cheung:
Preface. FPT 2022: i - [c69]Shuai Yuan, Juepeng Zheng, Lixian Zhang, Runmin Dong, Yile Xing, Yuhan She, Haohuan Fu, Ray C. C. Cheung:
Melting Glacier: A 37-Year (1984-2020) High-Resolution Glacier-Cover Record of MT. Kilimanjaro. IGARSS 2022: 3943-3946 - [c68]Yao Xin, Guoming Tang, Donglong Chen, Rumin Zhang, Teng Liang, Ray C. C. Cheung, Çetin Kaya Koç:
A Versatility-Performance Balanced Hardware Architecture for Scene Text Detection. SmartWorld/UIC/ScalCom/DigitalTwin/PriComp/Meta 2022: 540-549 - [i7]Junhao Huang, Jipeng Zhang, Haosong Zhao, Zhe Liu, Ray C. C. Cheung, Çetin Kaya Koç, Donglong Chen:
Improved Plantard Arithmetic for Lattice-based Cryptography. IACR Cryptol. ePrint Arch. 2022: 956 (2022) - 2021
- [j72]Abdurrashid Ibrahim Sanka, Mehdi Hasan Chowdhury, Ray C. C. Cheung:
Efficient High-Performance FPGA-Redis Hybrid NoSQL Caching System for Blockchain Scalability. Comput. Commun. 169: 81-91 (2021) - [j71]Abdurrashid Ibrahim Sanka, Muhammad Irfan, Ian Huang, Ray C. C. Cheung:
A survey of breakthrough in blockchain technology: Adoptions, applications, challenges and future research. Comput. Commun. 169: 179-201 (2021) - [j70]Muhammad Irfan, Zahid Ullah, Abdurrashid Ibrahim Sanka, Ray C. C. Cheung:
Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory. IEEE Embed. Syst. Lett. 13(2): 37-40 (2021) - [j69]Abdurrashid Ibrahim Sanka, Ray C. C. Cheung:
A systematic review of blockchain scalability: Issues, solutions, analysis and future research. J. Netw. Comput. Appl. 195: 103232 (2021) - [j68]Yao Liu, Junyi Zhang, Shuo Liu, Qiaoling Wang, Wangchen Dai, Ray Chak-Chung Cheung:
Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4194-4206 (2021) - [j67]Hu Zhu, Chunfeng Cui, Lizhen Deng, Ray C. C. Cheung, Hong Yan:
Elastic Net Constraint-Based Tensor Model for High-Order Graph Matching. IEEE Trans. Cybern. 51(8): 4062-4074 (2021) - [j66]Wei-pei Huang, Ray C. C. Cheung, Hong Yan:
An Efficient Parallel Processor for Dense Tensor Computation. IEEE Trans. Very Large Scale Integr. Syst. 29(7): 1335-1347 (2021) - [c67]Muhammad Irfan, Kizheppatt Vipin, Ray C. C. Cheung:
On the Suitability of Read only Memory for FPGA-Based CAM Emulation Using Partial Reconfiguration. ARC 2021: 305-314 - [c66]Shun Yan, Zhengyan Liu, Yun Wang, Chenglong Zeng, Qiang Liu, Bowen Cheng, Ray C. C. Cheung:
An FPGA-based MobileNet Accelerator Considering Network Structure Characteristics. FPL 2021: 17-23 - [c65]Cheng Liang, Rong Ou, Bairun Lin, Xiaoqiang Ji, Ray C. C. Cheung, Huihuan Qian:
Design of a Battery Carrying Barge for Enhancing Autonomous Sailboat's Endurance Capacity. RCAR 2021: 1438-1443 - [c64]John Y. Q. Zhang, Ben L. Yeung, Joe C. Y. Wong, Ray C. C. Cheung, Alan H. F. Lam:
LoRaWAN-based Camera with (CIRA) Compression and Image Recovery Algorithm. WF-IoT 2021: 136-141 - [c63]Henry C. K. Tang, Tiger Y. S. Cheng, Joe C. Y. Wong, Ray C. C. Cheung, Alan H. F. Lam:
Aero-Hydroponic Agriculture IoT System. WF-IoT 2021: 741-746 - 2020
- [j65]Zhe Xu, Ray C. C. Cheung:
Binary convolutional neural network acceleration framework for rapid system prototyping. J. Syst. Archit. 109: 101762 (2020) - [j64]Jingwei Hu, Yao Liu, Ray C. C. Cheung, Shivam Bhasin, San Ling, Huaxiong Wang:
Compact Code-Based Signature for Reconfigurable Devices With Side Channel Resilience. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(7): 2305-2316 (2020) - [j63]Muhammad Irfan, Zahid Ullah, Mehdi Hasan Chowdhury, Ray C. C. Cheung:
RPE-TCAM: Reconfigurable Power-Efficient Ternary Content-Addressable Memory on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1925-1929 (2020) - [c62]Junjie Liu, Zhe Xu, Runbin Shi, Ray C. C. Cheung, Hayden Kwok-Hay So:
Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers. ICLR 2020 - [i6]Junjie Liu, Zhe Xu, Runbin Shi, Ray C. C. Cheung, Hayden Kwok-Hay So:
Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers. CoRR abs/2005.06870 (2020) - [i5]Shuo Liu, Qiaoling Wang, Junyi Zhang, Qinliang Lin, Yao Liu, Meng Xu, Ray C. C. Cheung, Jianfei He:
NetReduce: RDMA-Compatible In-Network Reduction for Distributed DNN Training Acceleration. CoRR abs/2009.09736 (2020) - 2019
- [j62]Muhammad Irfan, Zahid Ullah, Ray C. C. Cheung:
D-TCAM: A High-Performance Distributed RAM Based TCAM Architecture on FPGAs. IEEE Access 7: 96060-96069 (2019) - [j61]Wei-pei Huang, Bowen P. Y. Kwan, Weiyang Ding, Biao Min, Ray C. C. Cheung, Liqun Qi, Hong Yan:
High performance hardware architecture for singular spectrum analysis of Hankel tensors. Microprocess. Microsystems 64: 120-127 (2019) - [j60]Biao Min, Wei-pei Huang, Ray C. C. Cheung, Hong Yan:
A high performance hardware architecture for non-negative tensor factorization. Microelectron. J. 85: 25-33 (2019) - [j59]Zhe Xu, Biao Min, Ray C. C. Cheung:
A robust background initialization algorithm with superpixel motion detection. Signal Process. Image Commun. 71: 1-12 (2019) - [j58]Hulin Kuang, Long Chen, Leanne Lai Hang Chan, Ray C. C. Cheung, Hong Yan:
Feature Selection Based on Tensor Decomposition and Object Proposal for Night-Time Multiclass Vehicle Detection. IEEE Trans. Syst. Man Cybern. Syst. 49(1): 71-80 (2019) - [c60]Wei-pei Huang, Ray C. C. Cheung, Hong Yan:
An Efficient Application Specific Instruction Set Processor (ASIP) for Tensor Computation. ASAP 2019: 37 - [c59]Muhammad Irfan, Ray C. C. Cheung, Zahid Ullah:
Bank-selective Strategy for Gate-based Ternary Content-addressable Memory on FPGAs. ASAP 2019: 288-291 - [c58]Zhe Xu, Ray C. C. Cheung:
Accurate and Compact Convolutional Neural Networks with Trained Binarization. BMVC 2019: 19 - [c57]Jingwei Hu, Wen Wang, Ray C. C. Cheung, Huaxiong Wang:
Optimized Polynomial Multiplier Over Commutative Rings on FPGAs: A Case Study on BIKE. FPT 2019: 231-234 - [c56]Zhenya Zang, Yao Liu, Ray C. C. Cheung:
Reconfigurable RISC-V Secure Processor And SoC Integration. ICIT 2019: 827-832 - [c55]Muhammad Irfan, Zahid Ullah, Ray C. C. Cheung:
High Performance Power-Efficient Gate-Based CAM for Reconfigurable Computing. MSN 2019: 327-331 - [i4]Zhe Xu, Ray C. C. Cheung:
Accurate and Compact Convolutional Neural Networks with Trained Binarization. CoRR abs/1909.11366 (2019) - 2018
- [j56]Wangchen Dai, Ray C. C. Cheung:
Spectral arithmetic in Montgomery modular multiplication. J. Cryptogr. Eng. 8(3): 211-226 (2018) - [j55]Zhitong Qiao, Yan Han, Xiaoxia Han, Han Xu, Will X. Y. Li, Dong Song, Theodore W. Berger, Ray C. C. Cheung:
ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis. Neural Comput. 30(9) (2018) - [j54]Zhe Xu, Biao Min, Ray C. C. Cheung:
A fast inter CU decision algorithm for HEVC. Signal Process. Image Commun. 60: 211-223 (2018) - [j53]Wangchen Dai, Donald Donglong Chen, Ray C. C. Cheung, Çetin Kaya Koç:
FFT-Based McLaughlin's Montgomery Exponentiation without Conditional Selections. IEEE Trans. Computers 67(9): 1301-1314 (2018) - [j52]Yao Liu, Xiao-Zhou Li, Ray C. C. Cheung, Sze-Chun Chan, Hei Wong:
High-Speed Discrete Gaussian Sampler With Heterodyne Chaotic Laser Inputs. IEEE Trans. Circuits Syst. II Express Briefs 65-II(6): 794-798 (2018) - [c54]Yao Liu, Ray C. C. Cheung, Hei Wong:
Lightweight Secure Processor Prototype on FPGA. FPL 2018: 443-444 - [i3]Zhe Xu, Biao Min, Ray C. C. Cheung:
A Robust Background Initialization Algorithm with Superpixel Motion Detection. CoRR abs/1805.06737 (2018) - 2017
- [j51]Qian Zhou, Yan Han, Shifeng Zhang, Xiaoxia Han, Lu Jie, Ray C. C. Cheung, Guangtao Feng:
A low power V-band LC VCO with high Q varactor technique in 40 nm CMOS process. Sci. China Inf. Sci. 60(8): 89401 (2017) - [j50]Wangchen Dai, Donald Donglong Chen, Ray C. C. Cheung, Çetin Kaya Koç:
Area-Time Efficient Architecture of FFT-Based Montgomery Multiplication. IEEE Trans. Computers 66(3): 375-388 (2017) - [j49]Jingwei Hu, Ray C. C. Cheung:
Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware. IEEE Trans. Computers 66(8): 1313-1325 (2017) - [j48]Yao Liu, Ray C. C. Cheung, Hei Wong:
A Bias-Bounded Digital True Random Number Generator Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1): 133-144 (2017) - [j47]Jingwei Hu, Ray C. C. Cheung:
Toward Practical Code-Based Signature: Implementing Fast and Compact QC-LDGM Signature Scheme on Embedded Hardware. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(8): 2086-2097 (2017) - [j46]Jingwei Hu, Ray C. C. Cheung, Tim Güneysu:
Compact Constant Weight Coding Engines for the Code-Based Cryptography. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1092-1096 (2017) - [j45]Biao Min, Zhe Xu, Ray C. C. Cheung:
A Fully Pipelined Hardware Architecture for Intra Prediction of HEVC. IEEE Trans. Circuits Syst. Video Technol. 27(12): 2702-2713 (2017) - [c53]Yaya Chen, Yan Han, Shifeng Zhang, Tianlin Cao, Xiaoxia Han, Ray C. C. Cheung:
High DC gain and wide output swing class-C inverter. ISOCC 2017: 53-54 - [c52]Biao Min, Zhe Xu, Ray C. C. Cheung:
Fast HEVC intra coding decision based on statistical cost and corner detection. IWSSIP 2017: 1-5 - 2016
- [j44]Zhaorui Zhang, Yao Xin, Benben Liu, Will X. Y. Li, Kit-Hang Lee, Chun-Fai Ng, Danail Stoyanov, Ray C. C. Cheung, Ka-Wai Kwok:
FPGA-Based High-Performance Collision Detection: An Enabling Technique for Image-Guided Robotic Surgery. Frontiers Robotics AI 3: 51 (2016) - [j43]Will X. Y. Li, Ray C. C. Cheung, Yao Xin, Dong Song, Theodore W. Berger:
An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis. J. Circuits Syst. Comput. 25(1): 1640004:1-1640004:21 (2016) - [j42]Donald Donglong Chen, Gavin Xiaoxu Yao, Ray C. C. Cheung, Derek Chi-Wai Pao, Çetin Kaya Koç:
Parameter Space for the Architecture of FFT-Based Montgomery Modular Multiplication. IEEE Trans. Computers 65(1): 147-160 (2016) - 2015
- [j41]Haihua Gu, Dawu Gu, WenLu Xie, Ray C. C. Cheung:
Efficient Pairing Computation on Huff Curves. Cryptologia 39(3): 270-275 (2015) - [j40]Chao Wang, Xi Li, Junneng Zhang, Peng Chen, Yunji Chen, Xuehai Zhou, Ray C. C. Cheung:
Architecture Support for Task Out-of-Order Execution in MPSoCs. IEEE Trans. Computers 64(5): 1296-1310 (2015) - [j39]Donald Donglong Chen, Nele Mentens, Frederik Vercauteren, Sujoy Sinha Roy, Ray C. C. Cheung, Derek Chi-Wai Pao, Ingrid Verbauwhede:
High-Speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 157-166 (2015) - [j38]Jingwei Hu, Wei Guo, Jizeng Wei, Ray C. C. Cheung:
Fast and Generic Inversion Architectures Over GF(2m) Using Modified Itoh-Tsujii Algorithms. IEEE Trans. Circuits Syst. II Express Briefs 62-II(4): 367-371 (2015) - [j37]Manish Kumar Jaiswal, B. Sharat Chandra Varma, Hayden Kwok-Hay So, M. Balakrishnan, Kolin Paul, Ray C. C. Cheung:
Configurable Architectures for Multi-Mode Floating Point Adders. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 2079-2090 (2015) - [j36]Yao Xin, Will X. Y. Li, Zhaorui Zhang, Ray C. C. Cheung, Dong Song, Theodore W. Berger:
An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics. IEEE ACM Trans. Comput. Biol. Bioinform. 12(5): 1034-1047 (2015) - [j35]Biao Min, Ray C. C. Cheung:
A Fast CU Size Decision Algorithm for the HEVC Intra Encoder. IEEE Trans. Circuits Syst. Video Technol. 25(5): 892-896 (2015) - [j34]Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung:
Z-TCAM: An SRAM-based Architecture for TCAM. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 402-406 (2015) - 2014
- [j33]Xiaopeng Liu, Yan Han, Xiaoxia Han, Hao Luo, Ray C. C. Cheung, Tianlin Cao:
A low-power inverter-based ΣΔ analog-to-digital converter for audio applications. Sci. China Inf. Sci. 57(4): 1-10 (2014) - [j32]Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung:
E-TCAM: An Efficient SRAM-Based Architecture for TCAM. Circuits Syst. Signal Process. 33(10): 3123-3144 (2014) - [j31]Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul:
Series Expansion based Efficient Architectures for Double Precision Floating Point Division. Circuits Syst. Signal Process. 33(11): 3499-3526 (2014) - [j30]Dongdong Zhong, Yan Han, Jun Sun, Qian Zhou, Ray C. C. Cheung, Wenquan Sui:
A perfectly current matched charge pump with wide dynamic range for ultra low voltage applications. IEICE Electron. Express 11(23): 20140993 (2014) - [j29]Benben Liu, Yao Xin, Ray C. C. Cheung, Hong Yan:
GPU-based biclustering for microarray data analysis in neurocomputing. Neurocomputing 134: 239-246 (2014) - [j28]Yao Xin, Will X. Y. Li, Ray C. C. Cheung, Rosa H. M. Chan, Hong Yan, Dong Song, Theodore W. Berger:
An FPGA based scalable architecture of a stochastic state point process filter (SSPPF) to track the nonlinear dynamics underlying neural spiking. Microelectron. J. 45(6): 690-701 (2014) - [j27]Gavin Xiaoxu Yao, Junfeng Fan, Ray C. C. Cheung, Ingrid Verbauwhede:
Novel RNS Parameter Selection for Fast Modular Multiplication. IEEE Trans. Computers 63(8): 2099-2105 (2014) - [j26]Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul:
Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 521-525 (2014) - [j25]Benben Liu, Chi Wai Yu, Doris Z. Wang, Ray C. C. Cheung, Hong Yan:
Design Exploration of Geometric Biclustering for Microarray Data Analysis in Data Mining. IEEE Trans. Parallel Distributed Syst. 25(10): 2540-2550 (2014) - [c51]Will X. Y. Li, Yao Xin, Rosa H. M. Chan, Dong Song, Theodore W. Berger, Ray C. C. Cheung:
Laguerre-volterra model and architecture for MIMO system identification and output prediction. EMBC 2014: 4539-4542 - [c50]Chao Wang, Xi Li, Xuehai Zhou, Yunji Chen, Ray C. C. Cheung:
Big data genome sequencing on Zynq based clusters (abstract only). FPGA 2014: 247 - [c48]Marc Stöttinger, Gavin Xiaoxu Yao, Ray C. C. Cheung:
Zero collision attack and its countermeasures on Residue Number System multipliers. ISIC 2014: 30-33 - [c47]Wangchen Dai, Huapeng Wu, Ray C. C. Cheung:
Time-efficient computation of digit serial Montgomery multiplication. ISIC 2014: 212-215 - [c46]Will X. Y. Li, Yao Xin, Dong Song, Theodore W. Berger, Ray C. C. Cheung:
VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel. ISIC 2014: 272-275 - [c45]Peng Chen, Chao Wang, Xi Li, Xuehai Zhou, Aili Wang, Ray C. C. Cheung:
Trade-offs between the sensitivity and the speed of the FPGA-based sequence aligner. ISIC 2014: 280-283 - [c44]Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul:
Configurable Architecture for Double/Two-Parallel Single Precision Floating Point Division. ISVLSI 2014: 332-337 - [i2]Donald Donglong Chen, Nele Mentens, Frederik Vercauteren, Sujoy Sinha Roy, Ray C. C. Cheung, Derek Chi-Wai Pao, Ingrid Verbauwhede:
High-speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems. IACR Cryptol. ePrint Arch. 2014: 646 (2014) - 2013
- [j24]Hongbing Fan, Yu-Liang Wu, Ray C. C. Cheung:
Design Automation Framework for Reconfigurable Interconnection Networks. Comput. J. 56(2): 258-269 (2013) - [j23]Derek Chi-Wai Pao, Nga Lam Or, Ray C. C. Cheung:
A memory-based NFA regular expression match engine for signature-based intrusion detection. Comput. Commun. 36(10-11): 1255-1267 (2013) - [j22]Manish Kumar Jaiswal, Ray C. C. Cheung:
VLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique. Circuits Syst. Signal Process. 32(1): 15-27 (2013) - [j21]Jingwei Hu, Wei Guo, Jizeng Wei, Ray C. C. Cheung:
A scalable RNS Montgomery multiplier over F2m. IEICE Electron. Express 10(23): 20130704 (2013) - [j20]Hao Luo, Yan Han, Ray C. C. Cheung, Tianlin Cao, Xiaopeng Liu, Feng Gao:
A σδ modulator using gain-Boost Class-C Inverter for Audio Applications. J. Circuits Syst. Comput. 22(10) (2013) - [j19]Hao Luo, Yan Han, Ray C. C. Cheung, Xiaopeng Liu, Tianlin Cao:
A 0.8-V 230-µW 98-dB DR Inverter-Based ΣΔ Modulator for Audio Applications. IEEE J. Solid State Circuits 48(10): 2430-2441 (2013) - [j18]Manish Kumar Jaiswal, Ray C. C. Cheung:
Area-efficient architectures for double precision multiplier on FPGA, with run-time-reconfigurable dual single precision support. Microelectron. J. 44(5): 421-430 (2013) - [j17]Yao Xin, Benben Liu, Biao Min, Will X. Y. Li, Ray C. C. Cheung, Anthony S. Fong, Ting-Fung Chan:
Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform. Microelectron. J. 44(8): 670-682 (2013) - [j15]Will X. Y. Li, Ray C. C. Cheung, Rosa H. M. Chan, Dong Song, Theodore W. Berger:
Real-Time Prediction of Neuronal Population Spiking Activity Using FPGA. IEEE Trans. Biomed. Circuits Syst. 7(4): 489-498 (2013) - [j14]Biao Min, Ray C. C. Cheung, Hong Yan:
A Flexible and Customizable Architecture for the Relaxation Labeling Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 60-II(2): 106-110 (2013) - [c43]Yao Xin, Will X. Y. Li, Biao Min, Yan Han, Ray C. C. Cheung:
A customizable Stochastic State Point Process Filter (SSPPF) for neural spiking activity. EMBC 2013: 4993-4996 - [c42]Jiliang Zhang, Yaping Lin, Yongqiang Lu, Ray C. C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian:
Binding Hardware IPs to Specific FPGA Device via Inter-twining the PUF Response with the FSM of Sequential Circuits. FCCM 2013: 227 - [c41]Chao Wang, Xi Li, Xuehai Zhou, Jim Martin, Ray C. C. Cheung:
Genome sequencing using mapreduce on FPGA with multiple hardware accelerators (abstract only). FPGA 2013: 266 - [c40]Zahid Ullah, Manish Kumar Jaiswal, Ray C. C. Cheung:
Design space explorations of Hybrid-Partitioned TCAM (HP-TCAM). FPL 2013: 1-4 - [c39]Jiliang Zhang, Yaping Lin, Yongqiang Lyu, Gang Qu, Ray C. C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian:
FPGA IP protection by binding Finite State Machine to Physical Unclonable Function. FPL 2013: 1-4 - [c38]Will X. Y. Li, Shridhar Chaudhary, Ray C. C. Cheung, Takeshi Matsumoto, Masahiro Fujita:
Fast simulation of Digital Spiking Silicon Neuron model employing reconfigurable dataflow computing. FPT 2013: 478-479 - [c37]Nancy Yu Song, Jerome Nicon, Biao Min, Ray C. C. Cheung, M. Ashraful Amin, Hong Yan:
Noise filtering and occurrence identification of mouse ultrasonic vocalization call. ICMLC 2013: 1218-1223 - [c36]Will X. Y. Li, Ray C. C. Cheung, Rosa H. M. Chan, Dong Song, Theodore W. Berger:
A reconfigurable architecture for real-time prediction of neural activity. ISCAS 2013: 1869-1872 - 2012
- [j13]Hao Luo, Yan Han, Ray C. C. Cheung, Guo Liang, Dazhong Zhu:
Subthreshold CMOS voltage reference circuit with body bias compensation for process variation. IET Circuits Devices Syst. 6(3): 198-203 (2012) - [j12]Zhiguan Wang, Chi Wai Yu, Ray C. C. Cheung, Hong Yan:
Hypergraph based geometric biclustering algorithm. Pattern Recognit. Lett. 33(12): 1656-1665 (2012) - [c35]Manish Kumar Jaiswal, Ray C. C. Cheung:
High Performance Reconfigurable Architecture for Double Precision Floating Point Division. ARC 2012: 302-313 - [c34]Will X. Y. Li, Rosa H. M. Chan, Dong Song, Theodore W. Berger, Ray C. C. Cheung:
A dual mode FPGA design for the hippocampal prosthesis. EMBC 2012: 4579-4582 - [c33]Manish Kumar Jaiswal, Ray C. C. Cheung:
Area-Efficient Architectures for Large Integer and Quadruple Precision Floating Point Multipliers. FCCM 2012: 25-28 - [c32]Donald Donglong Chen, Gavin Xiaoxu Yao, Çetin Kaya Koç, Ray C. C. Cheung:
Low complexity and hardware-friendly spectral modular multiplication. FPT 2012: 368-375 - [c31]Alan W. Y. Lo, Benben Liu, Ray C. C. Cheung:
GPU-Based Biclustering for Neural Information Processing. ICONIP (5) 2012: 134-141 - [c30]Manish Kumar Jaiswal, Ray C. C. Cheung:
Area-Efficient FPGA Implementation of Quadruple Precision Floating Point Multiplier. IPDPS Workshops 2012: 376-382 - [c29]Zahid Ullah, Manish Kumar Jaiswal, Y. C. Chan, Ray C. C. Cheung:
FPGA Implementation of SRAM-based Ternary Content Addressable Memory. IPDPS Workshops 2012: 383-389 - [c28]Pengfei Zhu, Chun Zhang, Hua Li, Ray C. C. Cheung, Bryan Hu:
An FPGA-based acceleration platform for auction algorithm. ISCAS 2012: 1002-1005 - [c27]Gavin Xiaoxu Yao, Junfeng Fan, Ray C. C. Cheung, Ingrid Verbauwhede:
Faster Pairing Coprocessor Architecture. Pairing 2012: 160-176 - [e1]Oliver C. S. Choy, Ray C. C. Cheung, Peter M. Athanas, Kentaro Sano:
Reconfigurable Computing: Architectures, Tools and Applications - 8th International Symposium, ARC 2012, Hong Kong, China, March 19-23, 2012. Proceedings. Lecture Notes in Computer Science 7199, Springer 2012, ISBN 978-3-642-28364-2 [contents] - 2011
- [j11]Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, Ray C. C. Cheung, Dong Song, Theodore W. Berger:
High-Performance and Scalable System Architecture for the Real-Time Estimation of Generalized Laguerre-Volterra MIMO Model From Neural Population Spiking Activity. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(4): 489-501 (2011) - [c26]Ray C. C. Cheung, Sylvain Duquesne, Junfeng Fan, Nicolas Guillermin, Ingrid Verbauwhede, Gavin Xiaoxu Yao:
FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction. CHES 2011: 421-441 - [c25]Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, Ray C. C. Cheung, Dong Song, Theodore W. Berger:
A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities. EMBC 2011: 7282-7285 - [c24]Will X. Y. Li, Ray C. C. Cheung, Wei Zhang, Rosa H. M. Chan, Dong Song, Theodore W. Berger:
FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Spiking Activities. FCCM 2011: 254 - [c23]Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, C. W. Yu, Ray C. C. Cheung, Dong Song, Theodore W. Berger:
FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities. FPL 2011: 44-49 - [c22]Chi Wai Yu, Fred Cox, Wayne Luk, Ray C. C. Cheung:
Hydrate: Hybrid Reconfigurable Architecture Expressions. FPT 2011: 1-4 - [c21]Jakub Szefer, Wei Zhang, Yu-Yuan Chen, David Champagne, King Chan, Will X. Y. Li, Ray C. C. Cheung, Ruby B. Lee:
Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform. International Symposium on Rapid System Prototyping 2011: 38-44 - [i1]Gavin Xiaoxu Yao, Junfeng Fan, Ray C. C. Cheung, Ingrid Verbauwhede:
A High Speed Pairing Coprocessor Using RNS and Lazy Reduction. IACR Cryptol. ePrint Arch. 2011: 258 (2011) - 2010
- [c20]Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung:
Design Automation for Reconfigurable Interconnection Networks. ARC 2010: 244-256 - [c19]Gavin Xiaoxu Yao, Ray C. C. Cheung, Çetin Kaya Koç, Kim-Fung Man:
Reconfigurable Number Theoretic Transform architectures for cryptographic applications. FPT 2010: 308-311 - [c18]Gavin Xiaoxu Yao, Ray C. C. Cheung, Kim-Fung Man:
Counter Embedded Memory architecture for trusted computing platform. International Symposium on Rapid System Prototyping 2010: 1-7 - 2009
- [j10]Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor:
Hierarchical Segmentation for Hardware Function Evaluation. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 103-116 (2009) - [c17]Ray C. C. Cheung, Çetin Kaya Koç, John D. Villasenor:
A High-Performance Hardware Architecture for Spectral Hash Algorithm. ASAP 2009: 215-218 - 2008
- [j9]Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor:
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations. IEEE Trans. Computers 57(5): 686-701 (2008) - 2007
- [j8]Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung:
The exact channel density and compound design for generic universal switch blocks. ACM Trans. Design Autom. Electr. Syst. 12(2): 19 (2007) - [j7]Dong-U Lee, Ray C. C. Cheung, John D. Villasenor:
A Flexible Architecture for Precise Gamma Correction. IEEE Trans. Very Large Scale Integr. Syst. 15(4): 474-478 (2007) - [j6]Ray C. C. Cheung, Dong-U Lee, Wayne Luk, John D. Villasenor:
Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 952-962 (2007) - [c16]William George Osborne, Ray C. C. Cheung, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer:
Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. FPL 2007: 617-620 - [c15]William George Osborne, José Gabriel F. Coutinho, Ray C. C. Cheung, Wayne Luk, Oskar Mencer:
Instrumented Multi-Stage Word-Length Optimization. FPT 2007: 89-96 - 2006
- [j5]Hongbing Fan, Yu-Liang Wu, Ray Chak-Chung Cheung, Jiping Liu:
Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes. IEEE Trans. Computers 55(4): 373-384 (2006) - [j4]Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides:
Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 1990-2000 (2006) - [c14]Dong-U Lee, Ray C. C. Cheung, John D. Villasenor, Wayne Luk:
Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation. FPT 2006: 33-40 - 2005
- [j3]Ray C. C. Cheung, N. J. Telle, Wayne Luk, Peter Y. K. Cheung:
Customizable elliptic curve cryptosystems. IEEE Trans. Very Large Scale Integr. Syst. 13(9): 1048-1059 (2005) - [c13]Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung:
Automating custom-precision function evaluation for embedded processors. CASES 2005: 22-31 - [c12]Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung:
Reconfigurable Elliptic Curve Cryptosystems on a Chip. DATE 2005: 24-29 - [c11]Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee, John D. Villasenor, Ray C. C. Cheung, Wayne Luk:
Ziggurat-based Hardware Gaussian Random Number Generator. FPL 2005: 275-280 - [c10]Guanglie Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk:
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222 - 2004
- [c9]Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung, Jiping Liu:
On Optimal Irregular Switch Box Designs. FPL 2004: 189-199 - [c7]Ray C. C. Cheung, Ashley Brown, Wayne Luk, Peter Y. K. Cheung:
A scalable hardware architecture for prime number validation. FPT 2004: 177-184 - [c6]Nicolas Telle, Wayne Luk, Ray C. C. Cheung:
Customising Hardware Designs for Elliptic Curve Cryptography. SAMOS 2004: 274-283 - 2003
- [j2]Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung:
On optimal hyperuniversal and rearrangeable switch box designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(12): 1637-1649 (2003) - [j1]Yu-Liang Wu, Chak-Chung Cheung, David Ihsin Cheng, Hongbing Fan:
Further improve circuit partitioning using GBAW logic perturbation techniques. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 451-460 (2003) - [c5]Ray C. C. Cheung, Kong-Pang Pun, Steve C. L. Yuen, Kuen Hung Tsoi, Philip Heng Wai Leong:
An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC. FPT 2003: 110-117 - 2002
- [c4]Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung:
On Optimum Designs of Universal Switch Blocks. FPL 2002: 142-151 - 2001
- [c3]Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung:
On Optimum Switch Box Designs for 2-D FPGAs. DAC 2001: 203-208 - [c2]Chak-Chung Cheung, Yu-Liang Wu, David Ihsin Cheng:
Further improve circuit partitioning using GBAW logic perturbation techniques. DATE 2001: 233-239 - 2000
- [c1]Yu-Liang Wu, Chin Ngai Sze, Chak-Chung Cheung, Hongbing Fan:
On improved graph-based alternative wiring scheme for multi-level logic optimization. ICECS 2000: 654-657
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