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Volkan Kursun
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Publications
- 2020
- [j41]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun:
Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(7): 2431-2441 (2020) - 2019
- [j40]Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber:
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 253-280 (2019) - [c71]Jiachen Jiang, Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun:
Carbon-Based Three-Dimensional SRAM Cell with Minimum Inter-Layer Area Skew Considering Process imperfections. ASICON 2019: 1-4 - [c70]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun:
Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes. ICEIC 2019: 1-2 - 2017
- [j38]Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun:
Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic. Microelectron. J. 62: 12-20 (2017) - [c68]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun:
Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors. ASICON 2017: 908-911 - 2016
- [j37]Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode. Integr. 53: 68-79 (2016) - [j36]Shairfe Muhammad Salahuddin, Volkan Kursun:
Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability. J. Circuits Syst. Comput. 25(1): 1640009:1-1640009:19 (2016) - [j35]Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Low power and robust memory circuits with asymmetrical ground gating. Microelectron. J. 48: 109-119 (2016) - [c67]Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode. IOLTS 2016: 39-42 - 2015
- [j34]Yanan Sun, Hailong Jiao, Volkan Kursun:
A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1729-1739 (2015) - [c66]Yanan Sun, Volkan Kursun:
Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed. ISCAS 2015: 2720-2723 - 2014
- [j33]Hailong Jiao, Volkan Kursun:
Mode transition timing and energy overhead analysis in noise-aware MTCMOS circuits. Microelectron. J. 45(8): 1125-1131 (2014) - [j32]Yanan Sun, Volkan Kursun:
Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 420-428 (2014) - [c64]Yanan Sun, Hailong Jiao, Volkan Kursun:
Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins. ICM 2014: 164-167 - [c61]Shairfe Muhammad Salahuddin, Volkan Kursun:
High-speed and low-leakage FinFET SRAM cell with enhanced read and write voltage margins. ISIC 2014: 312-315 - 2013
- [j29]Hailong Jiao, Volkan Kursun:
Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 533-545 (2013) - [c60]Shairfe Muhammad Salahuddin, Volkan Kursun:
Underlap engineered eight-transistor SRAM cell for stronger data stability enhanced write ability and suppressed leakage power consumption. ICECS 2013: 25-28 - [c59]Yanan Sun, Volkan Kursun:
Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors. ISCAS 2013: 2119-2122 - [c58]Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun:
Low-leakage hybrid FinFET SRAM cell with asymmetrical gate overlap / underlap bitline access transistors for enhanced read data stability. ISCAS 2013: 2331-2334 - [c56]Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun:
A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability. ISQED 2013: 353-358 - [c54]Hailong Jiao, Volkan Kursun:
Ground gated 8T SRAM cells with enhanced read and hold data stability. ISVLSI 2013: 52-57 - [c52]Hailong Jiao, Volkan Kursun:
Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits. VLSI-SoC 2013: 150-155 - 2012
- [j28]Hailong Jiao, Volkan Kursun:
Threshold Voltage Tuning for Faster Activation With Lower Noise in Tri-Mode MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 20(4): 741-745 (2012) - [c51]Hailong Jiao, Volkan Kursun:
Full-custom design of low leakage data preserving ground gated 6T SRAM cells to facilitate single-ended write operations. ISCAS 2012: 484-487 - [c50]Yanan Sun, Volkan Kursun:
NP dynamic CMOS resurrection with carbon nanotube field effect transistors. ISOCC 2012: 13-16 - [c49]Hailong Jiao, Volkan Kursun:
Multi-phase sleep signal modulation for mode transition noise mitigation in MTCMOS circuits. ISOCC 2012: 466-469 - 2011
- [j27]Hailong Jiao, Volkan Kursun:
Noise-Aware Data Preserving Sequential MTCMOS Circuits with Dynamic Forward Body Bias. J. Circuits Syst. Comput. 20(1): 125-145 (2011) - [j25]Hailong Jiao, Volkan Kursun:
Ground Bouncing Noise Suppression Techniques for Data Preserving Sequential MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 763-773 (2011) - [c48]Yanan Sun, Volkan Kursun:
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. ISCAS 2011: 2513-2516 - [c46]Hailong Jiao, Volkan Kursun:
Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits. SoCC 2011: 365-370 - [c45]Yanan Sun, Volkan Kursun:
Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs. VLSI-SoC 2011: 226-231 - 2010
- [j24]Hailong Jiao, Volkan Kursun:
Low-Leakage and Compact Registers with Easy-Sleep Mode. J. Low Power Electron. 6(2): 263-279 (2010) - [j23]Hailong Jiao, Volkan Kursun:
Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2053-2065 (2010) - [c44]Hailong Jiao, Volkan Kursun:
Smooth awakenings: Reactivation noise suppressed low-leakage and robust MTCMOS flip-flops. ISCAS 2010: 3845-3848 - [c43]Hailong Jiao, Volkan Kursun:
Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits. VLSI-SoC (Selected Papers) 2010: 258-290 - [c42]Hailong Jiao, Volkan Kursun:
Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits. VLSI-SoC 2010: 347-351 - 2005
- [j6]Volkan Kursun, Vivek De, Eby G. Friedman, Siva G. Narendra:
Monolithic voltage conversion in low-voltage CMOS technologies. Microelectron. J. 36(9): 863-867 (2005) - [c10]Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra:
Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) 2005: 464-467 - 2004
- [j5]Volkan Kursun, Siva G. Narendra, Vivek K. De, Eby G. Friedman:
Low-voltage-swing monolithic dc-dc conversion. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 241-248 (2004) - [j4]Volkan Kursun, Eby G. Friedman:
Sleep switch dual threshold Voltage domino logic with reduced standby leakage current. IEEE Trans. Very Large Scale Integr. Syst. 12(5): 485-496 (2004) - [c8]Volkan Kursun, Eby G. Friedman:
Energy efficient dual threshold voltage dynamic circuits employing sleep switches to minimize subthreshold leakage. ISCAS (2) 2004: 417-420 - [c7]Volkan Kursun, Eby G. Friedman:
Forward body biased keeper for enhanced noise immunity in domino logic circuits. ISCAS (2) 2004: 917-920 - [c6]Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De:
Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED 2004: 263-268 - [c5]Volkan Kursun, Eby G. Friedman:
Node Voltage Dependent Subthreshold Leakage Current Characteristics of Dynamic Circuits. ISQED 2004: 104-109 - [c4]Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman:
High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process. ISQED 2004: 517-521 - 2003
- [j3]David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster:
Dynamically Tuning Processor Resources with Adaptive Processing. Computer 36(12): 49-58 (2003) - [j2]Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman:
Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 514-522 (2003) - [j1]Volkan Kursun, Eby G. Friedman:
Domino logic with variable threshold voltage keeper. IEEE Trans. Very Large Scale Integr. Syst. 11(6): 1080-1093 (2003) - [c3]Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman:
Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization. ISQED 2003: 279- - 2002
- [c2]Volkan Kursun, Eby G. Friedman:
Low swing dual threshold voltage domino logic. ACM Great Lakes Symposium on VLSI 2002: 47-52 - [c1]Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman:
Managing static leakage energy in microprocessor functional units. MICRO 2002: 321-332
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