Chun-Huat Heng

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Jingcheng Tao

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Publications

2021
[j47]
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Hanyang Su, Jingcheng Tao, Siegfred D. Balon, Chun-Huat Heng:
A 2.3 GHz 2.8 mW Sampling ΔΣ PLL Achieving -110 dBc/Hz In-Band Phase Noise and 500 MHz FMCW Chirp. IEEE J. Solid State Circuits 56(11): 3458-3469 (2021)
2020
[j43]
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Jingcheng Tao, Chun-Huat Heng:
ΔΣ Fractional-N PLL With Hybrid IIR Noise Filtering. IEEE Trans. Circuits Syst. II Express Briefs 67-II(6): 1004-1008 (2020)
2019
[j35]
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Jingcheng Tao, Chun-Huat Heng:
A 2.2-GHz 3.2-mW DTC-Free Sampling ΔΣ Fractional-N PLL With -110-dBc/Hz In-Band Phase Noise and -246-dB FoM and -83-dBc Reference Spur. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3317-3329 (2019)
[c35]
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Jingcheng Tao, Chun-Huat Heng:
A 2.2-GHz 3.2-mW DTC-free Sampling ΔΣ Fractional-N PLL with -110 dBc/Hz In-band phase noise and -246dB FoM and -83dBc Reference Spur. VLSI Circuits 2019: 162-
2018
[c33]
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  - conf/asscc/TaoH18
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Jingcheng Tao, Chun-Huat Heng:
A 1.6-GHz 3.3-mW 1.5-MHz Wide Bandwidth ΔΣ Fractional-N PLL with a Single Path FIR Phase Noise Filtering. A-SSCC 2018: 215-218

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