Laurent Fesquet

◀ ▶ joint publications with Rodrigo Possamai Bastos

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Publications

2020
[j12]
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Ricardo Aquino Guazzelli, Matheus Garay Trindade, Leonel Acunha Guimaraes, Thiago Ferreira de Paiva Leite, Laurent Fesquet, Rodrigo Possamai Bastos:
Trojan Detection Test for Clockless Circuits. J. Electron. Test. 36(1): 23-31 (2020)
2019
[c95]
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  - conf/vlsi/FesquetDJLRDBME19
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Laurent Fesquet, Yoan Decoudu, Alexis Rodrigo Iga Jadue, Thiago Ferreira de Paiva Leite, Otto Aureliano Rolloff, M. Diallo, Rodrigo Possamai Bastos, Katell Morin-Allory, Sylvain Engels:
A Distributed Body-Biasing Strategy for Asynchronous Circuits. VLSI-SoC 2019: 27-32
2018
[j11]
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  - journals/mj/BastosGTF18
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Rodrigo Possamai Bastos, Leonel Acunha Guimaraes, Frank Sill Torres, Laurent Fesquet:
Architectures of bulk built-in current sensors for detection of transient faults in integrated circuits. Microelectron. J. 71: 70-79 (2018)
[j10]
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  - journals/mr/LeiteFB18
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Thiago Ferreira de Paiva Leite, Laurent Fesquet, Rodrigo Possamai Bastos:
A body built-in cell for detecting transient faults and dynamically biasing subcircuits of integrated systems. Microelectron. Reliab. 88-90: 122-127 (2018)
[c89]
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  - conf/date/GuimaraesLBF18
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Leonel Acunha Guimaraes, Thiago Ferreira de Paiva Leite, Rodrigo Possamai Bastos, Laurent Fesquet:
Non-intrusive testing technique for detection of Trojans in asynchronous circuits. DATE 2018: 1516-1519
[c86]
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  dblp key:
  - conf/iscas/JadueBLRDF18
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Alexis Rodrigo Iga Jadue, Rodrigo Possamai Bastos, Thiago Ferreira de Paiva Leite, Otto Aureliano Rolloff, M. Diallo, Laurent Fesquet:
Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems. ISCAS 2018: 1-5
2017
[c84]
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  - conf/async/SimaticCBBF17
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Jean Simatic, Abdelkarim Cherkaoui, François Bertrand, Rodrigo Possamai Bastos, Laurent Fesquet:
A Practical Framework for Specification, Verification, and Design of Self-Timed Pipelines. ASYNC 2017: 65-72
[c75]
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  - conf/isvlsi/GuimaraesBF17
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Leonel Acunha Guimaraes, Rodrigo Possamai Bastos, Laurent Fesquet:
Detection of Layout-Level Trojans by Monitoring Substrate with Preexisting Built-in Sensors. ISVLSI 2017: 290-295
2016
[c71]
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  - conf/dtis/GuimaraesBLF16
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Leonel Acunha Guimaraes, Rodrigo Possamai Bastos, Thiago Ferreira de Paiva Leite, Laurent Fesquet:
Simple tri-state logic Trojans able to upset properties of ring oscillators. DTIS 2016: 1-6
[c68]
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  - conf/ebccsp/SimaticBF16
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Jean Simatic, Rodrigo Possamai Bastos, Laurent Fesquet:
High-level synthesis for event-based systems. EBCCSP 2016: 1-7
[c64]
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  - conf/patmos/LeiteBJF16
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Thiago Ferreira de Paiva Leite, Rodrigo Possamai Bastos, Rodrigo Iga Jadue, Laurent Fesquet:
Comparison of low-voltage scaling in synchronous and asynchronous FD-SOI circuits. PATMOS 2016: 229-234
[c63]
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  - conf/sbcci/SimaticCBF16
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Jean Simatic, Abdelkarim Cherkaoui, Rodrigo Possamai Bastos, Laurent Fesquet:
New asynchronous protocols for enhancing area and throughput in bundled-data pipelines. SBCCI 2016: 1-6
2015
[j9]
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  - journals/mr/RolloffBF15
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Otto Aureliano Rolloff, Rodrigo Possamai Bastos, Laurent Fesquet:
Exploiting reliable features of asynchronous circuits for designing low-voltage components in FD-SOI technology. Microelectron. Reliab. 55(9-10): 1302-1306 (2015)

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