Eduardo J. Peralías

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Gildas Léger

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Publications

2023
[j17]
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Carlos Manuel Domínguez-Matas, Antonio J. Ginés, Aránzazu Otín, Valentin Gutierrez, Gildas Léger, Eduardo J. Peralías:
Behavioral Model for High-Speed SAR ADCs With On-Chip References. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 1918-1930 (2023)
[c48]
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Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Valentin Gutierrez, C. Dominguez, Maria Angeles Jalón, L. Carranza:
A Single-Event Latchup setup for high-precision AMS circuits. ETS 2023: 1-6
2021
[j16]
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Antonio J. Ginés, Gildas Léger, Eduardo J. Peralías:
Digital Non-Linearity Calibration for ADCs With Redundancy Using a New LUT Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3197-3210 (2021)
2020
[c44]
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Antonio J. Ginés, Gildas Léger, Eduardo J. Peralías:
Non-Linear Calibration of Pipeline ADCs using a Histogram-Based Estimation of the Redundant INL. NEWCAS 2020: 142-145
2017
[c40]
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  - conf/date/BarraganLGPR17
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Manuel J. Barragán, Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
On the limits of machine learning-based test: A calibrated mixed-signal system case study. DATE 2017: 79-84
2016
[c39]
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Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragán, Salvador Mir:
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. ETS 2016: 1-6
2014
[c36]
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  - conf/icecsys/GinesPLR14
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Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda:
Closed-loop simulation method for evaluation of static offset in discrete-time comparators. ICECS 2014: 538-541
2010
[j7]
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  - journals/tcas/LegerGPR10
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Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
On Chopper Effects in Discrete-Time SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2438-2449 (2010)
2004
[j5]
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Gildas Léger, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas:
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(1): 140-150 (2004)

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