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Wenjian Yu
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Publications
- 2016
- [j19]Hao Zhuang, Wenjian Yu, Shih-Hung Weng, Ilgweon Kang, Jeng-Hau Lin, Xiang Zhang, Ryan Coutts, Chung-Kuan Cheng:
Simulation Algorithms With Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1681-1694 (2016) - 2015
- [c41]Hao Zhuang, Wenjian Yu, Ilgweon Kang, Xinan Wang, Chung-Kuan Cheng:
An algorithmic framework for efficient large-scale circuit simulation using exponential integrators. DAC 2015: 163:1-163:6 - [i2]Hao Zhuang, Wenjian Yu, Shih-Hung Weng, Ilgweon Kang, Jeng-Hau Lin, Xiang Zhang, Ryan Coutts, Jingwei Lu, Chung-Kuan Cheng:
Simulation Algorithms with Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks. CoRR abs/1505.06699 (2015) - [i1]Hao Zhuang, Wenjian Yu, Ilgweon Kang, Xinan Wang, Chung-Kuan Cheng:
An Algorithmic Framework for Efficient Large-Scale Circuit Simulation Using Exponential Integrators. CoRR abs/1511.04515 (2015) - 2011
- [c30]Amirali Shayan Arani, Xiang Hu, Chung-Kuan Cheng, Wenjian Yu, Christopher Pan:
Linear Dropout Regulator based power distribution design under worst loading. ASICON 2011: 539-542 - 2010
- [j11]Shan Zeng, Wenjian Yu, Xianlong Hong, Chung-Kuan Cheng:
Efficient Power Network Analysis with Modeling of Inductive Effects. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(6): 1196-1203 (2010) - [c26]Wanping Zhang, Ling Zhang, Amirali Shayan Arani, Wenjian Yu, Xiang Hu, Zhi Zhu, A. Ege Engin, Chung-Kuan Cheng:
On-chip power network optimization with decoupling capacitors and controlled-ESRs. ASP-DAC 2010: 119-124 - 2009
- [j9]Wenjian Yu, Rui Shi, Chung-Kuan Cheng:
Accurate Eye Diagram Prediction Based on Step Response and Its Application to Low-Power Equalizer Design. IEICE Trans. Electron. 92-C(4): 444-452 (2009) - [j8]Shan Zeng, Wenjian Yu, Jin Shi, Xianlong Hong, Chung-Kuan Cheng:
Efficient Partial Reluctance Extraction for Large-Scale Regular Power Grid Structures. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(6): 1476-1484 (2009) - [j7]Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng:
Efficient Power Network Analysis Considering Multidomain Clock Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1348-1358 (2009) - [c25]Wanping Zhang, Yi Zhu, Wenjian Yu, Amirali Shayan Arani, Renshen Wang, Zhi Zhu, Chung-Kuan Cheng:
Noise minimization during power-up stage for a multi-domain power network. ASP-DAC 2009: 391-396 - [c23]Amirali Shayan Arani, Xiang Hu, He Peng, Chung-Kuan Cheng, Wenjian Yu, Mikhail Popovich, Thomas Toms, Xiaoming Chen:
Reliability aware through silicon via planning for 3D stacked ICs. DATE 2009: 288-291 - [c22]Amirali Shayan Arani, Xiang Hu, He Peng, Wenjian Yu, Wanping Zhang, Chung-Kuan Cheng, Mikhail Popovich, Xiaoming Chen, Lew Chua-Eoan, Xiaohua Kong:
Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network. ISQED 2009: 576-581 - [c21]Shan Zeng, Wenjian Yu, Wanping Zhang, Jian Wang, Xianlong Hong, Chung-Kuan Cheng:
Efficient power network analysis with complete inductive modeling. ISQED 2009: 770-775 - [c20]Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shayan Arani, A. Ege Engin, Chung-Kuan Cheng:
Predicting the worst-case voltage violation in a 3D power network. SLIP 2009: 93-98 - 2008
- [c18]Ling Zhang, Wenjian Yu, Haikun Zhu, Alina Deutsch, George A. Katopis, Daniel M. Dreps, Ernest S. Kuh, Chung-Kuan Cheng:
Low power passive equalizer optimization using tritonic step response. DAC 2008: 570-573 - [c17]Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, Chung-Kuan Cheng:
Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network. DATE 2008: 537-540 - [c14]Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James F. Buckwalter, Ernest S. Kuh, Chung-Kuan Cheng:
Low Power Passive Equalizer Design for Computer Memory Links. Hot Interconnects 2008: 51-56 - [c13]Rui Shi, Wenjian Yu, Yi Zhu, Chung-Kuan Cheng, Ernest S. Kuh:
Efficient and accurate eye diagram prediction for high speed signaling. ICCAD 2008: 655-661 - [c12]Ling Zhang, Wenjian Yu, Haikun Zhu, Wanping Zhang, Chung-Kuan Cheng:
Clock Skew Analysis via Vector Fitting in Frequency Domain. ISQED 2008: 476-479 - 2007
- [j4]Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng:
Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4): 645-658 (2007)
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