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Jaewoong Sim
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Publications
- 2023
- [c18]Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: A Framework to Make CUDA Portable. PPoPP 2023: 444-446 - 2022
- [j4]Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
COX : Exposing CUDA Warp-level Functions to CPUs. ACM Trans. Archit. Code Optim. 19(4): 59:1-59:25 (2022) - [i3]Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: CUDA for Parallelized and Broad-range Processors. CoRR abs/2206.07896 (2022) - 2021
- [i2]Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
Supporting CUDA for an extended RISC-V GPU architecture. CoRR abs/2109.00673 (2021) - [i1]Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
COX: CUDA on X86 by Exposing Warp-Level Functions to CPUs. CoRR abs/2112.10034 (2021) - 2020
- [c17]Hyojong Kim, Jaewoong Sim, Prasun Gera, Ramyad Hadidi, Hyesoon Kim:
Batch-Aware Unified Memory Management in GPUs for Irregular Workloads. ASPLOS 2020: 1357-1370 - 2019
- [j2]Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim:
Thermal-aware processing-in-memory instruction offloading. J. Parallel Distributed Comput. 130: 193-207 (2019) - 2018
- [c12]Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim:
CoolPIM: Thermal-Aware Source Throttling for Efficient PIM Instruction Offloading. IPDPS 2018: 680-689 - 2017
- [c9]Lifeng Nai, Ramyad Hadidi, Jaewoong Sim, Hyojong Kim, Pranith Kumar, Hyesoon Kim:
GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks. HPCA 2017: 457-468 - 2015
- [c6]Joo Hwan Lee, Jaewoong Sim, Hyesoon Kim:
BSSync: Processing Near Memory for Machine Learning Workloads with Bounded Staleness Consistency Models. PACT 2015: 241-252 - 2014
- [c5]Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim:
Transparent Hardware Management of Stacked DRAM as Part of Memory. MICRO 2014: 13-24 - 2012
- [c3]Jaewoong Sim, Jaekyu Lee, Moinuddin K. Qureshi, Hyesoon Kim:
FLEXclusion: Balancing cache capacity and on-chip bandwidth via Flexible Exclusion. ISCA 2012: 321-332 - [c2]Jaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi:
A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch. MICRO 2012: 247-257 - [c1]Jaewoong Sim, Aniruddha Dasgupta, Hyesoon Kim, Richard W. Vuduc:
A performance analysis framework for identifying potential benefits in GPGPU applications. PPoPP 2012: 11-22
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