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Zhiqiang You
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Publications
- 2021
- [j24]Peng Liu, Zhiqiang You, Jigang Wu, Bosheng Liu, Yinhe Han, Krishnendu Chakrabarty:
Fault Modeling and Efficient Testing of Memristor-Based Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4444-4455 (2021) - [j23]Lian Yao, Peng Liu, Jigang Wu, Yinhe Han, Yuehang Zhong, Zhiqiang You:
Integrating Two Logics Into One Crossbar Array for Logic Gate Design. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2987-2991 (2021) - [j22]Peng Liu, Zhiqiang You, Jigang Wu, Michael Elimu, Weizheng Wang, Shuo Cai, Yinhe Han:
Defect Analysis and Parallel Testing for 3D Hybrid CMOS-Memristor Memory. IEEE Trans. Emerg. Top. Comput. 9(2): 745-758 (2021) - 2018
- [c9]Peng Liu, Jigang Wu, Zhiqiang You, Michael Elimu, Weizheng Wang, Shuo Cai:
Defect Analysis and Parallel March Test Algorithm for 3D Hybrid CMOS-Memristor Memory. ATS 2018: 25-29 - 2016
- [j17]Liao Wu, Jishun Kuang, Zhiqiang You, Peng Liu, Shuo Cai:
A parallel-SSHI rectifier for ultra-low-voltage piezoelectric vibration energy harvesting. IEICE Electron. Express 13(17): 20160539 (2016) - 2015
- [j15]Peng Liu, Zhiqiang You, Jishun Kuang, Zhipeng Hu, Weizheng Wang:
Logic operation-based DFT method and 1R memristive crossbar March-like test algorithm. IEICE Electron. Express 12(23): 20150839 (2015) - 2012
- [j10]Zhiqiang You, Weizheng Wang, Peng Liu, Jishun Kuang, Zheng Qin:
A scan disabling-based BAST scheme for test cost and test power reduction. IEICE Electron. Express 9(2): 111-116 (2012) - [j9]Weizheng Wang, Jishun Kuang, Peng Liu, Xin Peng, Zhiqiang You:
Switching activity reduction for scan-based BIST using weighted scan input data. IEICE Electron. Express 9(10): 874-880 (2012) - 2011
- [j4]Zhiqiang You, Weizheng Wang, Zhiping Dou, Peng Liu, Jishun Kuang:
A scan disabling-based BAST scheme for test cost reduction. IEICE Electron. Express 8(16): 1367-1373 (2011)
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