Vladimir Zolotov

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Kaushik Gala

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Publications

2003
[j5]
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Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar:
Fast on-chip inductance simulation using a precorrected-FFT method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(1): 49-66 (2003)
[c28]
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Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Min Zhao, Kaushik Gala, Rajendran Panda:
Statistical delay computation considering spatial correlations. ASP-DAC 2003: 271-276
[c20]
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Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar:
Table look-up based compact modeling for on-chip interconnect timing and noise analysis. ISCAS (4) 2003: 668-671
2002
[j1]
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  - journals/tvlsi/GalaBZVJ02
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Kaushik Gala, David T. Blaauw, Vladimir Zolotov, Pravin M. Vaidya, Anil Joshi:
Inductance model and analysis methodology for high-speed on-chip interconnect. IEEE Trans. Very Large Scale Integr. Syst. 10(6): 730-745 (2002)
[c16]
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Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar:
A precorrected-FFT method for simulating on-chip inductance. ICCAD 2002: 221-227
[c11]
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Min Zhao, Kaushik Gala, Vladimir Zolotov, Yuhong Fu, Rajendran Panda, R. Ramkumar, Bhuwan K. Agrawal:
Worst case clock skew under power supply variations. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 22-28
2001
[c9]
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  - conf/dac/GalaBWZZ01
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Kaushik Gala, David T. Blaauw, Junfeng Wang, Vladimir Zolotov, Min Zhao:
Inductance 101: Analysis and Design Issues. DAC 2001: 329-334
2000
[c5]
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  - conf/dac/GalaZPYWB00
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Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Brian Young, Junfeng Wang, David T. Blaauw:
On-chip inductance modeling and analysis. DAC 2000: 63-68
[c3]
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David T. Blaauw, Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Junfeng Wang:
On-chip inductance modeling. ACM Great Lakes Symposium on VLSI 2000: 75-80

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