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Andreas Gerstlauer
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Publications
- 2017
- [p4]Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya:
Introduction to Hardware/Software Codesign. Handbook of Hardware/Software Codesign 2017: 3-26 - [p2]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
SCE: System-on-Chip Environment. Handbook of Hardware/Software Codesign 2017: 1019-1050 - 2011
- [c33]Rainer Dömer, Weiwei Chen, Xu Han, Andreas Gerstlauer:
Multi-core parallel simulation of System-level Description Languages. ASP-DAC 2011: 311-316 - 2010
- [j5]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
Fast and accurate processor models for efficient MPSoC design. ACM Trans. Design Autom. Electr. Syst. 15(2): 10:1-10:26 (2010) - [c25]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
System-level development of embedded software. ASP-DAC 2010: 903-909 - 2009
- [c21]Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller:
Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems. ASP-DAC 2009: 290-292 - 2008
- [j3]Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski:
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. EURASIP J. Embed. Syst. 2008 (2008) - [j2]Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski:
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 466-475 (2008) - [c18]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
Automatic generation of hardware dependent software for MPSoCs from abstract system specifications. ASP-DAC 2008: 271-276 - 2007
- [j1]Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski:
Automatic Layer-Based Generation of System-On-Chip Bus Communication Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(9): 1676-1687 (2007) - [c16]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
Abstract, Multifaceted Modeling of Embedded Processors for System Level Design. ASP-DAC 2007: 384-389 - [c15]Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski:
An Interactive Design Environment for C-based High-Level Synthesis. IESS 2007: 135-144 - [c14]Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer:
Embedded Software Development in a System-Level Design Flow. IESS 2007: 289-298 - [e1]Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig:
Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA. IFIP Advances in Information and Communication Technology 231, Springer 2007, ISBN 978-0-387-72257-3 [contents] - 2006
- [c13]Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski:
Automatic generation of transaction level models for rapid design space exploration. CODES+ISSS 2006: 64-69 - 2005
- [c12]Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski:
System-level communication modeling for network-on-chip synthesis. ASP-DAC 2005: 45-48 - [c10]Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski:
Automatic network generation for system-on-chip communication design. CODES+ISSS 2005: 255-260 - [c9]Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski:
Automatic Generation of Communication Architectures. IESS 2005: 179-188 - 2002
- [c4]Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller:
The Formal Execution Semantics of SpecC. ISSS 2002: 150-155 - 2001
- [b1]Andreas Gerstlauer, Rainer Dömer, Junyu Peng, Daniel D. Gajski:
System Design - A Practical Guide with SpecC. Springer 2001, ISBN 978-0-7923-7387-2, pp. 1-255
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