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Fabiano Hessel
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Publications
- 2021
- [c70]Maicon Diogo Much, César A. M. Marcon, Fabiano Hessel, Alfredo Cataldo Neto:
LifeSenior - A Health Monitoring IoT System Based on Deep Learning Architecture. HCI (26) 2021: 293-306 - 2013
- [c35]Vinicius Bohrer, Ramon Fernandes, César A. M. Marcon, Thais Webber, Leticia B. Poehls, Ricardo M. Czekster, Fabiano Hessel:
A flexible framework for modeling and simulation of multipurpose wireless networks. RSP 2013: 94-100 - 2012
- [c30]Eduardo Antunes, Matheus Soares, Alexandra Aguiar, Sergio Johann Filho, Marcos Sartori, Fabiano Hessel, César A. M. Marcon:
Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC. ISQED 2012: 451-457 - 2011
- [j5]César A. M. Marcon, Ney Calazans, Edson I. Moreno, Fernando Moraes, Fabiano Hessel, Altamiro Amadeu Susin:
CAFES: A framework for intrachip application modeling and communication architecture design. J. Parallel Distributed Comput. 71(5): 714-728 (2011) - [c26]Eduardo Antunes, Alexandra Aguiar, Sergio Johann Filho, Marcos Sartori, Fabiano Hessel, César A. M. Marcon:
Partitioning and mapping on NoC-Based MPSoC: an energy consumption saving approach. NoCArc@MICRO 2011: 51-56 - 2008
- [c19]José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler:
A Passive 915 MHz UHF RFID Tag. ISQED 2008: 348-351 - [c18]David Matschulat, César A. M. Marcon, Fabiano Hessel:
A QoS Scheduler for Real-Time Embedded Systems. ISQED 2008: 564-567 - [c17]Sergio Johann Filho, Alexandra Aguiar, César Augusto Missio Marcon, Fabiano Hessel:
High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping. IEEE International Workshop on Rapid System Prototyping 2008: 27-33 - 2007
- [c16]Fabiano Hessel, César A. M. Marcon, Tatiana Gadelha Serra dos Santos:
High Level RTOS Scheduler Modeling for a Fast Design Validation. ISVLSI 2007: 461-466 - [c15]David Matschulat, César A. M. Marcon, Fabiano Hessel:
ER-EDF: A QoS Scheduler for Real-Time Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2007: 181-188 - [c14]César A. M. Marcon, José Carlos S. Palma, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Carlos Eduardo Reif, Luciano Azevedo, Carolina Metzler:
A 915 MHz UHF low power RFID tag. SBCCI 2007: 276-281 - [c13]César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel:
A VHDL based approach for fast and accurate energy consumption estimations. VLSI-SoC 2007: 276-279 - [c12]José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler:
A Flexible Design Flow for a Low Power RFID Tag. VLSI-SoC 2007: 300-303 - [i1]César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. CoRR abs/0710.4738 (2007) - 2006
- [j2]Fabiano Hessel, Vitor M. da Rosa, Carlos Eduardo Reif, César A. M. Marcon, Tatiana Gadelha Serra dos Santos:
Scheduling refinement in abstract RTOS models. ACM Trans. Embed. Comput. Syst. 5(2): 342-354 (2006) - [c11]Melissa Vetromille, Luciano Ost, César A. M. Marcon, Carlos Eduardo Reif, Fabiano Hessel:
RTOS Scheduler Implementation in Hardware and Software for Real Time Applications. IEEE International Workshop on Rapid System Prototyping 2006: 163-168 - 2005
- [c10]César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. DATE 2005: 502-507 - 2004
- [c9]Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin:
Abstract RTOS Modeling for Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2004: 210-216 - 2002
- [c7]César A. M. Marcon, Fabiano Hessel, Alexandre M. Amory, Luis H. L. Ries, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Prototyping of embedded digital systems from SDL language: a case study. HLDVT 2002: 133-138
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