Vasilis F. Pavlidis

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Minmin Jiang

> Home > Persons > Vasilis F. Pavlidis

Publications

2022
[c51]
- view
  authority control:
- export record
  dblp key:
  - conf/iscas/JiangMP22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/JiangMP22
Minmin Jiang, Eleni Maragkoudaki, Vasilis F. Pavlidis:
Mitigating EM Side-Channel Attacks with Dynamic Delay Insertion and Data Bus Inversion. ISCAS 2022: 1724-1728
2021
[c46]
- view
  authority control:
- export record
  dblp key:
  - conf/slip/JiangP21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/slip/JiangP21
Minmin Jiang, Vasilis F. Pavlidis:
Performance-Aware Interconnect Delay Insertion Against EM Side-Channel Attacks. SLIP 2021: 25-32
2020
[c44]
- view
  authority control:
- export record
  dblp key:
  - conf/glvlsi/JiangPP20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/JiangPP20
Minmin Jiang, Ioannis A. Papistas, Vasilis F. Pavlidis:
Cost Modeling and Analysis of TSV and Contactless 3D-ICs. ACM Great Lakes Symposium on VLSI 2020: 519-524

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.